vmmapi.c revision 284894
1/*-
2 * Copyright (c) 2011 NetApp, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: stable/10/lib/libvmmapi/vmmapi.c 284894 2015-06-27 22:48:22Z neel $
27 */
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD: stable/10/lib/libvmmapi/vmmapi.c 284894 2015-06-27 22:48:22Z neel $");
31
32#include <sys/param.h>
33#include <sys/sysctl.h>
34#include <sys/ioctl.h>
35#include <sys/mman.h>
36#include <sys/_iovec.h>
37#include <sys/cpuset.h>
38
39#include <x86/segments.h>
40#include <machine/specialreg.h>
41#include <machine/param.h>
42
43#include <stdio.h>
44#include <stdlib.h>
45#include <assert.h>
46#include <string.h>
47#include <fcntl.h>
48#include <unistd.h>
49
50#include <libutil.h>
51
52#include <machine/vmm.h>
53#include <machine/vmm_dev.h>
54
55#include "vmmapi.h"
56
57#define	MB	(1024 * 1024UL)
58#define	GB	(1024 * 1024 * 1024UL)
59
60struct vmctx {
61	int	fd;
62	uint32_t lowmem_limit;
63	enum vm_mmap_style vms;
64	int	memflags;
65	size_t	lowmem;
66	char	*lowmem_addr;
67	size_t	highmem;
68	char	*highmem_addr;
69	char	*name;
70};
71
72#define	CREATE(x)  sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x)))
73#define	DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x)))
74
75static int
76vm_device_open(const char *name)
77{
78        int fd, len;
79        char *vmfile;
80
81	len = strlen("/dev/vmm/") + strlen(name) + 1;
82	vmfile = malloc(len);
83	assert(vmfile != NULL);
84	snprintf(vmfile, len, "/dev/vmm/%s", name);
85
86        /* Open the device file */
87        fd = open(vmfile, O_RDWR, 0);
88
89	free(vmfile);
90        return (fd);
91}
92
93int
94vm_create(const char *name)
95{
96
97	return (CREATE((char *)name));
98}
99
100struct vmctx *
101vm_open(const char *name)
102{
103	struct vmctx *vm;
104
105	vm = malloc(sizeof(struct vmctx) + strlen(name) + 1);
106	assert(vm != NULL);
107
108	vm->fd = -1;
109	vm->memflags = 0;
110	vm->lowmem_limit = 3 * GB;
111	vm->name = (char *)(vm + 1);
112	strcpy(vm->name, name);
113
114	if ((vm->fd = vm_device_open(vm->name)) < 0)
115		goto err;
116
117	return (vm);
118err:
119	vm_destroy(vm);
120	return (NULL);
121}
122
123void
124vm_destroy(struct vmctx *vm)
125{
126	assert(vm != NULL);
127
128	if (vm->fd >= 0)
129		close(vm->fd);
130	DESTROY(vm->name);
131
132	free(vm);
133}
134
135int
136vm_parse_memsize(const char *optarg, size_t *ret_memsize)
137{
138	char *endptr;
139	size_t optval;
140	int error;
141
142	optval = strtoul(optarg, &endptr, 0);
143	if (*optarg != '\0' && *endptr == '\0') {
144		/*
145		 * For the sake of backward compatibility if the memory size
146		 * specified on the command line is less than a megabyte then
147		 * it is interpreted as being in units of MB.
148		 */
149		if (optval < MB)
150			optval *= MB;
151		*ret_memsize = optval;
152		error = 0;
153	} else
154		error = expand_number(optarg, ret_memsize);
155
156	return (error);
157}
158
159int
160vm_get_memory_seg(struct vmctx *ctx, vm_paddr_t gpa, size_t *ret_len,
161		  int *wired)
162{
163	int error;
164	struct vm_memory_segment seg;
165
166	bzero(&seg, sizeof(seg));
167	seg.gpa = gpa;
168	error = ioctl(ctx->fd, VM_GET_MEMORY_SEG, &seg);
169	*ret_len = seg.len;
170	if (wired != NULL)
171		*wired = seg.wired;
172	return (error);
173}
174
175uint32_t
176vm_get_lowmem_limit(struct vmctx *ctx)
177{
178
179	return (ctx->lowmem_limit);
180}
181
182void
183vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit)
184{
185
186	ctx->lowmem_limit = limit;
187}
188
189void
190vm_set_memflags(struct vmctx *ctx, int flags)
191{
192
193	ctx->memflags = flags;
194}
195
196static int
197setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char **addr)
198{
199	int error, mmap_flags;
200	struct vm_memory_segment seg;
201
202	/*
203	 * Create and optionally map 'len' bytes of memory at guest
204	 * physical address 'gpa'
205	 */
206	bzero(&seg, sizeof(seg));
207	seg.gpa = gpa;
208	seg.len = len;
209	error = ioctl(ctx->fd, VM_MAP_MEMORY, &seg);
210	if (error == 0 && addr != NULL) {
211		mmap_flags = MAP_SHARED;
212		if ((ctx->memflags & VM_MEM_F_INCORE) == 0)
213			mmap_flags |= MAP_NOCORE;
214		*addr = mmap(NULL, len, PROT_READ | PROT_WRITE, mmap_flags,
215		    ctx->fd, gpa);
216	}
217	return (error);
218}
219
220int
221vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms)
222{
223	char **addr;
224	int error;
225
226	/* XXX VM_MMAP_SPARSE not implemented yet */
227	assert(vms == VM_MMAP_NONE || vms == VM_MMAP_ALL);
228	ctx->vms = vms;
229
230	/*
231	 * If 'memsize' cannot fit entirely in the 'lowmem' segment then
232	 * create another 'highmem' segment above 4GB for the remainder.
233	 */
234	if (memsize > ctx->lowmem_limit) {
235		ctx->lowmem = ctx->lowmem_limit;
236		ctx->highmem = memsize - ctx->lowmem;
237	} else {
238		ctx->lowmem = memsize;
239		ctx->highmem = 0;
240	}
241
242	if (ctx->lowmem > 0) {
243		addr = (vms == VM_MMAP_ALL) ? &ctx->lowmem_addr : NULL;
244		error = setup_memory_segment(ctx, 0, ctx->lowmem, addr);
245		if (error)
246			return (error);
247	}
248
249	if (ctx->highmem > 0) {
250		addr = (vms == VM_MMAP_ALL) ? &ctx->highmem_addr : NULL;
251		error = setup_memory_segment(ctx, 4*GB, ctx->highmem, addr);
252		if (error)
253			return (error);
254	}
255
256	return (0);
257}
258
259void *
260vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len)
261{
262
263	/* XXX VM_MMAP_SPARSE not implemented yet */
264	assert(ctx->vms == VM_MMAP_ALL);
265
266	if (gaddr < ctx->lowmem && gaddr + len <= ctx->lowmem)
267		return ((void *)(ctx->lowmem_addr + gaddr));
268
269	if (gaddr >= 4*GB) {
270		gaddr -= 4*GB;
271		if (gaddr < ctx->highmem && gaddr + len <= ctx->highmem)
272			return ((void *)(ctx->highmem_addr + gaddr));
273	}
274
275	return (NULL);
276}
277
278size_t
279vm_get_lowmem_size(struct vmctx *ctx)
280{
281
282	return (ctx->lowmem);
283}
284
285size_t
286vm_get_highmem_size(struct vmctx *ctx)
287{
288
289	return (ctx->highmem);
290}
291
292int
293vm_set_desc(struct vmctx *ctx, int vcpu, int reg,
294	    uint64_t base, uint32_t limit, uint32_t access)
295{
296	int error;
297	struct vm_seg_desc vmsegdesc;
298
299	bzero(&vmsegdesc, sizeof(vmsegdesc));
300	vmsegdesc.cpuid = vcpu;
301	vmsegdesc.regnum = reg;
302	vmsegdesc.desc.base = base;
303	vmsegdesc.desc.limit = limit;
304	vmsegdesc.desc.access = access;
305
306	error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc);
307	return (error);
308}
309
310int
311vm_get_desc(struct vmctx *ctx, int vcpu, int reg,
312	    uint64_t *base, uint32_t *limit, uint32_t *access)
313{
314	int error;
315	struct vm_seg_desc vmsegdesc;
316
317	bzero(&vmsegdesc, sizeof(vmsegdesc));
318	vmsegdesc.cpuid = vcpu;
319	vmsegdesc.regnum = reg;
320
321	error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc);
322	if (error == 0) {
323		*base = vmsegdesc.desc.base;
324		*limit = vmsegdesc.desc.limit;
325		*access = vmsegdesc.desc.access;
326	}
327	return (error);
328}
329
330int
331vm_get_seg_desc(struct vmctx *ctx, int vcpu, int reg, struct seg_desc *seg_desc)
332{
333	int error;
334
335	error = vm_get_desc(ctx, vcpu, reg, &seg_desc->base, &seg_desc->limit,
336	    &seg_desc->access);
337	return (error);
338}
339
340int
341vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val)
342{
343	int error;
344	struct vm_register vmreg;
345
346	bzero(&vmreg, sizeof(vmreg));
347	vmreg.cpuid = vcpu;
348	vmreg.regnum = reg;
349	vmreg.regval = val;
350
351	error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg);
352	return (error);
353}
354
355int
356vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val)
357{
358	int error;
359	struct vm_register vmreg;
360
361	bzero(&vmreg, sizeof(vmreg));
362	vmreg.cpuid = vcpu;
363	vmreg.regnum = reg;
364
365	error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg);
366	*ret_val = vmreg.regval;
367	return (error);
368}
369
370int
371vm_run(struct vmctx *ctx, int vcpu, struct vm_exit *vmexit)
372{
373	int error;
374	struct vm_run vmrun;
375
376	bzero(&vmrun, sizeof(vmrun));
377	vmrun.cpuid = vcpu;
378
379	error = ioctl(ctx->fd, VM_RUN, &vmrun);
380	bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit));
381	return (error);
382}
383
384int
385vm_suspend(struct vmctx *ctx, enum vm_suspend_how how)
386{
387	struct vm_suspend vmsuspend;
388
389	bzero(&vmsuspend, sizeof(vmsuspend));
390	vmsuspend.how = how;
391	return (ioctl(ctx->fd, VM_SUSPEND, &vmsuspend));
392}
393
394int
395vm_reinit(struct vmctx *ctx)
396{
397
398	return (ioctl(ctx->fd, VM_REINIT, 0));
399}
400
401int
402vm_inject_exception(struct vmctx *ctx, int vcpu, int vector, int errcode_valid,
403    uint32_t errcode, int restart_instruction)
404{
405	struct vm_exception exc;
406
407	exc.cpuid = vcpu;
408	exc.vector = vector;
409	exc.error_code = errcode;
410	exc.error_code_valid = errcode_valid;
411	exc.restart_instruction = restart_instruction;
412
413	return (ioctl(ctx->fd, VM_INJECT_EXCEPTION, &exc));
414}
415
416int
417vm_apicid2vcpu(struct vmctx *ctx, int apicid)
418{
419	/*
420	 * The apic id associated with the 'vcpu' has the same numerical value
421	 * as the 'vcpu' itself.
422	 */
423	return (apicid);
424}
425
426int
427vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector)
428{
429	struct vm_lapic_irq vmirq;
430
431	bzero(&vmirq, sizeof(vmirq));
432	vmirq.cpuid = vcpu;
433	vmirq.vector = vector;
434
435	return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq));
436}
437
438int
439vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector)
440{
441	struct vm_lapic_irq vmirq;
442
443	bzero(&vmirq, sizeof(vmirq));
444	vmirq.cpuid = vcpu;
445	vmirq.vector = vector;
446
447	return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq));
448}
449
450int
451vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg)
452{
453	struct vm_lapic_msi vmmsi;
454
455	bzero(&vmmsi, sizeof(vmmsi));
456	vmmsi.addr = addr;
457	vmmsi.msg = msg;
458
459	return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi));
460}
461
462int
463vm_ioapic_assert_irq(struct vmctx *ctx, int irq)
464{
465	struct vm_ioapic_irq ioapic_irq;
466
467	bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
468	ioapic_irq.irq = irq;
469
470	return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq));
471}
472
473int
474vm_ioapic_deassert_irq(struct vmctx *ctx, int irq)
475{
476	struct vm_ioapic_irq ioapic_irq;
477
478	bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
479	ioapic_irq.irq = irq;
480
481	return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq));
482}
483
484int
485vm_ioapic_pulse_irq(struct vmctx *ctx, int irq)
486{
487	struct vm_ioapic_irq ioapic_irq;
488
489	bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
490	ioapic_irq.irq = irq;
491
492	return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq));
493}
494
495int
496vm_ioapic_pincount(struct vmctx *ctx, int *pincount)
497{
498
499	return (ioctl(ctx->fd, VM_IOAPIC_PINCOUNT, pincount));
500}
501
502int
503vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
504{
505	struct vm_isa_irq isa_irq;
506
507	bzero(&isa_irq, sizeof(struct vm_isa_irq));
508	isa_irq.atpic_irq = atpic_irq;
509	isa_irq.ioapic_irq = ioapic_irq;
510
511	return (ioctl(ctx->fd, VM_ISA_ASSERT_IRQ, &isa_irq));
512}
513
514int
515vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
516{
517	struct vm_isa_irq isa_irq;
518
519	bzero(&isa_irq, sizeof(struct vm_isa_irq));
520	isa_irq.atpic_irq = atpic_irq;
521	isa_irq.ioapic_irq = ioapic_irq;
522
523	return (ioctl(ctx->fd, VM_ISA_DEASSERT_IRQ, &isa_irq));
524}
525
526int
527vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
528{
529	struct vm_isa_irq isa_irq;
530
531	bzero(&isa_irq, sizeof(struct vm_isa_irq));
532	isa_irq.atpic_irq = atpic_irq;
533	isa_irq.ioapic_irq = ioapic_irq;
534
535	return (ioctl(ctx->fd, VM_ISA_PULSE_IRQ, &isa_irq));
536}
537
538int
539vm_isa_set_irq_trigger(struct vmctx *ctx, int atpic_irq,
540    enum vm_intr_trigger trigger)
541{
542	struct vm_isa_irq_trigger isa_irq_trigger;
543
544	bzero(&isa_irq_trigger, sizeof(struct vm_isa_irq_trigger));
545	isa_irq_trigger.atpic_irq = atpic_irq;
546	isa_irq_trigger.trigger = trigger;
547
548	return (ioctl(ctx->fd, VM_ISA_SET_IRQ_TRIGGER, &isa_irq_trigger));
549}
550
551int
552vm_inject_nmi(struct vmctx *ctx, int vcpu)
553{
554	struct vm_nmi vmnmi;
555
556	bzero(&vmnmi, sizeof(vmnmi));
557	vmnmi.cpuid = vcpu;
558
559	return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi));
560}
561
562static struct {
563	const char	*name;
564	int		type;
565} capstrmap[] = {
566	{ "hlt_exit",		VM_CAP_HALT_EXIT },
567	{ "mtrap_exit",		VM_CAP_MTRAP_EXIT },
568	{ "pause_exit",		VM_CAP_PAUSE_EXIT },
569	{ "unrestricted_guest",	VM_CAP_UNRESTRICTED_GUEST },
570	{ "enable_invpcid",	VM_CAP_ENABLE_INVPCID },
571	{ 0 }
572};
573
574int
575vm_capability_name2type(const char *capname)
576{
577	int i;
578
579	for (i = 0; capstrmap[i].name != NULL && capname != NULL; i++) {
580		if (strcmp(capstrmap[i].name, capname) == 0)
581			return (capstrmap[i].type);
582	}
583
584	return (-1);
585}
586
587const char *
588vm_capability_type2name(int type)
589{
590	int i;
591
592	for (i = 0; capstrmap[i].name != NULL; i++) {
593		if (capstrmap[i].type == type)
594			return (capstrmap[i].name);
595	}
596
597	return (NULL);
598}
599
600int
601vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap,
602		  int *retval)
603{
604	int error;
605	struct vm_capability vmcap;
606
607	bzero(&vmcap, sizeof(vmcap));
608	vmcap.cpuid = vcpu;
609	vmcap.captype = cap;
610
611	error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap);
612	*retval = vmcap.capval;
613	return (error);
614}
615
616int
617vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val)
618{
619	struct vm_capability vmcap;
620
621	bzero(&vmcap, sizeof(vmcap));
622	vmcap.cpuid = vcpu;
623	vmcap.captype = cap;
624	vmcap.capval = val;
625
626	return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap));
627}
628
629int
630vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
631{
632	struct vm_pptdev pptdev;
633
634	bzero(&pptdev, sizeof(pptdev));
635	pptdev.bus = bus;
636	pptdev.slot = slot;
637	pptdev.func = func;
638
639	return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev));
640}
641
642int
643vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
644{
645	struct vm_pptdev pptdev;
646
647	bzero(&pptdev, sizeof(pptdev));
648	pptdev.bus = bus;
649	pptdev.slot = slot;
650	pptdev.func = func;
651
652	return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev));
653}
654
655int
656vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func,
657		   vm_paddr_t gpa, size_t len, vm_paddr_t hpa)
658{
659	struct vm_pptdev_mmio pptmmio;
660
661	bzero(&pptmmio, sizeof(pptmmio));
662	pptmmio.bus = bus;
663	pptmmio.slot = slot;
664	pptmmio.func = func;
665	pptmmio.gpa = gpa;
666	pptmmio.len = len;
667	pptmmio.hpa = hpa;
668
669	return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio));
670}
671
672int
673vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
674    uint64_t addr, uint64_t msg, int numvec)
675{
676	struct vm_pptdev_msi pptmsi;
677
678	bzero(&pptmsi, sizeof(pptmsi));
679	pptmsi.vcpu = vcpu;
680	pptmsi.bus = bus;
681	pptmsi.slot = slot;
682	pptmsi.func = func;
683	pptmsi.msg = msg;
684	pptmsi.addr = addr;
685	pptmsi.numvec = numvec;
686
687	return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi));
688}
689
690int
691vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
692    int idx, uint64_t addr, uint64_t msg, uint32_t vector_control)
693{
694	struct vm_pptdev_msix pptmsix;
695
696	bzero(&pptmsix, sizeof(pptmsix));
697	pptmsix.vcpu = vcpu;
698	pptmsix.bus = bus;
699	pptmsix.slot = slot;
700	pptmsix.func = func;
701	pptmsix.idx = idx;
702	pptmsix.msg = msg;
703	pptmsix.addr = addr;
704	pptmsix.vector_control = vector_control;
705
706	return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix);
707}
708
709uint64_t *
710vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv,
711	     int *ret_entries)
712{
713	int error;
714
715	static struct vm_stats vmstats;
716
717	vmstats.cpuid = vcpu;
718
719	error = ioctl(ctx->fd, VM_STATS, &vmstats);
720	if (error == 0) {
721		if (ret_entries)
722			*ret_entries = vmstats.num_entries;
723		if (ret_tv)
724			*ret_tv = vmstats.tv;
725		return (vmstats.statbuf);
726	} else
727		return (NULL);
728}
729
730const char *
731vm_get_stat_desc(struct vmctx *ctx, int index)
732{
733	static struct vm_stat_desc statdesc;
734
735	statdesc.index = index;
736	if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0)
737		return (statdesc.desc);
738	else
739		return (NULL);
740}
741
742int
743vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state)
744{
745	int error;
746	struct vm_x2apic x2apic;
747
748	bzero(&x2apic, sizeof(x2apic));
749	x2apic.cpuid = vcpu;
750
751	error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic);
752	*state = x2apic.state;
753	return (error);
754}
755
756int
757vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state)
758{
759	int error;
760	struct vm_x2apic x2apic;
761
762	bzero(&x2apic, sizeof(x2apic));
763	x2apic.cpuid = vcpu;
764	x2apic.state = state;
765
766	error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic);
767
768	return (error);
769}
770
771/*
772 * From Intel Vol 3a:
773 * Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT
774 */
775int
776vcpu_reset(struct vmctx *vmctx, int vcpu)
777{
778	int error;
779	uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx;
780	uint32_t desc_access, desc_limit;
781	uint16_t sel;
782
783	zero = 0;
784
785	rflags = 0x2;
786	error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags);
787	if (error)
788		goto done;
789
790	rip = 0xfff0;
791	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0)
792		goto done;
793
794	cr0 = CR0_NE;
795	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0)
796		goto done;
797
798	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0)
799		goto done;
800
801	cr4 = 0;
802	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0)
803		goto done;
804
805	/*
806	 * CS: present, r/w, accessed, 16-bit, byte granularity, usable
807	 */
808	desc_base = 0xffff0000;
809	desc_limit = 0xffff;
810	desc_access = 0x0093;
811	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS,
812			    desc_base, desc_limit, desc_access);
813	if (error)
814		goto done;
815
816	sel = 0xf000;
817	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0)
818		goto done;
819
820	/*
821	 * SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity
822	 */
823	desc_base = 0;
824	desc_limit = 0xffff;
825	desc_access = 0x0093;
826	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS,
827			    desc_base, desc_limit, desc_access);
828	if (error)
829		goto done;
830
831	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS,
832			    desc_base, desc_limit, desc_access);
833	if (error)
834		goto done;
835
836	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES,
837			    desc_base, desc_limit, desc_access);
838	if (error)
839		goto done;
840
841	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS,
842			    desc_base, desc_limit, desc_access);
843	if (error)
844		goto done;
845
846	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS,
847			    desc_base, desc_limit, desc_access);
848	if (error)
849		goto done;
850
851	sel = 0;
852	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0)
853		goto done;
854	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0)
855		goto done;
856	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0)
857		goto done;
858	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0)
859		goto done;
860	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0)
861		goto done;
862
863	/* General purpose registers */
864	rdx = 0xf00;
865	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0)
866		goto done;
867	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0)
868		goto done;
869	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0)
870		goto done;
871	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0)
872		goto done;
873	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0)
874		goto done;
875	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0)
876		goto done;
877	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0)
878		goto done;
879	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0)
880		goto done;
881
882	/* GDTR, IDTR */
883	desc_base = 0;
884	desc_limit = 0xffff;
885	desc_access = 0;
886	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR,
887			    desc_base, desc_limit, desc_access);
888	if (error != 0)
889		goto done;
890
891	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR,
892			    desc_base, desc_limit, desc_access);
893	if (error != 0)
894		goto done;
895
896	/* TR */
897	desc_base = 0;
898	desc_limit = 0xffff;
899	desc_access = 0x0000008b;
900	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access);
901	if (error)
902		goto done;
903
904	sel = 0;
905	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0)
906		goto done;
907
908	/* LDTR */
909	desc_base = 0;
910	desc_limit = 0xffff;
911	desc_access = 0x00000082;
912	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base,
913			    desc_limit, desc_access);
914	if (error)
915		goto done;
916
917	sel = 0;
918	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0)
919		goto done;
920
921	/* XXX cr2, debug registers */
922
923	error = 0;
924done:
925	return (error);
926}
927
928int
929vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num)
930{
931	int error, i;
932	struct vm_gpa_pte gpapte;
933
934	bzero(&gpapte, sizeof(gpapte));
935	gpapte.gpa = gpa;
936
937	error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte);
938
939	if (error == 0) {
940		*num = gpapte.ptenum;
941		for (i = 0; i < gpapte.ptenum; i++)
942			pte[i] = gpapte.pte[i];
943	}
944
945	return (error);
946}
947
948int
949vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities)
950{
951	int error;
952	struct vm_hpet_cap cap;
953
954	bzero(&cap, sizeof(struct vm_hpet_cap));
955	error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap);
956	if (capabilities != NULL)
957		*capabilities = cap.capabilities;
958	return (error);
959}
960
961static int
962gla2gpa(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
963    uint64_t gla, int prot, int *fault, uint64_t *gpa)
964{
965	struct vm_gla2gpa gg;
966	int error;
967
968	bzero(&gg, sizeof(struct vm_gla2gpa));
969	gg.vcpuid = vcpu;
970	gg.prot = prot;
971	gg.gla = gla;
972	gg.paging = *paging;
973
974	error = ioctl(ctx->fd, VM_GLA2GPA, &gg);
975	if (error == 0) {
976		*fault = gg.fault;
977		*gpa = gg.gpa;
978	}
979	return (error);
980}
981
982#ifndef min
983#define	min(a,b)	(((a) < (b)) ? (a) : (b))
984#endif
985
986int
987vm_copy_setup(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
988    uint64_t gla, size_t len, int prot, struct iovec *iov, int iovcnt)
989{
990	void *va;
991	uint64_t gpa;
992	int error, fault, i, n, off;
993
994	for (i = 0; i < iovcnt; i++) {
995		iov[i].iov_base = 0;
996		iov[i].iov_len = 0;
997	}
998
999	while (len) {
1000		assert(iovcnt > 0);
1001		error = gla2gpa(ctx, vcpu, paging, gla, prot, &fault, &gpa);
1002		if (error)
1003			return (-1);
1004		if (fault)
1005			return (1);
1006
1007		off = gpa & PAGE_MASK;
1008		n = min(len, PAGE_SIZE - off);
1009
1010		va = vm_map_gpa(ctx, gpa, n);
1011		if (va == NULL)
1012			return (-1);
1013
1014		iov->iov_base = va;
1015		iov->iov_len = n;
1016		iov++;
1017		iovcnt--;
1018
1019		gla += n;
1020		len -= n;
1021	}
1022	return (0);
1023}
1024
1025void
1026vm_copy_teardown(struct vmctx *ctx, int vcpu, struct iovec *iov, int iovcnt)
1027{
1028
1029	return;
1030}
1031
1032void
1033vm_copyin(struct vmctx *ctx, int vcpu, struct iovec *iov, void *vp, size_t len)
1034{
1035	const char *src;
1036	char *dst;
1037	size_t n;
1038
1039	dst = vp;
1040	while (len) {
1041		assert(iov->iov_len);
1042		n = min(len, iov->iov_len);
1043		src = iov->iov_base;
1044		bcopy(src, dst, n);
1045
1046		iov++;
1047		dst += n;
1048		len -= n;
1049	}
1050}
1051
1052void
1053vm_copyout(struct vmctx *ctx, int vcpu, const void *vp, struct iovec *iov,
1054    size_t len)
1055{
1056	const char *src;
1057	char *dst;
1058	size_t n;
1059
1060	src = vp;
1061	while (len) {
1062		assert(iov->iov_len);
1063		n = min(len, iov->iov_len);
1064		dst = iov->iov_base;
1065		bcopy(src, dst, n);
1066
1067		iov++;
1068		src += n;
1069		len -= n;
1070	}
1071}
1072
1073static int
1074vm_get_cpus(struct vmctx *ctx, int which, cpuset_t *cpus)
1075{
1076	struct vm_cpuset vm_cpuset;
1077	int error;
1078
1079	bzero(&vm_cpuset, sizeof(struct vm_cpuset));
1080	vm_cpuset.which = which;
1081	vm_cpuset.cpusetsize = sizeof(cpuset_t);
1082	vm_cpuset.cpus = cpus;
1083
1084	error = ioctl(ctx->fd, VM_GET_CPUS, &vm_cpuset);
1085	return (error);
1086}
1087
1088int
1089vm_active_cpus(struct vmctx *ctx, cpuset_t *cpus)
1090{
1091
1092	return (vm_get_cpus(ctx, VM_ACTIVE_CPUS, cpus));
1093}
1094
1095int
1096vm_suspended_cpus(struct vmctx *ctx, cpuset_t *cpus)
1097{
1098
1099	return (vm_get_cpus(ctx, VM_SUSPENDED_CPUS, cpus));
1100}
1101
1102int
1103vm_activate_cpu(struct vmctx *ctx, int vcpu)
1104{
1105	struct vm_activate_cpu ac;
1106	int error;
1107
1108	bzero(&ac, sizeof(struct vm_activate_cpu));
1109	ac.vcpuid = vcpu;
1110	error = ioctl(ctx->fd, VM_ACTIVATE_CPU, &ac);
1111	return (error);
1112}
1113
1114int
1115vm_get_intinfo(struct vmctx *ctx, int vcpu, uint64_t *info1, uint64_t *info2)
1116{
1117	struct vm_intinfo vmii;
1118	int error;
1119
1120	bzero(&vmii, sizeof(struct vm_intinfo));
1121	vmii.vcpuid = vcpu;
1122	error = ioctl(ctx->fd, VM_GET_INTINFO, &vmii);
1123	if (error == 0) {
1124		*info1 = vmii.info1;
1125		*info2 = vmii.info2;
1126	}
1127	return (error);
1128}
1129
1130int
1131vm_set_intinfo(struct vmctx *ctx, int vcpu, uint64_t info1)
1132{
1133	struct vm_intinfo vmii;
1134	int error;
1135
1136	bzero(&vmii, sizeof(struct vm_intinfo));
1137	vmii.vcpuid = vcpu;
1138	vmii.info1 = info1;
1139	error = ioctl(ctx->fd, VM_SET_INTINFO, &vmii);
1140	return (error);
1141}
1142
1143int
1144vm_rtc_write(struct vmctx *ctx, int offset, uint8_t value)
1145{
1146	struct vm_rtc_data rtcdata;
1147	int error;
1148
1149	bzero(&rtcdata, sizeof(struct vm_rtc_data));
1150	rtcdata.offset = offset;
1151	rtcdata.value = value;
1152	error = ioctl(ctx->fd, VM_RTC_WRITE, &rtcdata);
1153	return (error);
1154}
1155
1156int
1157vm_rtc_read(struct vmctx *ctx, int offset, uint8_t *retval)
1158{
1159	struct vm_rtc_data rtcdata;
1160	int error;
1161
1162	bzero(&rtcdata, sizeof(struct vm_rtc_data));
1163	rtcdata.offset = offset;
1164	error = ioctl(ctx->fd, VM_RTC_READ, &rtcdata);
1165	if (error == 0)
1166		*retval = rtcdata.value;
1167	return (error);
1168}
1169
1170int
1171vm_rtc_settime(struct vmctx *ctx, time_t secs)
1172{
1173	struct vm_rtc_time rtctime;
1174	int error;
1175
1176	bzero(&rtctime, sizeof(struct vm_rtc_time));
1177	rtctime.secs = secs;
1178	error = ioctl(ctx->fd, VM_RTC_SETTIME, &rtctime);
1179	return (error);
1180}
1181
1182int
1183vm_rtc_gettime(struct vmctx *ctx, time_t *secs)
1184{
1185	struct vm_rtc_time rtctime;
1186	int error;
1187
1188	bzero(&rtctime, sizeof(struct vm_rtc_time));
1189	error = ioctl(ctx->fd, VM_RTC_GETTIME, &rtctime);
1190	if (error == 0)
1191		*secs = rtctime.secs;
1192	return (error);
1193}
1194
1195int
1196vm_restart_instruction(void *arg, int vcpu)
1197{
1198	struct vmctx *ctx = arg;
1199
1200	return (ioctl(ctx->fd, VM_RESTART_INSTRUCTION, &vcpu));
1201}
1202