RegisterInfos_x86_64.h revision 263363
1//===-- RegisterInfos_x86_64.h ---------------------------------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===---------------------------------------------------------------------===// 9#include "llvm/Support/Compiler.h" 10 11// Computes the offset of the given GPR in the user data area. 12#define GPR_OFFSET(regname) \ 13 (LLVM_EXTENSION offsetof(GPR, regname)) 14 15// Computes the offset of the given FPR in the extended data area. 16#define FPR_OFFSET(regname) \ 17 (LLVM_EXTENSION offsetof(FPR, xstate) + \ 18 LLVM_EXTENSION offsetof(FXSAVE, regname)) 19 20// Computes the offset of the YMM register assembled from register halves. 21#define YMM_OFFSET(regname) \ 22 (LLVM_EXTENSION offsetof(YMM, regname)) 23 24#ifdef DECLARE_REGISTER_INFOS_X86_64_STRUCT 25 26// Number of bytes needed to represent a FPR. 27#define FPR_SIZE(reg) sizeof(((FXSAVE*)NULL)->reg) 28 29// Number of bytes needed to represent the i'th FP register. 30#define FP_SIZE sizeof(((MMSReg*)NULL)->bytes) 31 32// Number of bytes needed to represent an XMM register. 33#define XMM_SIZE sizeof(XMMReg) 34 35// Number of bytes needed to represent a YMM register. 36#define YMM_SIZE sizeof(YMMReg) 37 38// RegisterKind: GCC, DWARF, Generic, GDB, LLDB 39 40// Note that the size and offset will be updated by platform-specific classes. 41#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \ 42 { #reg, alt, sizeof(GPR::reg), GPR_OFFSET(reg), eEncodingUint, \ 43 eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_x86_64 }, NULL, NULL } 44 45#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \ 46 { #name, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, \ 47 eFormatHex, { kind1, kind2, kind3, kind4, fpu_##name##_x86_64 }, NULL, NULL } 48 49#define DEFINE_FP_ST(reg, i) \ 50 { #reg#i, NULL, FP_SIZE, LLVM_EXTENSION FPR_OFFSET(stmm[i]), \ 51 eEncodingVector, eFormatVectorOfUInt8, \ 52 { gcc_dwarf_st##i##_x86_64, gcc_dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, gdb_st##i##_x86_64, fpu_st##i##_x86_64 }, \ 53 NULL, NULL } 54 55#define DEFINE_FP_MM(reg, i) \ 56 { #reg#i, NULL, sizeof(uint64_t), LLVM_EXTENSION FPR_OFFSET(stmm[i]), \ 57 eEncodingUint, eFormatHex, \ 58 { gcc_dwarf_mm##i##_x86_64, gcc_dwarf_mm##i##_x86_64, LLDB_INVALID_REGNUM, gdb_st##i##_x86_64, fpu_mm##i##_x86_64 }, \ 59 NULL, NULL } 60 61#define DEFINE_XMM(reg, i) \ 62 { #reg#i, NULL, XMM_SIZE, LLVM_EXTENSION FPR_OFFSET(reg[i]), \ 63 eEncodingVector, eFormatVectorOfUInt8, \ 64 { gcc_dwarf_##reg##i##_x86_64, gcc_dwarf_##reg##i##_x86_64, LLDB_INVALID_REGNUM, gdb_##reg##i##_x86_64, fpu_##reg##i##_x86_64}, \ 65 NULL, NULL } 66 67#define DEFINE_YMM(reg, i) \ 68 { #reg#i, NULL, YMM_SIZE, LLVM_EXTENSION YMM_OFFSET(reg[i]), \ 69 eEncodingVector, eFormatVectorOfUInt8, \ 70 { gcc_dwarf_##reg##i##h_x86_64, gcc_dwarf_##reg##i##h_x86_64, LLDB_INVALID_REGNUM, gdb_##reg##i##h_x86_64, fpu_##reg##i##_x86_64 }, \ 71 NULL, NULL } 72 73#define DEFINE_DR(reg, i) \ 74 { #reg#i, NULL, DR_SIZE, DR_OFFSET(i), eEncodingUint, eFormatHex, \ 75 { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 76 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL } 77 78#define DEFINE_GPR_PSEUDO_32(reg32, reg64) \ 79 { #reg32, NULL, 4, GPR_OFFSET(reg64), eEncodingUint, \ 80 eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_##reg32##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 } 81#define DEFINE_GPR_PSEUDO_16(reg16, reg64) \ 82 { #reg16, NULL, 2, GPR_OFFSET(reg64), eEncodingUint, \ 83 eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_##reg16##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 } 84#define DEFINE_GPR_PSEUDO_8H(reg8, reg64) \ 85 { #reg8, NULL, 1, GPR_OFFSET(reg64)+1, eEncodingUint, \ 86 eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 } 87#define DEFINE_GPR_PSEUDO_8L(reg8, reg64) \ 88 { #reg8, NULL, 1, GPR_OFFSET(reg64), eEncodingUint, \ 89 eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 } 90 91static RegisterInfo 92g_register_infos_x86_64[] = 93{ 94 // General purpose registers. GCC, DWARF, Generic, GDB 95 DEFINE_GPR(rax, NULL, gcc_dwarf_rax_x86_64, gcc_dwarf_rax_x86_64, LLDB_INVALID_REGNUM, gdb_rax_x86_64), 96 DEFINE_GPR(rbx, NULL, gcc_dwarf_rbx_x86_64, gcc_dwarf_rbx_x86_64, LLDB_INVALID_REGNUM, gdb_rbx_x86_64), 97 DEFINE_GPR(rcx, "arg4", gcc_dwarf_rcx_x86_64, gcc_dwarf_rcx_x86_64, LLDB_INVALID_REGNUM, gdb_rcx_x86_64), 98 DEFINE_GPR(rdx, "arg3", gcc_dwarf_rdx_x86_64, gcc_dwarf_rdx_x86_64, LLDB_INVALID_REGNUM, gdb_rdx_x86_64), 99 DEFINE_GPR(rdi, "arg1", gcc_dwarf_rdi_x86_64, gcc_dwarf_rdi_x86_64, LLDB_INVALID_REGNUM, gdb_rdi_x86_64), 100 DEFINE_GPR(rsi, "arg2", gcc_dwarf_rsi_x86_64, gcc_dwarf_rsi_x86_64, LLDB_INVALID_REGNUM, gdb_rsi_x86_64), 101 DEFINE_GPR(rbp, "fp", gcc_dwarf_rbp_x86_64, gcc_dwarf_rbp_x86_64, LLDB_REGNUM_GENERIC_FP, gdb_rbp_x86_64), 102 DEFINE_GPR(rsp, "sp", gcc_dwarf_rsp_x86_64, gcc_dwarf_rsp_x86_64, LLDB_REGNUM_GENERIC_SP, gdb_rsp_x86_64), 103 DEFINE_GPR(r8, "arg5", gcc_dwarf_r8_x86_64, gcc_dwarf_r8_x86_64, LLDB_INVALID_REGNUM, gdb_r8_x86_64), 104 DEFINE_GPR(r9, "arg6", gcc_dwarf_r9_x86_64, gcc_dwarf_r9_x86_64, LLDB_INVALID_REGNUM, gdb_r9_x86_64), 105 DEFINE_GPR(r10, NULL, gcc_dwarf_r10_x86_64, gcc_dwarf_r10_x86_64, LLDB_INVALID_REGNUM, gdb_r10_x86_64), 106 DEFINE_GPR(r11, NULL, gcc_dwarf_r11_x86_64, gcc_dwarf_r11_x86_64, LLDB_INVALID_REGNUM, gdb_r11_x86_64), 107 DEFINE_GPR(r12, NULL, gcc_dwarf_r12_x86_64, gcc_dwarf_r12_x86_64, LLDB_INVALID_REGNUM, gdb_r12_x86_64), 108 DEFINE_GPR(r13, NULL, gcc_dwarf_r13_x86_64, gcc_dwarf_r13_x86_64, LLDB_INVALID_REGNUM, gdb_r13_x86_64), 109 DEFINE_GPR(r14, NULL, gcc_dwarf_r14_x86_64, gcc_dwarf_r14_x86_64, LLDB_INVALID_REGNUM, gdb_r14_x86_64), 110 DEFINE_GPR(r15, NULL, gcc_dwarf_r15_x86_64, gcc_dwarf_r15_x86_64, LLDB_INVALID_REGNUM, gdb_r15_x86_64), 111 DEFINE_GPR(rip, "pc", gcc_dwarf_rip_x86_64, gcc_dwarf_rip_x86_64, LLDB_REGNUM_GENERIC_PC, gdb_rip_x86_64), 112 DEFINE_GPR(rflags, "flags", gcc_dwarf_rflags_x86_64, gcc_dwarf_rflags_x86_64, LLDB_REGNUM_GENERIC_FLAGS, gdb_rflags_x86_64), 113 DEFINE_GPR(cs, NULL, gcc_dwarf_cs_x86_64, gcc_dwarf_cs_x86_64, LLDB_INVALID_REGNUM, gdb_cs_x86_64), 114 DEFINE_GPR(fs, NULL, gcc_dwarf_fs_x86_64, gcc_dwarf_fs_x86_64, LLDB_INVALID_REGNUM, gdb_fs_x86_64), 115 DEFINE_GPR(gs, NULL, gcc_dwarf_gs_x86_64, gcc_dwarf_gs_x86_64, LLDB_INVALID_REGNUM, gdb_gs_x86_64), 116 DEFINE_GPR(ss, NULL, gcc_dwarf_ss_x86_64, gcc_dwarf_ss_x86_64, LLDB_INVALID_REGNUM, gdb_ss_x86_64), 117 DEFINE_GPR(ds, NULL, gcc_dwarf_ds_x86_64, gcc_dwarf_ds_x86_64, LLDB_INVALID_REGNUM, gdb_ds_x86_64), 118 DEFINE_GPR(es, NULL, gcc_dwarf_es_x86_64, gcc_dwarf_es_x86_64, LLDB_INVALID_REGNUM, gdb_es_x86_64), 119 120 DEFINE_GPR_PSEUDO_32(eax, rax), 121 DEFINE_GPR_PSEUDO_32(ebx, rbx), 122 DEFINE_GPR_PSEUDO_32(ecx, rcx), 123 DEFINE_GPR_PSEUDO_32(edx, rdx), 124 DEFINE_GPR_PSEUDO_32(edi, rdi), 125 DEFINE_GPR_PSEUDO_32(esi, rsi), 126 DEFINE_GPR_PSEUDO_32(ebp, rbp), 127 DEFINE_GPR_PSEUDO_32(esp, rsp), 128 DEFINE_GPR_PSEUDO_32(r8d, r8), 129 DEFINE_GPR_PSEUDO_32(r9d, r9), 130 DEFINE_GPR_PSEUDO_32(r10d, r10), 131 DEFINE_GPR_PSEUDO_32(r11d, r11), 132 DEFINE_GPR_PSEUDO_32(r12d, r12), 133 DEFINE_GPR_PSEUDO_32(r13d, r13), 134 DEFINE_GPR_PSEUDO_32(r14d, r14), 135 DEFINE_GPR_PSEUDO_32(r15d, r15), 136 DEFINE_GPR_PSEUDO_16(ax, rax), 137 DEFINE_GPR_PSEUDO_16(bx, rbx), 138 DEFINE_GPR_PSEUDO_16(cx, rcx), 139 DEFINE_GPR_PSEUDO_16(dx, rdx), 140 DEFINE_GPR_PSEUDO_16(di, rdi), 141 DEFINE_GPR_PSEUDO_16(si, rsi), 142 DEFINE_GPR_PSEUDO_16(bp, rbp), 143 DEFINE_GPR_PSEUDO_16(sp, rsp), 144 DEFINE_GPR_PSEUDO_16(r8w, r8), 145 DEFINE_GPR_PSEUDO_16(r9w, r9), 146 DEFINE_GPR_PSEUDO_16(r10w, r10), 147 DEFINE_GPR_PSEUDO_16(r11w, r11), 148 DEFINE_GPR_PSEUDO_16(r12w, r12), 149 DEFINE_GPR_PSEUDO_16(r13w, r13), 150 DEFINE_GPR_PSEUDO_16(r14w, r14), 151 DEFINE_GPR_PSEUDO_16(r15w, r15), 152 DEFINE_GPR_PSEUDO_8H(ah, rax), 153 DEFINE_GPR_PSEUDO_8H(bh, rbx), 154 DEFINE_GPR_PSEUDO_8H(ch, rcx), 155 DEFINE_GPR_PSEUDO_8H(dh, rdx), 156 DEFINE_GPR_PSEUDO_8L(al, rax), 157 DEFINE_GPR_PSEUDO_8L(bl, rbx), 158 DEFINE_GPR_PSEUDO_8L(cl, rcx), 159 DEFINE_GPR_PSEUDO_8L(dl, rdx), 160 DEFINE_GPR_PSEUDO_8L(dil, rdi), 161 DEFINE_GPR_PSEUDO_8L(sil, rsi), 162 DEFINE_GPR_PSEUDO_8L(bpl, rbp), 163 DEFINE_GPR_PSEUDO_8L(spl, rsp), 164 DEFINE_GPR_PSEUDO_8L(r8l, r8), 165 DEFINE_GPR_PSEUDO_8L(r9l, r9), 166 DEFINE_GPR_PSEUDO_8L(r10l, r10), 167 DEFINE_GPR_PSEUDO_8L(r11l, r11), 168 DEFINE_GPR_PSEUDO_8L(r12l, r12), 169 DEFINE_GPR_PSEUDO_8L(r13l, r13), 170 DEFINE_GPR_PSEUDO_8L(r14l, r14), 171 DEFINE_GPR_PSEUDO_8L(r15l, r15), 172 173 // i387 Floating point registers. GCC, DWARF, Generic, GDB 174 DEFINE_FPR(fctrl, fctrl, gcc_dwarf_fctrl_x86_64, gcc_dwarf_fctrl_x86_64, LLDB_INVALID_REGNUM, gdb_fctrl_x86_64), 175 DEFINE_FPR(fstat, fstat, gcc_dwarf_fstat_x86_64, gcc_dwarf_fstat_x86_64, LLDB_INVALID_REGNUM, gdb_fstat_x86_64), 176 DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_ftag_x86_64), 177 DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fop_x86_64), 178 DEFINE_FPR(fiseg, ptr.i386.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fiseg_x86_64), 179 DEFINE_FPR(fioff, ptr.i386.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fioff_x86_64), 180 DEFINE_FPR(foseg, ptr.i386.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_foseg_x86_64), 181 DEFINE_FPR(fooff, ptr.i386.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fooff_x86_64), 182 DEFINE_FPR(mxcsr, mxcsr, gcc_dwarf_mxcsr_x86_64, gcc_dwarf_mxcsr_x86_64, LLDB_INVALID_REGNUM, gdb_mxcsr_x86_64), 183 DEFINE_FPR(mxcsrmask, mxcsrmask, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 184 185 // FP registers. 186 DEFINE_FP_ST(st, 0), 187 DEFINE_FP_ST(st, 1), 188 DEFINE_FP_ST(st, 2), 189 DEFINE_FP_ST(st, 3), 190 DEFINE_FP_ST(st, 4), 191 DEFINE_FP_ST(st, 5), 192 DEFINE_FP_ST(st, 6), 193 DEFINE_FP_ST(st, 7), 194 DEFINE_FP_MM(mm, 0), 195 DEFINE_FP_MM(mm, 1), 196 DEFINE_FP_MM(mm, 2), 197 DEFINE_FP_MM(mm, 3), 198 DEFINE_FP_MM(mm, 4), 199 DEFINE_FP_MM(mm, 5), 200 DEFINE_FP_MM(mm, 6), 201 DEFINE_FP_MM(mm, 7), 202 203 // XMM registers 204 DEFINE_XMM(xmm, 0), 205 DEFINE_XMM(xmm, 1), 206 DEFINE_XMM(xmm, 2), 207 DEFINE_XMM(xmm, 3), 208 DEFINE_XMM(xmm, 4), 209 DEFINE_XMM(xmm, 5), 210 DEFINE_XMM(xmm, 6), 211 DEFINE_XMM(xmm, 7), 212 DEFINE_XMM(xmm, 8), 213 DEFINE_XMM(xmm, 9), 214 DEFINE_XMM(xmm, 10), 215 DEFINE_XMM(xmm, 11), 216 DEFINE_XMM(xmm, 12), 217 DEFINE_XMM(xmm, 13), 218 DEFINE_XMM(xmm, 14), 219 DEFINE_XMM(xmm, 15), 220 221 // Copy of YMM registers assembled from xmm and ymmh 222 DEFINE_YMM(ymm, 0), 223 DEFINE_YMM(ymm, 1), 224 DEFINE_YMM(ymm, 2), 225 DEFINE_YMM(ymm, 3), 226 DEFINE_YMM(ymm, 4), 227 DEFINE_YMM(ymm, 5), 228 DEFINE_YMM(ymm, 6), 229 DEFINE_YMM(ymm, 7), 230 DEFINE_YMM(ymm, 8), 231 DEFINE_YMM(ymm, 9), 232 DEFINE_YMM(ymm, 10), 233 DEFINE_YMM(ymm, 11), 234 DEFINE_YMM(ymm, 12), 235 DEFINE_YMM(ymm, 13), 236 DEFINE_YMM(ymm, 14), 237 DEFINE_YMM(ymm, 15), 238 239 // Debug registers for lldb internal use 240 DEFINE_DR(dr, 0), 241 DEFINE_DR(dr, 1), 242 DEFINE_DR(dr, 2), 243 DEFINE_DR(dr, 3), 244 DEFINE_DR(dr, 4), 245 DEFINE_DR(dr, 5), 246 DEFINE_DR(dr, 6), 247 DEFINE_DR(dr, 7) 248}; 249static_assert((sizeof(g_register_infos_x86_64) / sizeof(g_register_infos_x86_64[0])) == k_num_registers_x86_64, 250 "g_register_infos_x86_64 has wrong number of register infos"); 251 252#undef FPR_SIZE 253#undef FP_SIZE 254#undef XMM_SIZE 255#undef YMM_SIZE 256#undef DEFINE_GPR 257#undef DEFINE_FPR 258#undef DEFINE_FP 259#undef DEFINE_XMM 260#undef DEFINE_YMM 261#undef DEFINE_DR 262#undef DEFINE_GPR_PSEUDO_32 263#undef DEFINE_GPR_PSEUDO_16 264#undef DEFINE_GPR_PSEUDO_8H 265#undef DEFINE_GPR_PSEUDO_8L 266 267#endif // DECLARE_REGISTER_INFOS_X86_64_STRUCT 268 269 270#ifdef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS 271 272#define UPDATE_GPR_INFO(reg, reg64) \ 273do { \ 274 g_register_infos[gpr_##reg##_i386].byte_offset = GPR_OFFSET(reg64); \ 275} while(false); 276 277#define UPDATE_GPR_INFO_8H(reg, reg64) \ 278do { \ 279 g_register_infos[gpr_##reg##_i386].byte_offset = GPR_OFFSET(reg64) + 1; \ 280} while(false); 281 282#define UPDATE_FPR_INFO(reg, reg64) \ 283do { \ 284 g_register_infos[fpu_##reg##_i386].byte_offset = FPR_OFFSET(reg64); \ 285} while(false); 286 287#define UPDATE_FP_INFO(reg, i) \ 288do { \ 289 g_register_infos[fpu_##reg##i##_i386].byte_offset = FPR_OFFSET(stmm[i]); \ 290} while(false); 291 292#define UPDATE_XMM_INFO(reg, i) \ 293do { \ 294 g_register_infos[fpu_##reg##i##_i386].byte_offset = FPR_OFFSET(reg[i]); \ 295} while(false); 296 297#define UPDATE_YMM_INFO(reg, i) \ 298do { \ 299 g_register_infos[fpu_##reg##i##_i386].byte_offset = YMM_OFFSET(reg[i]); \ 300} while(false); 301 302#define UPDATE_DR_INFO(reg_index) \ 303do { \ 304 g_register_infos[dr##reg_index##_i386].byte_offset = DR_OFFSET(reg_index); \ 305} while(false); 306 307 // Update the register offsets 308 UPDATE_GPR_INFO(eax, rax); 309 UPDATE_GPR_INFO(ebx, rbx); 310 UPDATE_GPR_INFO(ecx, rcx); 311 UPDATE_GPR_INFO(edx, rdx); 312 UPDATE_GPR_INFO(edi, rdi); 313 UPDATE_GPR_INFO(esi, rsi); 314 UPDATE_GPR_INFO(ebp, rbp); 315 UPDATE_GPR_INFO(esp, rsp); 316 UPDATE_GPR_INFO(eip, rip); 317 UPDATE_GPR_INFO(eflags, rflags); 318 UPDATE_GPR_INFO(cs, cs); 319 UPDATE_GPR_INFO(fs, fs); 320 UPDATE_GPR_INFO(gs, gs); 321 UPDATE_GPR_INFO(ss, ss); 322 UPDATE_GPR_INFO(ds, ds); 323 UPDATE_GPR_INFO(es, es); 324 325 UPDATE_GPR_INFO(ax, rax); 326 UPDATE_GPR_INFO(bx, rbx); 327 UPDATE_GPR_INFO(cx, rcx); 328 UPDATE_GPR_INFO(dx, rdx); 329 UPDATE_GPR_INFO(di, rdi); 330 UPDATE_GPR_INFO(si, rsi); 331 UPDATE_GPR_INFO(bp, rbp); 332 UPDATE_GPR_INFO(sp, rsp); 333 UPDATE_GPR_INFO_8H(ah, rax); 334 UPDATE_GPR_INFO_8H(bh, rbx); 335 UPDATE_GPR_INFO_8H(ch, rcx); 336 UPDATE_GPR_INFO_8H(dh, rdx); 337 UPDATE_GPR_INFO(al, rax); 338 UPDATE_GPR_INFO(bl, rbx); 339 UPDATE_GPR_INFO(cl, rcx); 340 UPDATE_GPR_INFO(dl, rdx); 341 342 UPDATE_FPR_INFO(fctrl, fctrl); 343 UPDATE_FPR_INFO(fstat, fstat); 344 UPDATE_FPR_INFO(ftag, ftag); 345 UPDATE_FPR_INFO(fop, fop); 346 UPDATE_FPR_INFO(fiseg, ptr.i386.fiseg); 347 UPDATE_FPR_INFO(fioff, ptr.i386.fioff); 348 UPDATE_FPR_INFO(fooff, ptr.i386.fooff); 349 UPDATE_FPR_INFO(foseg, ptr.i386.foseg); 350 UPDATE_FPR_INFO(mxcsr, mxcsr); 351 UPDATE_FPR_INFO(mxcsrmask, mxcsrmask); 352 353 UPDATE_FP_INFO(st, 0); 354 UPDATE_FP_INFO(st, 1); 355 UPDATE_FP_INFO(st, 2); 356 UPDATE_FP_INFO(st, 3); 357 UPDATE_FP_INFO(st, 4); 358 UPDATE_FP_INFO(st, 5); 359 UPDATE_FP_INFO(st, 6); 360 UPDATE_FP_INFO(st, 7); 361 UPDATE_FP_INFO(mm, 0); 362 UPDATE_FP_INFO(mm, 1); 363 UPDATE_FP_INFO(mm, 2); 364 UPDATE_FP_INFO(mm, 3); 365 UPDATE_FP_INFO(mm, 4); 366 UPDATE_FP_INFO(mm, 5); 367 UPDATE_FP_INFO(mm, 6); 368 UPDATE_FP_INFO(mm, 7); 369 370 UPDATE_XMM_INFO(xmm, 0); 371 UPDATE_XMM_INFO(xmm, 1); 372 UPDATE_XMM_INFO(xmm, 2); 373 UPDATE_XMM_INFO(xmm, 3); 374 UPDATE_XMM_INFO(xmm, 4); 375 UPDATE_XMM_INFO(xmm, 5); 376 UPDATE_XMM_INFO(xmm, 6); 377 UPDATE_XMM_INFO(xmm, 7); 378 379 UPDATE_YMM_INFO(ymm, 0); 380 UPDATE_YMM_INFO(ymm, 1); 381 UPDATE_YMM_INFO(ymm, 2); 382 UPDATE_YMM_INFO(ymm, 3); 383 UPDATE_YMM_INFO(ymm, 4); 384 UPDATE_YMM_INFO(ymm, 5); 385 UPDATE_YMM_INFO(ymm, 6); 386 UPDATE_YMM_INFO(ymm, 7); 387 388 UPDATE_DR_INFO(0); 389 UPDATE_DR_INFO(1); 390 UPDATE_DR_INFO(2); 391 UPDATE_DR_INFO(3); 392 UPDATE_DR_INFO(4); 393 UPDATE_DR_INFO(5); 394 UPDATE_DR_INFO(6); 395 UPDATE_DR_INFO(7); 396 397#undef UPDATE_GPR_INFO 398#undef UPDATE_GPR_INFO_8H 399#undef UPDATE_FPR_INFO 400#undef UPDATE_FP_INFO 401#undef UPDATE_XMM_INFO 402#undef UPDATE_YMM_INFO 403#undef UPDATE_DR_INFO 404 405#endif // UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS 406 407#undef GPR_OFFSET 408#undef FPR_OFFSET 409#undef YMM_OFFSET 410