patch-r262261-llvm-r200130-sparc.diff revision 269012
1251881SpeterPull in r200130 from upstream llvm trunk (by Jakob Stoklund Olesen): 2251881Speter 3251881Speter Fix swapped CASA operands. 4251881Speter 5251881Speter Found by SingleSource/UnitTests/AtomicOps.c 6251881Speter 7251881SpeterIntroduced here: http://svnweb.freebsd.org/changeset/base/262261 8251881Speter 9251881SpeterIndex: lib/Target/Sparc/SparcISelLowering.cpp 10251881Speter=================================================================== 11251881Speter--- lib/Target/Sparc/SparcISelLowering.cpp 12251881Speter+++ lib/Target/Sparc/SparcISelLowering.cpp 13251881Speter@@ -2972,7 +2972,7 @@ SparcTargetLowering::expandAtomicRMW(MachineInstr 14251881Speter // loop: 15251881Speter // %val = phi %val0, %dest 16251881Speter // %upd = op %val, %rs2 17251881Speter- // %dest = cas %addr, %upd, %val 18251881Speter+ // %dest = cas %addr, %val, %upd 19251881Speter // cmp %val, %dest 20251881Speter // bne loop 21251881Speter // done: 22251881Speter@@ -3031,7 +3031,7 @@ SparcTargetLowering::expandAtomicRMW(MachineInstr 23251881Speter } 24251881Speter 25251881Speter BuildMI(LoopMBB, DL, TII.get(is64Bit ? SP::CASXrr : SP::CASrr), DestReg) 26251881Speter- .addReg(AddrReg).addReg(UpdReg).addReg(ValReg) 27251881Speter+ .addReg(AddrReg).addReg(ValReg).addReg(UpdReg) 28251881Speter .setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); 29251881Speter BuildMI(LoopMBB, DL, TII.get(SP::CMPrr)).addReg(ValReg).addReg(DestReg); 30251881Speter BuildMI(LoopMBB, DL, TII.get(is64Bit ? SP::BPXCC : SP::BCOND)) 31251881SpeterIndex: test/CodeGen/SPARC/atomics.ll 32299742Sdim=================================================================== 33299742Sdim--- test/CodeGen/SPARC/atomics.ll 34251881Speter+++ test/CodeGen/SPARC/atomics.ll 35251881Speter@@ -64,8 +64,8 @@ entry: 36251881Speter 37251881Speter ; CHECK-LABEL: test_load_add_32 38251881Speter ; CHECK: membar 39251881Speter-; CHECK: add 40251881Speter-; CHECK: cas [%o0] 41251881Speter+; CHECK: add [[V:%[gilo][0-7]]], %o1, [[U:%[gilo][0-7]]] 42251881Speter+; CHECK: cas [%o0], [[V]], [[U]] 43251881Speter ; CHECK: membar 44251881Speter define zeroext i32 @test_load_add_32(i32* %p, i32 zeroext %v) { 45299742Sdim entry: 46251881Speter