patch-r262261-llvm-r199014-sparc.diff revision 269012 
1Pull in r199014 from upstream llvm trunk (by Venkatraman Govindaraju):
2
3  [Sparc] Bundle instruction with delay slow and its filler. Now, we can use -verify-machineinstrs with SPARC backend.
4
5Introduced here: http://svnweb.freebsd.org/changeset/base/262261
6
7Index: lib/Target/Sparc/DelaySlotFiller.cpp
8===================================================================
9--- lib/Target/Sparc/DelaySlotFiller.cpp
10+++ lib/Target/Sparc/DelaySlotFiller.cpp
11@@ -19,6 +19,7 @@
12 #include "llvm/ADT/Statistic.h"
13 #include "llvm/CodeGen/MachineFunctionPass.h"
14 #include "llvm/CodeGen/MachineInstrBuilder.h"
15+#include "llvm/CodeGen/MachineRegisterInfo.h"
16 #include "llvm/Support/CommandLine.h"
17 #include "llvm/Target/TargetInstrInfo.h"
18 #include "llvm/Target/TargetMachine.h"
19@@ -55,6 +56,11 @@ namespace {
20     bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
21     bool runOnMachineFunction(MachineFunction &F) {
22       bool Changed = false;
23+
24+      // This pass invalidates liveness information when it reorders
25+      // instructions to fill delay slot.
26+      F.getRegInfo().invalidateLiveness();
27+
28       for (MachineFunction::iterator FI = F.begin(), FE = F.end();
29            FI != FE; ++FI)
30         Changed |= runOnMachineBasicBlock(*FI);
31@@ -61,9 +67,6 @@ namespace {
32       return Changed;
33     }
34 
35-    bool isDelayFiller(MachineBasicBlock &MBB,
36-                       MachineBasicBlock::iterator candidate);
37-
38     void insertCallDefsUses(MachineBasicBlock::iterator MI,
39                             SmallSet<unsigned, 32>& RegDefs,
40                             SmallSet<unsigned, 32>& RegUses);
41@@ -152,6 +155,10 @@ bool Filler::runOnMachineBasicBlock(MachineBasicBl
42       assert (J != MBB.end() && "MI needs a delay instruction.");
43       BuildMI(MBB, ++J, MI->getDebugLoc(),
44               TII->get(SP::UNIMP)).addImm(structSize);
45+      // Bundle the delay filler and unimp with the instruction.
46+      MIBundleBuilder(MBB, MachineBasicBlock::iterator(MI), J);
47+    } else {
48+      MIBundleBuilder(MBB, MachineBasicBlock::iterator(MI), I);
49     }
50   }
51   return Changed;
52@@ -209,7 +216,7 @@ Filler::findDelayInstr(MachineBasicBlock &MBB,
53         || I->isInlineAsm()
54         || I->isLabel()
55         || I->hasDelaySlot()
56-        || isDelayFiller(MBB, I))
57+        || I->isBundledWithSucc())
58       break;
59 
60     if (delayHasHazard(I, sawLoad, sawStore, RegDefs, RegUses)) {
61@@ -332,18 +339,6 @@ bool Filler::IsRegInSet(SmallSet<unsigned, 32>& Re
62   return false;
63 }
64 
65-// return true if the candidate is a delay filler.
66-bool Filler::isDelayFiller(MachineBasicBlock &MBB,
67-                           MachineBasicBlock::iterator candidate)
68-{
69-  if (candidate == MBB.begin())
70-    return false;
71-  if (candidate->getOpcode() == SP::UNIMP)
72-    return true;
73-  --candidate;
74-  return candidate->hasDelaySlot();
75-}
76-
77 bool Filler::needsUnimp(MachineBasicBlock::iterator I, unsigned &StructSize)
78 {
79   if (!I->isCall())
80@@ -484,10 +479,10 @@ bool Filler::tryCombineRestoreWithPrevInst(Machine
81          && MBBI->getOperand(1).getReg() == SP::G0
82          && MBBI->getOperand(2).getReg() == SP::G0);
83 
84-  MachineBasicBlock::iterator PrevInst = MBBI; --PrevInst;
85+  MachineBasicBlock::iterator PrevInst = llvm::prior(MBBI);
86 
87-  // It cannot combine with a delay filler.
88-  if (isDelayFiller(MBB, PrevInst))
89+  // It cannot be combined with a bundled instruction.
90+  if (PrevInst->isBundledWithSucc())
91     return false;
92 
93   const TargetInstrInfo *TII = TM.getInstrInfo();
94Index: lib/Target/Sparc/SparcAsmPrinter.cpp
95===================================================================
96--- lib/Target/Sparc/SparcAsmPrinter.cpp
97+++ lib/Target/Sparc/SparcAsmPrinter.cpp
98@@ -184,7 +184,6 @@ static void LowerGETPCXAndEmitMCInsts(const Machin
99 
100 void SparcAsmPrinter::EmitInstruction(const MachineInstr *MI)
101 {
102-  MCInst TmpInst;
103 
104   switch (MI->getOpcode()) {
105   default: break;
106@@ -195,8 +194,13 @@ void SparcAsmPrinter::EmitInstruction(const Machin
107     LowerGETPCXAndEmitMCInsts(MI, OutStreamer, OutContext);
108     return;
109   }
110-  LowerSparcMachineInstrToMCInst(MI, TmpInst, *this);
111-  OutStreamer.EmitInstruction(TmpInst);
112+  MachineBasicBlock::const_instr_iterator I = MI;
113+  MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
114+  do {
115+    MCInst TmpInst;
116+    LowerSparcMachineInstrToMCInst(I, TmpInst, *this);
117+    OutStreamer.EmitInstruction(TmpInst);
118+  } while ((++I != E) && I->isInsideBundle()); // Delay slot check.
119 }
120 
121 void SparcAsmPrinter::EmitFunctionBodyStart() {
122Index: test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
123===================================================================
124--- test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
125+++ test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
126@@ -1,5 +1,5 @@
127-;RUN: llc -march=sparc < %s | FileCheck %s
128-;RUN: llc -march=sparc -O0 < %s | FileCheck %s -check-prefix=UNOPT
129+;RUN: llc -march=sparc < %s -verify-machineinstrs | FileCheck %s
130+;RUN: llc -march=sparc -O0 < %s -verify-machineinstrs | FileCheck %s -check-prefix=UNOPT
131 
132 
133 define i32 @test(i32 %a) nounwind {
134