X86InstrTSX.td revision 263508 
1//===-- X86InstrVMX.td - TSX Instruction Set Extension -----*- tablegen -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file describes the instructions that make up the Intel TSX instruction
11// set.
12//
13//===----------------------------------------------------------------------===//
14
15//===----------------------------------------------------------------------===//
16// TSX instructions
17
18def X86xtest: SDNode<"X86ISD::XTEST", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>,
19                     [SDNPHasChain, SDNPSideEffect]>;
20
21let usesCustomInserter = 1 in
22def XBEGIN : I<0, Pseudo, (outs GR32:$dst), (ins),
23               "# XBEGIN", [(set GR32:$dst, (int_x86_xbegin))]>,
24             Requires<[HasRTM]>;
25
26let isBranch = 1, isTerminator = 1, Defs = [EAX] in
27def XBEGIN_4 : Ii32PCRel<0xc7, MRM_F8, (outs), (ins brtarget:$dst),
28                         "xbegin\t$dst", []>, Requires<[HasRTM]>;
29
30def XEND : I<0x01, MRM_D5, (outs), (ins),
31             "xend", [(int_x86_xend)]>, TB, Requires<[HasRTM]>;
32
33let Defs = [EFLAGS] in
34def XTEST : I<0x01, MRM_D6, (outs), (ins),
35              "xtest", [(set EFLAGS, (X86xtest))]>, TB, Requires<[HasTSX]>;
36
37def XABORT : Ii8<0xc6, MRM_F8, (outs), (ins i8imm:$imm),
38                 "xabort\t$imm",
39                 [(int_x86_xabort imm:$imm)]>, Requires<[HasRTM]>;
40
41// HLE prefixes
42
43def XACQUIRE_PREFIX : I<0xF2, RawFrm, (outs), (ins), "xacquire", []>, Requires<[HasHLE]>;
44
45def XRELEASE_PREFIX : I<0xF3, RawFrm, (outs), (ins), "xrelease", []>, Requires<[HasHLE]>;
46
47