X86FrameLowering.cpp revision 263508
1141104Sharti//===-- X86FrameLowering.cpp - X86 Frame Information ----------------------===// 2146045Sharti// 31590Srgrimes// The LLVM Compiler Infrastructure 41590Srgrimes// 51590Srgrimes// This file is distributed under the University of Illinois Open Source 61590Srgrimes// License. See LICENSE.TXT for details. 71590Srgrimes// 81590Srgrimes//===----------------------------------------------------------------------===// 91590Srgrimes// 101590Srgrimes// This file contains the X86 implementation of TargetFrameLowering class. 111590Srgrimes// 121590Srgrimes//===----------------------------------------------------------------------===// 131590Srgrimes 141590Srgrimes#include "X86FrameLowering.h" 151590Srgrimes#include "X86InstrBuilder.h" 161590Srgrimes#include "X86InstrInfo.h" 171590Srgrimes#include "X86MachineFunctionInfo.h" 181590Srgrimes#include "X86Subtarget.h" 191590Srgrimes#include "X86TargetMachine.h" 201590Srgrimes#include "llvm/ADT/SmallSet.h" 211590Srgrimes#include "llvm/CodeGen/MachineFrameInfo.h" 221590Srgrimes#include "llvm/CodeGen/MachineFunction.h" 231590Srgrimes#include "llvm/CodeGen/MachineInstrBuilder.h" 241590Srgrimes#include "llvm/CodeGen/MachineModuleInfo.h" 251590Srgrimes#include "llvm/CodeGen/MachineRegisterInfo.h" 261590Srgrimes#include "llvm/IR/DataLayout.h" 271590Srgrimes#include "llvm/IR/Function.h" 281590Srgrimes#include "llvm/MC/MCAsmInfo.h" 291590Srgrimes#include "llvm/MC/MCSymbol.h" 301590Srgrimes#include "llvm/Support/CommandLine.h" 311590Srgrimes#include "llvm/Target/TargetOptions.h" 321590Srgrimes 331590Srgrimesusing namespace llvm; 341590Srgrimes 351590Srgrimes// FIXME: completely move here. 361590Srgrimesextern cl::opt<bool> ForceStackAlign; 371590Srgrimes 3862833Swsanchezbool X86FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const { 3962833Swsanchez return !MF.getFrameInfo()->hasVarSizedObjects(); 401590Srgrimes} 411590Srgrimes 4262833Swsanchez/// hasFP - Return true if the specified function should have a dedicated frame 4394587Sobrien/// pointer register. This is true if the function has variable sized allocas 441590Srgrimes/// or if frame pointer elimination is disabled. 45146046Shartibool X86FrameLowering::hasFP(const MachineFunction &MF) const { 461590Srgrimes const MachineFrameInfo *MFI = MF.getFrameInfo(); 471590Srgrimes const MachineModuleInfo &MMI = MF.getMMI(); 481590Srgrimes const TargetRegisterInfo *RegInfo = TM.getRegisterInfo(); 491590Srgrimes 50143813Sharti return (MF.getTarget().Options.DisableFramePointerElim(MF) || 51143813Sharti RegInfo->needsStackRealignment(MF) || 52143813Sharti MFI->hasVarSizedObjects() || 53143813Sharti MFI->isFrameAddressTaken() || MF.hasMSInlineAsm() || 541590Srgrimes MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() || 55143813Sharti MMI.callsUnwindInit() || MMI.callsEHReturn()); 56143813Sharti} 57143813Sharti 58143813Shartistatic unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm) { 59143813Sharti if (IsLP64) { 601590Srgrimes if (isInt<8>(Imm)) 61143813Sharti return X86::SUB64ri8; 621590Srgrimes return X86::SUB64ri32; 63143813Sharti } else { 64143813Sharti if (isInt<8>(Imm)) 651590Srgrimes return X86::SUB32ri8; 66143813Sharti return X86::SUB32ri; 67143813Sharti } 68143813Sharti} 69143813Sharti 70143813Shartistatic unsigned getADDriOpcode(unsigned IsLP64, int64_t Imm) { 711590Srgrimes if (IsLP64) { 72143813Sharti if (isInt<8>(Imm)) 73143813Sharti return X86::ADD64ri8; 74143813Sharti return X86::ADD64ri32; 751590Srgrimes } else { 76143813Sharti if (isInt<8>(Imm)) 771590Srgrimes return X86::ADD32ri8; 78143813Sharti return X86::ADD32ri; 791590Srgrimes } 801590Srgrimes} 81143813Sharti 82143813Shartistatic unsigned getLEArOpcode(unsigned IsLP64) { 831590Srgrimes return IsLP64 ? X86::LEA64r : X86::LEA32r; 841590Srgrimes} 851590Srgrimes 861590Srgrimes/// findDeadCallerSavedReg - Return a caller-saved register that isn't live 87141104Sharti/// when it reaches the "return" instruction. We can then pop a stack object 88141104Sharti/// to this register without worry about clobbering it. 89141104Shartistatic unsigned findDeadCallerSavedReg(MachineBasicBlock &MBB, 90146045Sharti MachineBasicBlock::iterator &MBBI, 91146045Sharti const TargetRegisterInfo &TRI, 921590Srgrimes bool Is64Bit) { 93141104Sharti const MachineFunction *MF = MBB.getParent(); 94141104Sharti const Function *F = MF->getFunction(); 95141104Sharti if (!F || MF->getMMI().callsEHReturn()) 96141104Sharti return 0; 97146054Sharti 98146141Sharti static const uint16_t CallerSavedRegs32Bit[] = { 99141104Sharti X86::EAX, X86::EDX, X86::ECX, 0 100141104Sharti }; 101141104Sharti 102141104Sharti static const uint16_t CallerSavedRegs64Bit[] = { 103141104Sharti X86::RAX, X86::RDX, X86::RCX, X86::RSI, X86::RDI, 104141104Sharti X86::R8, X86::R9, X86::R10, X86::R11, 0 105143811Sharti }; 106143811Sharti 107143811Sharti unsigned Opc = MBBI->getOpcode(); 108143811Sharti switch (Opc) { 109143811Sharti default: return 0; 110143904Sharti case X86::RET: 111143811Sharti case X86::RETI: 112143811Sharti case X86::TCRETURNdi: 113146038Sharti case X86::TCRETURNri: 114143811Sharti case X86::TCRETURNmi: 115146045Sharti case X86::TCRETURNdi64: 116146045Sharti case X86::TCRETURNri64: 117146045Sharti case X86::TCRETURNmi64: 118146045Sharti case X86::EH_RETURN: 119146045Sharti case X86::EH_RETURN64: { 120146045Sharti SmallSet<uint16_t, 8> Uses; 121146045Sharti for (unsigned i = 0, e = MBBI->getNumOperands(); i != e; ++i) { 122146045Sharti MachineOperand &MO = MBBI->getOperand(i); 123146045Sharti if (!MO.isReg() || MO.isDef()) 124146045Sharti continue; 125146045Sharti unsigned Reg = MO.getReg(); 126146045Sharti if (!Reg) 127146045Sharti continue; 128146045Sharti for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI) 129146045Sharti Uses.insert(*AI); 130146045Sharti } 131146045Sharti 132146045Sharti const uint16_t *CS = Is64Bit ? CallerSavedRegs64Bit : CallerSavedRegs32Bit; 133146045Sharti for (; *CS; ++CS) 134146045Sharti if (!Uses.count(*CS)) 135146045Sharti return *CS; 136146045Sharti } 137146045Sharti } 138146045Sharti 139146045Sharti return 0; 140146045Sharti} 141146045Sharti 142146045Sharti 143146045Sharti/// emitSPUpdate - Emit a series of instructions to increment / decrement the 144146045Sharti/// stack pointer by a constant value. 145146045Shartistatic 146146045Shartivoid emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, 147146045Sharti unsigned StackPtr, int64_t NumBytes, 148146045Sharti bool Is64Bit, bool IsLP64, bool UseLEA, 149146045Sharti const TargetInstrInfo &TII, const TargetRegisterInfo &TRI) { 150143914Sharti bool isSub = NumBytes < 0; 151143811Sharti uint64_t Offset = isSub ? -NumBytes : NumBytes; 1521590Srgrimes unsigned Opc; 1531590Srgrimes if (UseLEA) 1541590Srgrimes Opc = getLEArOpcode(IsLP64); 1551590Srgrimes else 1561590Srgrimes Opc = isSub 157143813Sharti ? getSUBriOpcode(IsLP64, Offset) 1581590Srgrimes : getADDriOpcode(IsLP64, Offset); 1591590Srgrimes 1601590Srgrimes uint64_t Chunk = (1LL << 31) - 1; 1611590Srgrimes DebugLoc DL = MBB.findDebugLoc(MBBI); 1621590Srgrimes 1631590Srgrimes while (Offset) { 1641590Srgrimes uint64_t ThisVal = (Offset > Chunk) ? Chunk : Offset; 1651590Srgrimes if (ThisVal == (Is64Bit ? 8 : 4)) { 1661590Srgrimes // Use push / pop instead. 1671590Srgrimes unsigned Reg = isSub 1681590Srgrimes ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX) 169143813Sharti : findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit); 170143813Sharti if (Reg) { 1711590Srgrimes Opc = isSub 172143813Sharti ? (Is64Bit ? X86::PUSH64r : X86::PUSH32r) 173143813Sharti : (Is64Bit ? X86::POP64r : X86::POP32r); 1741590Srgrimes MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc)) 1751590Srgrimes .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub)); 1761590Srgrimes if (isSub) 1771590Srgrimes MI->setFlag(MachineInstr::FrameSetup); 1781590Srgrimes Offset -= ThisVal; 1791590Srgrimes continue; 1801590Srgrimes } 1811590Srgrimes } 182146134Sharti 183146134Sharti MachineInstr *MI = NULL; 184146134Sharti 1851590Srgrimes if (UseLEA) { 186146134Sharti MI = addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr), 187146134Sharti StackPtr, false, isSub ? -ThisVal : ThisVal); 188146134Sharti } else { 189141583Sharti MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) 190141583Sharti .addReg(StackPtr) 191141583Sharti .addImm(ThisVal); 192141583Sharti MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead. 193141583Sharti } 194146046Sharti 195141564Sharti if (isSub) 196141564Sharti MI->setFlag(MachineInstr::FrameSetup); 197141564Sharti 198141564Sharti Offset -= ThisVal; 199141564Sharti } 200141564Sharti} 201141564Sharti 202141564Sharti/// mergeSPUpdatesUp - Merge two stack-manipulating instructions upper iterator. 203141564Shartistatic 204141564Shartivoid mergeSPUpdatesUp(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, 205141564Sharti unsigned StackPtr, uint64_t *NumBytes = NULL) { 206141564Sharti if (MBBI == MBB.begin()) return; 207141564Sharti 208141564Sharti MachineBasicBlock::iterator PI = prior(MBBI); 209141564Sharti unsigned Opc = PI->getOpcode(); 210141564Sharti if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 || 211141564Sharti Opc == X86::ADD32ri || Opc == X86::ADD32ri8 || 212141564Sharti Opc == X86::LEA32r || Opc == X86::LEA64_32r) && 213141564Sharti PI->getOperand(0).getReg() == StackPtr) { 214141564Sharti if (NumBytes) 215141564Sharti *NumBytes += PI->getOperand(2).getImm(); 216141564Sharti MBB.erase(PI); 217141564Sharti } else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 || 218141564Sharti Opc == X86::SUB32ri || Opc == X86::SUB32ri8) && 219141564Sharti PI->getOperand(0).getReg() == StackPtr) { 220141564Sharti if (NumBytes) 221146046Sharti *NumBytes -= PI->getOperand(2).getImm(); 222141564Sharti MBB.erase(PI); 223141564Sharti } 224141564Sharti} 225146039Sharti 226146039Sharti/// mergeSPUpdatesDown - Merge two stack-manipulating instructions lower iterator. 227141564Shartistatic 228141564Shartivoid mergeSPUpdatesDown(MachineBasicBlock &MBB, 229141564Sharti MachineBasicBlock::iterator &MBBI, 230141564Sharti unsigned StackPtr, uint64_t *NumBytes = NULL) { 231141564Sharti // FIXME: THIS ISN'T RUN!!! 232141564Sharti return; 233141564Sharti 234141564Sharti if (MBBI == MBB.end()) return; 235141564Sharti 236141564Sharti MachineBasicBlock::iterator NI = llvm::next(MBBI); 237146045Sharti if (NI == MBB.end()) return; 238146046Sharti 239146046Sharti unsigned Opc = NI->getOpcode(); 240146045Sharti if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 || 241146045Sharti Opc == X86::ADD32ri || Opc == X86::ADD32ri8) && 242146045Sharti NI->getOperand(0).getReg() == StackPtr) { 243146045Sharti if (NumBytes) 244146045Sharti *NumBytes -= NI->getOperand(2).getImm(); 245146045Sharti MBB.erase(NI); 246146045Sharti MBBI = NI; 247146045Sharti } else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 || 248146045Sharti Opc == X86::SUB32ri || Opc == X86::SUB32ri8) && 249146045Sharti NI->getOperand(0).getReg() == StackPtr) { 250146045Sharti if (NumBytes) 251146045Sharti *NumBytes += NI->getOperand(2).getImm(); 252146045Sharti MBB.erase(NI); 253146045Sharti MBBI = NI; 254146045Sharti } 255146045Sharti} 256146045Sharti 257146045Sharti/// mergeSPUpdates - Checks the instruction before/after the passed 258146045Sharti/// instruction. If it is an ADD/SUB/LEA instruction it is deleted argument and the 259146045Sharti/// stack adjustment is returned as a positive value for ADD/LEA and a negative for 260146045Sharti/// SUB. 261146045Shartistatic int mergeSPUpdates(MachineBasicBlock &MBB, 262146045Sharti MachineBasicBlock::iterator &MBBI, 263146045Sharti unsigned StackPtr, 264146045Sharti bool doMergeWithPrevious) { 265146045Sharti if ((doMergeWithPrevious && MBBI == MBB.begin()) || 266146045Sharti (!doMergeWithPrevious && MBBI == MBB.end())) 267146045Sharti return 0; 268146045Sharti 269146045Sharti MachineBasicBlock::iterator PI = doMergeWithPrevious ? prior(MBBI) : MBBI; 270146045Sharti MachineBasicBlock::iterator NI = doMergeWithPrevious ? 0 : llvm::next(MBBI); 271146045Sharti unsigned Opc = PI->getOpcode(); 272146045Sharti int Offset = 0; 273146046Sharti 274146046Sharti if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 || 275146045Sharti Opc == X86::ADD32ri || Opc == X86::ADD32ri8 || 276146045Sharti Opc == X86::LEA32r || Opc == X86::LEA64_32r) && 277146045Sharti PI->getOperand(0).getReg() == StackPtr){ 278146045Sharti Offset += PI->getOperand(2).getImm(); 279146045Sharti MBB.erase(PI); 280146045Sharti if (!doMergeWithPrevious) MBBI = NI; 281146045Sharti } else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 || 282146045Sharti Opc == X86::SUB32ri || Opc == X86::SUB32ri8) && 283146045Sharti PI->getOperand(0).getReg() == StackPtr) { 284146045Sharti Offset -= PI->getOperand(2).getImm(); 285146045Sharti MBB.erase(PI); 286146045Sharti if (!doMergeWithPrevious) MBBI = NI; 287146045Sharti } 288146045Sharti 289146045Sharti return Offset; 290146045Sharti} 291146045Sharti 292146045Shartistatic bool isEAXLiveIn(MachineFunction &MF) { 293146045Sharti for (MachineRegisterInfo::livein_iterator II = MF.getRegInfo().livein_begin(), 294146045Sharti EE = MF.getRegInfo().livein_end(); II != EE; ++II) { 295146045Sharti unsigned Reg = II->first; 296146045Sharti 297146045Sharti if (Reg == X86::EAX || Reg == X86::AX || 298146045Sharti Reg == X86::AH || Reg == X86::AL) 299146045Sharti return true; 300146045Sharti } 301146045Sharti 302146045Sharti return false; 303146046Sharti} 304146045Sharti 305146045Shartivoid X86FrameLowering::emitCalleeSavedFrameMoves(MachineFunction &MF, 306146045Sharti MCSymbol *Label, 307146045Sharti unsigned FramePtr) const { 308146045Sharti MachineFrameInfo *MFI = MF.getFrameInfo(); 309146045Sharti MachineModuleInfo &MMI = MF.getMMI(); 310146045Sharti const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo(); 311146045Sharti 312146045Sharti // Add callee saved registers to move list. 313146045Sharti const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo(); 314146045Sharti if (CSI.empty()) return; 315146045Sharti 316146045Sharti const X86RegisterInfo *RegInfo = TM.getRegisterInfo(); 317146045Sharti bool HasFP = hasFP(MF); 318146045Sharti 319146045Sharti // Calculate amount of bytes used for return address storing. 320146045Sharti int stackGrowth = -RegInfo->getSlotSize(); 321146045Sharti 322146045Sharti // FIXME: This is dirty hack. The code itself is pretty mess right now. 323146045Sharti // It should be rewritten from scratch and generalized sometimes. 324146045Sharti 325146045Sharti // Determine maximum offset (minimum due to stack growth). 326146045Sharti int64_t MaxOffset = 0; 327146045Sharti for (std::vector<CalleeSavedInfo>::const_iterator 328146045Sharti I = CSI.begin(), E = CSI.end(); I != E; ++I) 329146045Sharti MaxOffset = std::min(MaxOffset, 330146046Sharti MFI->getObjectOffset(I->getFrameIdx())); 331146046Sharti 332146045Sharti // Calculate offsets. 333146045Sharti int64_t saveAreaOffset = (HasFP ? 3 : 2) * stackGrowth; 334146045Sharti for (std::vector<CalleeSavedInfo>::const_iterator 335146045Sharti I = CSI.begin(), E = CSI.end(); I != E; ++I) { 336146045Sharti int64_t Offset = MFI->getObjectOffset(I->getFrameIdx()); 337146045Sharti unsigned Reg = I->getReg(); 338146045Sharti Offset = MaxOffset - Offset + saveAreaOffset; 339146045Sharti 340146045Sharti // Don't output a new machine move if we're re-saving the frame 341146045Sharti // pointer. This happens when the PrologEpilogInserter has inserted an extra 342146045Sharti // "PUSH" of the frame pointer -- the "emitPrologue" method automatically 343146045Sharti // generates one when frame pointers are used. If we generate a "machine 344146045Sharti // move" for this extra "PUSH", the linker will lose track of the fact that 345146045Sharti // the frame pointer should have the value of the first "PUSH" when it's 346146045Sharti // trying to unwind. 347146045Sharti // 348146045Sharti // FIXME: This looks inelegant. It's possibly correct, but it's covering up 349146045Sharti // another bug. I.e., one where we generate a prolog like this: 350146045Sharti // 351146045Sharti // pushl %ebp 352146045Sharti // movl %esp, %ebp 353146045Sharti // pushl %ebp 354146045Sharti // pushl %esi 355146045Sharti // ... 356146045Sharti // 357146045Sharti // The immediate re-push of EBP is unnecessary. At the least, it's an 358146045Sharti // optimization bug. EBP can be used as a scratch register in certain 359146046Sharti // cases, but probably not when we have a frame pointer. 360146046Sharti if (HasFP && FramePtr == Reg) 361146046Sharti continue; 362146046Sharti 363146045Sharti unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true); 364146045Sharti MMI.addFrameInst(MCCFIInstruction::createOffset(Label, DwarfReg, Offset)); 365146045Sharti } 366146045Sharti} 367146045Sharti 368146045Sharti/// usesTheStack - This function checks if any of the users of EFLAGS 369146045Sharti/// copies the EFLAGS. We know that the code that lowers COPY of EFLAGS has 370146045Sharti/// to use the stack, and if we don't adjust the stack we clobber the first 371146045Sharti/// frame index. 372146045Sharti/// See X86InstrInfo::copyPhysReg. 373146045Shartistatic bool usesTheStack(const MachineFunction &MF) { 374146045Sharti const MachineRegisterInfo &MRI = MF.getRegInfo(); 375146045Sharti 376146045Sharti for (MachineRegisterInfo::reg_iterator ri = MRI.reg_begin(X86::EFLAGS), 377146045Sharti re = MRI.reg_end(); ri != re; ++ri) 378146045Sharti if (ri->isCopy()) 379146045Sharti return true; 380146045Sharti 381146045Sharti return false; 382146045Sharti} 383146045Sharti 384146045Sharti/// emitPrologue - Push callee-saved registers onto the stack, which 385146045Sharti/// automatically adjust the stack pointer. Adjust the stack pointer to allocate 386146045Sharti/// space for local variables. Also emit labels used by the exception handler to 387146046Sharti/// generate the exception handling frames. 388146046Shartivoid X86FrameLowering::emitPrologue(MachineFunction &MF) const { 389146046Sharti MachineBasicBlock &MBB = MF.front(); // Prologue goes in entry BB. 390146045Sharti MachineBasicBlock::iterator MBBI = MBB.begin(); 391146045Sharti MachineFrameInfo *MFI = MF.getFrameInfo(); 392146045Sharti const Function *Fn = MF.getFunction(); 393146045Sharti const X86RegisterInfo *RegInfo = TM.getRegisterInfo(); 394146045Sharti const X86InstrInfo &TII = *TM.getInstrInfo(); 395146045Sharti MachineModuleInfo &MMI = MF.getMMI(); 396146045Sharti X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>(); 397146045Sharti bool needsFrameMoves = MMI.hasDebugInfo() || 398146045Sharti Fn->needsUnwindTableEntry(); 399146045Sharti uint64_t MaxAlign = MFI->getMaxAlignment(); // Desired stack alignment. 400146045Sharti uint64_t StackSize = MFI->getStackSize(); // Number of bytes to allocate. 401146045Sharti bool HasFP = hasFP(MF); 402146045Sharti bool Is64Bit = STI.is64Bit(); 403146045Sharti bool IsLP64 = STI.isTarget64BitLP64(); 404146045Sharti bool IsWin64 = STI.isTargetWin64(); 405146045Sharti bool UseLEA = STI.useLeaForSP(); 406146045Sharti unsigned StackAlign = getStackAlignment(); 407146045Sharti unsigned SlotSize = RegInfo->getSlotSize(); 408146045Sharti unsigned FramePtr = RegInfo->getFrameRegister(MF); 409146045Sharti unsigned StackPtr = RegInfo->getStackRegister(); 410146045Sharti unsigned BasePtr = RegInfo->getBaseRegister(); 411146045Sharti DebugLoc DL; 412146045Sharti 413146045Sharti // If we're forcing a stack realignment we can't rely on just the frame 414146045Sharti // info, we need to know the ABI stack alignment as well in case we 415146045Sharti // have a call out. Otherwise just make sure we have some alignment - we'll 416146045Sharti // go with the minimum SlotSize. 417146045Sharti if (ForceStackAlign) { 418146045Sharti if (MFI->hasCalls()) 419146045Sharti MaxAlign = (StackAlign > MaxAlign) ? StackAlign : MaxAlign; 420146046Sharti else if (MaxAlign < SlotSize) 421146046Sharti MaxAlign = SlotSize; 422146046Sharti } 423146045Sharti 424146045Sharti // Add RETADDR move area to callee saved frame size. 425146045Sharti int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta(); 426146045Sharti if (TailCallReturnAddrDelta < 0) 427146045Sharti X86FI->setCalleeSavedFrameSize( 428146045Sharti X86FI->getCalleeSavedFrameSize() - TailCallReturnAddrDelta); 429146045Sharti 430146045Sharti // If this is x86-64 and the Red Zone is not disabled, if we are a leaf 431146045Sharti // function, and use up to 128 bytes of stack space, don't have a frame 432146045Sharti // pointer, calls, or dynamic alloca then we do not need to adjust the 433146045Sharti // stack pointer (we fit in the Red Zone). We also check that we don't 434146045Sharti // push and pop from the stack. 435146045Sharti if (Is64Bit && !Fn->getAttributes().hasAttribute(AttributeSet::FunctionIndex, 436146045Sharti Attribute::NoRedZone) && 437146045Sharti !RegInfo->needsStackRealignment(MF) && 438146045Sharti !MFI->hasVarSizedObjects() && // No dynamic alloca. 439146045Sharti !MFI->adjustsStack() && // No calls. 440146045Sharti !IsWin64 && // Win64 has no Red Zone 441146045Sharti !usesTheStack(MF) && // Don't push and pop. 442146045Sharti !MF.getTarget().Options.EnableSegmentedStacks) { // Regular stack 443146045Sharti uint64_t MinSize = X86FI->getCalleeSavedFrameSize(); 444146045Sharti if (HasFP) MinSize += SlotSize; 445146045Sharti StackSize = std::max(MinSize, StackSize > 128 ? StackSize - 128 : 0); 446146046Sharti MFI->setStackSize(StackSize); 447146046Sharti } 448146045Sharti 449146045Sharti // Insert stack pointer adjustment for later moving of return addr. Only 450146045Sharti // applies to tail call optimized functions where the callee argument stack 451146045Sharti // size is bigger than the callers. 452146045Sharti if (TailCallReturnAddrDelta < 0) { 453146045Sharti MachineInstr *MI = 454146045Sharti BuildMI(MBB, MBBI, DL, 455146045Sharti TII.get(getSUBriOpcode(IsLP64, -TailCallReturnAddrDelta)), 456146045Sharti StackPtr) 457146045Sharti .addReg(StackPtr) 458146045Sharti .addImm(-TailCallReturnAddrDelta) 459146045Sharti .setMIFlag(MachineInstr::FrameSetup); 460146045Sharti MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead. 461146045Sharti } 462146045Sharti 463146045Sharti // Mapping for machine moves: 464146045Sharti // 465146045Sharti // DST: VirtualFP AND 466146045Sharti // SRC: VirtualFP => DW_CFA_def_cfa_offset 467146045Sharti // ELSE => DW_CFA_def_cfa 468146045Sharti // 469146045Sharti // SRC: VirtualFP AND 470146045Sharti // DST: Register => DW_CFA_def_cfa_register 471146045Sharti // 472146045Sharti // ELSE 473146045Sharti // OFFSET < 0 => DW_CFA_offset_extended_sf 474146045Sharti // REG < 64 => DW_CFA_offset + Reg 475146045Sharti // ELSE => DW_CFA_offset_extended 476146045Sharti 477146045Sharti uint64_t NumBytes = 0; 478146045Sharti int stackGrowth = -SlotSize; 479146045Sharti 480146045Sharti if (HasFP) { 481146045Sharti // Calculate required stack adjustment. 482146045Sharti uint64_t FrameSize = StackSize - SlotSize; 483146045Sharti if (RegInfo->needsStackRealignment(MF)) { 484146045Sharti // Callee-saved registers are pushed on stack before the stack 485146045Sharti // is realigned. 486146045Sharti FrameSize -= X86FI->getCalleeSavedFrameSize(); 487146045Sharti NumBytes = (FrameSize + MaxAlign - 1) / MaxAlign * MaxAlign; 488146045Sharti } else { 489146045Sharti NumBytes = FrameSize - X86FI->getCalleeSavedFrameSize(); 490146045Sharti } 491146045Sharti 492146045Sharti // Get the offset of the stack slot for the EBP register, which is 493146045Sharti // guaranteed to be the last slot by processFunctionBeforeFrameFinalized. 494146045Sharti // Update the frame offset adjustment. 495146045Sharti MFI->setOffsetAdjustment(-NumBytes); 496146045Sharti 497146045Sharti // Save EBP/RBP into the appropriate stack slot. 498146045Sharti BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r)) 499146045Sharti .addReg(FramePtr, RegState::Kill) 500146045Sharti .setMIFlag(MachineInstr::FrameSetup); 501146045Sharti 502146045Sharti if (needsFrameMoves) { 503146045Sharti // Mark the place where EBP/RBP was saved. 504146045Sharti MCSymbol *FrameLabel = MMI.getContext().CreateTempSymbol(); 505146045Sharti BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)) 506146045Sharti .addSym(FrameLabel); 507146045Sharti 508146045Sharti // Define the current CFA rule to use the provided offset. 509146045Sharti assert(StackSize); 510146045Sharti MMI.addFrameInst( 511146045Sharti MCCFIInstruction::createDefCfaOffset(FrameLabel, 2 * stackGrowth)); 512146045Sharti 513146045Sharti // Change the rule for the FramePtr to be an "offset" rule. 514146045Sharti unsigned DwarfFramePtr = RegInfo->getDwarfRegNum(FramePtr, true); 515146045Sharti MMI.addFrameInst(MCCFIInstruction::createOffset(FrameLabel, DwarfFramePtr, 516146045Sharti 2 * stackGrowth)); 517146045Sharti } 518146045Sharti 519146045Sharti // Update EBP with the new base value. 520146045Sharti BuildMI(MBB, MBBI, DL, 521146045Sharti TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr), FramePtr) 522146045Sharti .addReg(StackPtr) 523146045Sharti .setMIFlag(MachineInstr::FrameSetup); 524146045Sharti 525146045Sharti if (needsFrameMoves) { 526146045Sharti // Mark effective beginning of when frame pointer becomes valid. 527146045Sharti MCSymbol *FrameLabel = MMI.getContext().CreateTempSymbol(); 528146045Sharti BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)) 529146045Sharti .addSym(FrameLabel); 530146045Sharti 531146045Sharti // Define the current CFA to use the EBP/RBP register. 532146045Sharti unsigned DwarfFramePtr = RegInfo->getDwarfRegNum(FramePtr, true); 533146045Sharti MMI.addFrameInst( 534146045Sharti MCCFIInstruction::createDefCfaRegister(FrameLabel, DwarfFramePtr)); 535146045Sharti } 536146045Sharti 537146045Sharti // Mark the FramePtr as live-in in every block except the entry. 538146045Sharti for (MachineFunction::iterator I = llvm::next(MF.begin()), E = MF.end(); 539146045Sharti I != E; ++I) 540146045Sharti I->addLiveIn(FramePtr); 541146045Sharti } else { 542146045Sharti NumBytes = StackSize - X86FI->getCalleeSavedFrameSize(); 543146045Sharti } 544146045Sharti 545146045Sharti // Skip the callee-saved push instructions. 546146045Sharti bool PushedRegs = false; 547146045Sharti int StackOffset = 2 * stackGrowth; 548146045Sharti 549146045Sharti while (MBBI != MBB.end() && 550146045Sharti (MBBI->getOpcode() == X86::PUSH32r || 551146045Sharti MBBI->getOpcode() == X86::PUSH64r)) { 552146045Sharti PushedRegs = true; 553146045Sharti MBBI->setFlag(MachineInstr::FrameSetup); 554146045Sharti ++MBBI; 555146045Sharti 556146045Sharti if (!HasFP && needsFrameMoves) { 557146045Sharti // Mark callee-saved push instruction. 558146045Sharti MCSymbol *Label = MMI.getContext().CreateTempSymbol(); 559146045Sharti BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)).addSym(Label); 560146045Sharti 561146045Sharti // Define the current CFA rule to use the provided offset. 562146045Sharti assert(StackSize); 563146045Sharti MMI.addFrameInst( 564146045Sharti MCCFIInstruction::createDefCfaOffset(Label, StackOffset)); 565146045Sharti StackOffset += stackGrowth; 566146045Sharti } 567146045Sharti } 568146045Sharti 569146045Sharti // Realign stack after we pushed callee-saved registers (so that we'll be 570146045Sharti // able to calculate their offsets from the frame pointer). 571146045Sharti 572146045Sharti // NOTE: We push the registers before realigning the stack, so 573146045Sharti // vector callee-saved (xmm) registers may be saved w/o proper 574146045Sharti // alignment in this way. However, currently these regs are saved in 575146045Sharti // stack slots (see X86FrameLowering::spillCalleeSavedRegisters()), so 576146045Sharti // this shouldn't be a problem. 577146045Sharti if (RegInfo->needsStackRealignment(MF)) { 578146045Sharti assert(HasFP && "There should be a frame pointer if stack is realigned."); 579146045Sharti MachineInstr *MI = 580146045Sharti BuildMI(MBB, MBBI, DL, 581146045Sharti TII.get(Is64Bit ? X86::AND64ri32 : X86::AND32ri), StackPtr) 582146045Sharti .addReg(StackPtr) 583146045Sharti .addImm(-MaxAlign) 584146045Sharti .setMIFlag(MachineInstr::FrameSetup); 585146045Sharti 586146045Sharti // The EFLAGS implicit def is dead. 587146045Sharti MI->getOperand(3).setIsDead(); 588146045Sharti } 589146045Sharti 590146045Sharti // If there is an SUB32ri of ESP immediately before this instruction, merge 591146045Sharti // the two. This can be the case when tail call elimination is enabled and 592146045Sharti // the callee has more arguments then the caller. 593146045Sharti NumBytes -= mergeSPUpdates(MBB, MBBI, StackPtr, true); 594146045Sharti 595146045Sharti // If there is an ADD32ri or SUB32ri of ESP immediately after this 596146045Sharti // instruction, merge the two instructions. 597146045Sharti mergeSPUpdatesDown(MBB, MBBI, StackPtr, &NumBytes); 598146045Sharti 599146045Sharti // Adjust stack pointer: ESP -= numbytes. 600146045Sharti 601146045Sharti // Windows and cygwin/mingw require a prologue helper routine when allocating 602146045Sharti // more than 4K bytes on the stack. Windows uses __chkstk and cygwin/mingw 603146045Sharti // uses __alloca. __alloca and the 32-bit version of __chkstk will probe the 604146045Sharti // stack and adjust the stack pointer in one go. The 64-bit version of 605146045Sharti // __chkstk is only responsible for probing the stack. The 64-bit prologue is 606146045Sharti // responsible for adjusting the stack pointer. Touching the stack at 4K 607146045Sharti // increments is necessary to ensure that the guard pages used by the OS 608146045Sharti // virtual memory manager are allocated in correct sequence. 609146045Sharti if (NumBytes >= 4096 && STI.isOSWindows() && !STI.isTargetEnvMacho()) { 610146045Sharti const char *StackProbeSymbol; 611146045Sharti bool isSPUpdateNeeded = false; 612146045Sharti 613146045Sharti if (Is64Bit) { 614146045Sharti if (STI.isTargetCygMing()) 615146045Sharti StackProbeSymbol = "___chkstk"; 616146045Sharti else { 617146045Sharti StackProbeSymbol = "__chkstk"; 618146045Sharti isSPUpdateNeeded = true; 619146045Sharti } 620146045Sharti } else if (STI.isTargetCygMing()) 621146045Sharti StackProbeSymbol = "_alloca"; 622146045Sharti else 623146045Sharti StackProbeSymbol = "_chkstk"; 624146045Sharti 625146045Sharti // Check whether EAX is livein for this function. 626146045Sharti bool isEAXAlive = isEAXLiveIn(MF); 627146045Sharti 628146045Sharti if (isEAXAlive) { 629146045Sharti // Sanity check that EAX is not livein for this function. 630146045Sharti // It should not be, so throw an assert. 631146045Sharti assert(!Is64Bit && "EAX is livein in x64 case!"); 632146045Sharti 633146045Sharti // Save EAX 634146045Sharti BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH32r)) 635146045Sharti .addReg(X86::EAX, RegState::Kill) 636146045Sharti .setMIFlag(MachineInstr::FrameSetup); 637146045Sharti } 638146045Sharti 639146046Sharti if (Is64Bit) { 640146046Sharti // Handle the 64-bit Windows ABI case where we need to call __chkstk. 641146045Sharti // Function prologue is responsible for adjusting the stack pointer. 642146045Sharti BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::RAX) 643146045Sharti .addImm(NumBytes) 644146045Sharti .setMIFlag(MachineInstr::FrameSetup); 645146045Sharti } else { 646146045Sharti // Allocate NumBytes-4 bytes on stack in case of isEAXAlive. 647146045Sharti // We'll also use 4 already allocated bytes for EAX. 648146045Sharti BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX) 649146045Sharti .addImm(isEAXAlive ? NumBytes - 4 : NumBytes) 650146045Sharti .setMIFlag(MachineInstr::FrameSetup); 651146045Sharti } 652146045Sharti 653146045Sharti BuildMI(MBB, MBBI, DL, 654146045Sharti TII.get(Is64Bit ? X86::W64ALLOCA : X86::CALLpcrel32)) 655146045Sharti .addExternalSymbol(StackProbeSymbol) 656146045Sharti .addReg(StackPtr, RegState::Define | RegState::Implicit) 657146045Sharti .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit) 658146045Sharti .setMIFlag(MachineInstr::FrameSetup); 659146045Sharti 660146045Sharti // MSVC x64's __chkstk does not adjust %rsp itself. 661146045Sharti // It also does not clobber %rax so we can reuse it when adjusting %rsp. 662146045Sharti if (isSPUpdateNeeded) { 663146045Sharti BuildMI(MBB, MBBI, DL, TII.get(X86::SUB64rr), StackPtr) 664146045Sharti .addReg(StackPtr) 665146045Sharti .addReg(X86::RAX) 666146045Sharti .setMIFlag(MachineInstr::FrameSetup); 667146045Sharti } 668146045Sharti 669146045Sharti if (isEAXAlive) { 670146045Sharti // Restore EAX 671146045Sharti MachineInstr *MI = addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm), 672146045Sharti X86::EAX), 673146045Sharti StackPtr, false, NumBytes - 4); 674146045Sharti MI->setFlag(MachineInstr::FrameSetup); 675146045Sharti MBB.insert(MBBI, MI); 676146045Sharti } 677146045Sharti } else if (NumBytes) 678146045Sharti emitSPUpdate(MBB, MBBI, StackPtr, -(int64_t)NumBytes, Is64Bit, IsLP64, 679146045Sharti UseLEA, TII, *RegInfo); 680146045Sharti 681146045Sharti // If we need a base pointer, set it up here. It's whatever the value 682146045Sharti // of the stack pointer is at this point. Any variable size objects 683146045Sharti // will be allocated after this, so we can still use the base pointer 684146045Sharti // to reference locals. 685146045Sharti if (RegInfo->hasBasePointer(MF)) { 686146045Sharti // Update the frame pointer with the current stack pointer. 687146045Sharti unsigned Opc = Is64Bit ? X86::MOV64rr : X86::MOV32rr; 688146045Sharti BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr) 689146045Sharti .addReg(StackPtr) 690146045Sharti .setMIFlag(MachineInstr::FrameSetup); 691146045Sharti } 692146045Sharti 693146045Sharti if (( (!HasFP && NumBytes) || PushedRegs) && needsFrameMoves) { 694146045Sharti // Mark end of stack pointer adjustment. 695146045Sharti MCSymbol *Label = MMI.getContext().CreateTempSymbol(); 696146045Sharti BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)) 697146045Sharti .addSym(Label); 698146045Sharti 699146045Sharti if (!HasFP && NumBytes) { 700146045Sharti // Define the current CFA rule to use the provided offset. 701146045Sharti assert(StackSize); 702146045Sharti MMI.addFrameInst(MCCFIInstruction::createDefCfaOffset( 703146045Sharti Label, -StackSize + stackGrowth)); 704146045Sharti } 705146045Sharti 706146045Sharti // Emit DWARF info specifying the offsets of the callee-saved registers. 707146045Sharti if (PushedRegs) 708146045Sharti emitCalleeSavedFrameMoves(MF, Label, HasFP ? FramePtr : StackPtr); 709146045Sharti } 710146045Sharti} 711146045Sharti 712146045Shartivoid X86FrameLowering::emitEpilogue(MachineFunction &MF, 713146045Sharti MachineBasicBlock &MBB) const { 714146045Sharti const MachineFrameInfo *MFI = MF.getFrameInfo(); 715146045Sharti X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>(); 716146045Sharti const X86RegisterInfo *RegInfo = TM.getRegisterInfo(); 717146045Sharti const X86InstrInfo &TII = *TM.getInstrInfo(); 718146045Sharti MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); 719146045Sharti assert(MBBI != MBB.end() && "Returning block has no instructions"); 720146045Sharti unsigned RetOpcode = MBBI->getOpcode(); 721146045Sharti DebugLoc DL = MBBI->getDebugLoc(); 722146045Sharti bool Is64Bit = STI.is64Bit(); 723146045Sharti bool IsLP64 = STI.isTarget64BitLP64(); 724146045Sharti bool UseLEA = STI.useLeaForSP(); 725146045Sharti unsigned StackAlign = getStackAlignment(); 726146045Sharti unsigned SlotSize = RegInfo->getSlotSize(); 727146045Sharti unsigned FramePtr = RegInfo->getFrameRegister(MF); 728146045Sharti unsigned StackPtr = RegInfo->getStackRegister(); 729146045Sharti 730146045Sharti switch (RetOpcode) { 731146045Sharti default: 732146045Sharti llvm_unreachable("Can only insert epilog into returning blocks"); 733146045Sharti case X86::RET: 734146045Sharti case X86::RETI: 735146045Sharti case X86::TCRETURNdi: 736146045Sharti case X86::TCRETURNri: 737146045Sharti case X86::TCRETURNmi: 738146045Sharti case X86::TCRETURNdi64: 739146045Sharti case X86::TCRETURNri64: 740146045Sharti case X86::TCRETURNmi64: 741146045Sharti case X86::EH_RETURN: 742146045Sharti case X86::EH_RETURN64: 743146045Sharti break; // These are ok 744146045Sharti } 745146045Sharti 746146045Sharti // Get the number of bytes to allocate from the FrameInfo. 747146045Sharti uint64_t StackSize = MFI->getStackSize(); 748146045Sharti uint64_t MaxAlign = MFI->getMaxAlignment(); 749146045Sharti unsigned CSSize = X86FI->getCalleeSavedFrameSize(); 750146045Sharti uint64_t NumBytes = 0; 751146045Sharti 752146045Sharti // If we're forcing a stack realignment we can't rely on just the frame 753146045Sharti // info, we need to know the ABI stack alignment as well in case we 754146045Sharti // have a call out. Otherwise just make sure we have some alignment - we'll 755146045Sharti // go with the minimum. 756146045Sharti if (ForceStackAlign) { 757146045Sharti if (MFI->hasCalls()) 758146045Sharti MaxAlign = (StackAlign > MaxAlign) ? StackAlign : MaxAlign; 759146045Sharti else 760146045Sharti MaxAlign = MaxAlign ? MaxAlign : 4; 761146045Sharti } 762146045Sharti 763146045Sharti if (hasFP(MF)) { 764146045Sharti // Calculate required stack adjustment. 765146045Sharti uint64_t FrameSize = StackSize - SlotSize; 766146045Sharti if (RegInfo->needsStackRealignment(MF)) { 767146046Sharti // Callee-saved registers were pushed on stack before the stack 768143975Sharti // was realigned. 7691590Srgrimes FrameSize -= CSSize; 770143975Sharti NumBytes = (FrameSize + MaxAlign - 1) / MaxAlign * MaxAlign; 771143975Sharti } else { 7721590Srgrimes NumBytes = FrameSize - CSSize; 773143975Sharti } 774138232Sharti 775143975Sharti // Pop EBP. 776143975Sharti BuildMI(MBB, MBBI, DL, 777143975Sharti TII.get(Is64Bit ? X86::POP64r : X86::POP32r), FramePtr); 778143975Sharti } else { 7791590Srgrimes NumBytes = StackSize - CSSize; 7801590Srgrimes } 781146046Sharti 782146046Sharti // Skip the callee-saved pop instructions. 78398439Sjmallett while (MBBI != MBB.begin()) { 78498439Sjmallett MachineBasicBlock::iterator PI = prior(MBBI); 78598441Sjmallett unsigned Opc = PI->getOpcode(); 78698439Sjmallett 787141268Sharti if (Opc != X86::POP32r && Opc != X86::POP64r && Opc != X86::DBG_VALUE && 788141268Sharti !PI->isTerminator()) 78998439Sjmallett break; 790142457Sharti 791138232Sharti --MBBI; 792141268Sharti } 793146027Sharti MachineBasicBlock::iterator FirstCSPop = MBBI; 794143959Sharti 795142457Sharti DL = MBBI->getDebugLoc(); 796143919Sharti 797142457Sharti // If there is an ADD32ri or SUB32ri of ESP immediately before this 79898439Sjmallett // instruction, merge the two instructions. 79998439Sjmallett if (NumBytes || MFI->hasVarSizedObjects()) 800145007Sharti mergeSPUpdatesUp(MBB, MBBI, StackPtr, &NumBytes); 801145007Sharti 802145007Sharti // If dynamic alloca is used, then reset esp to point to the last callee-saved 803145007Sharti // slot before popping them off! Same applies for the case, when stack was 804145007Sharti // realigned. 8051590Srgrimes if (RegInfo->needsStackRealignment(MF) || MFI->hasVarSizedObjects()) { 806146046Sharti if (RegInfo->needsStackRealignment(MF)) 807145007Sharti MBBI = FirstCSPop; 8081590Srgrimes if (CSSize != 0) { 809143653Sharti unsigned Opc = getLEArOpcode(IsLP64); 8101590Srgrimes addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr), 8111590Srgrimes FramePtr, false, -CSSize); 8121590Srgrimes } else { 813145007Sharti unsigned Opc = (Is64Bit ? X86::MOV64rr : X86::MOV32rr); 8141590Srgrimes BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) 815145007Sharti .addReg(FramePtr); 8161590Srgrimes } 8171590Srgrimes } else if (NumBytes) { 8181590Srgrimes // Adjust stack pointer back: ESP += numbytes. 819145007Sharti emitSPUpdate(MBB, MBBI, StackPtr, NumBytes, Is64Bit, IsLP64, UseLEA, 8201590Srgrimes TII, *RegInfo); 8211590Srgrimes } 8221590Srgrimes 823145007Sharti // We're returning from function via eh_return. 8241590Srgrimes if (RetOpcode == X86::EH_RETURN || RetOpcode == X86::EH_RETURN64) { 8251590Srgrimes MBBI = MBB.getLastNonDebugInstr(); 8261590Srgrimes MachineOperand &DestAddr = MBBI->getOperand(0); 827145007Sharti assert(DestAddr.isReg() && "Offset should be in register!"); 8281590Srgrimes BuildMI(MBB, MBBI, DL, 8291590Srgrimes TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr), 8301590Srgrimes StackPtr).addReg(DestAddr.getReg()); 831145007Sharti } else if (RetOpcode == X86::TCRETURNri || RetOpcode == X86::TCRETURNdi || 8321590Srgrimes RetOpcode == X86::TCRETURNmi || 8331590Srgrimes RetOpcode == X86::TCRETURNri64 || RetOpcode == X86::TCRETURNdi64 || 8341590Srgrimes RetOpcode == X86::TCRETURNmi64) { 835145007Sharti bool isMem = RetOpcode == X86::TCRETURNmi || RetOpcode == X86::TCRETURNmi64; 8361590Srgrimes // Tail call return: adjust the stack pointer and jump to callee. 837141461Sharti MBBI = MBB.getLastNonDebugInstr(); 838141461Sharti MachineOperand &JumpTarget = MBBI->getOperand(0); 8391590Srgrimes MachineOperand &StackAdjust = MBBI->getOperand(isMem ? 5 : 1); 840141461Sharti assert(StackAdjust.isImm() && "Expecting immediate value."); 841145007Sharti 842145007Sharti // Adjust stack pointer. 84349332Shoek int StackAdj = StackAdjust.getImm(); 844145007Sharti int MaxTCDelta = X86FI->getTCReturnAddrDelta(); 845228992Suqs int Offset = 0; 846145007Sharti assert(MaxTCDelta <= 0 && "MaxTCDelta should never be positive"); 847145007Sharti 848145007Sharti // Incoporate the retaddr area. 849145007Sharti Offset = StackAdj-MaxTCDelta; 850145007Sharti assert(Offset >= 0 && "Offset should never be negative"); 851145007Sharti 852145007Sharti if (Offset) { 853145007Sharti // Check for possible merge with preceding ADD instruction. 854145007Sharti Offset += mergeSPUpdates(MBB, MBBI, StackPtr, true); 855145007Sharti emitSPUpdate(MBB, MBBI, StackPtr, Offset, Is64Bit, IsLP64, 856145007Sharti UseLEA, TII, *RegInfo); 857145007Sharti } 858145007Sharti 859145007Sharti // Jump to label or value in register. 860145007Sharti if (RetOpcode == X86::TCRETURNdi || RetOpcode == X86::TCRETURNdi64) { 861145971Sharti MachineInstrBuilder MIB = 862145971Sharti BuildMI(MBB, MBBI, DL, TII.get((RetOpcode == X86::TCRETURNdi) 863145007Sharti ? X86::TAILJMPd : X86::TAILJMPd64)); 864145007Sharti if (JumpTarget.isGlobal()) 865145007Sharti MIB.addGlobalAddress(JumpTarget.getGlobal(), JumpTarget.getOffset(), 866145007Sharti JumpTarget.getTargetFlags()); 867145007Sharti else { 868145007Sharti assert(JumpTarget.isSymbol()); 869145007Sharti MIB.addExternalSymbol(JumpTarget.getSymbolName(), 870145007Sharti JumpTarget.getTargetFlags()); 871145007Sharti } 872145007Sharti } else if (RetOpcode == X86::TCRETURNmi || RetOpcode == X86::TCRETURNmi64) { 873145007Sharti MachineInstrBuilder MIB = 874145007Sharti BuildMI(MBB, MBBI, DL, TII.get((RetOpcode == X86::TCRETURNmi) 875145007Sharti ? X86::TAILJMPm : X86::TAILJMPm64)); 876145007Sharti for (unsigned i = 0; i != 5; ++i) 877145007Sharti MIB.addOperand(MBBI->getOperand(i)); 878145007Sharti } else if (RetOpcode == X86::TCRETURNri64) { 879145007Sharti BuildMI(MBB, MBBI, DL, TII.get(X86::TAILJMPr64)). 880145007Sharti addReg(JumpTarget.getReg(), RegState::Kill); 881145007Sharti } else { 882145007Sharti BuildMI(MBB, MBBI, DL, TII.get(X86::TAILJMPr)). 883145007Sharti addReg(JumpTarget.getReg(), RegState::Kill); 884145007Sharti } 885145007Sharti 886145007Sharti MachineInstr *NewMI = prior(MBBI); 887145007Sharti NewMI->copyImplicitOps(MF, MBBI); 888145007Sharti 889145007Sharti // Delete the pseudo instruction TCRETURN. 890145007Sharti MBB.erase(MBBI); 891145007Sharti } else if ((RetOpcode == X86::RET || RetOpcode == X86::RETI) && 892145007Sharti (X86FI->getTCReturnAddrDelta() < 0)) { 893145007Sharti // Add the return addr area delta back since we are not tail calling. 894145007Sharti int delta = -1*X86FI->getTCReturnAddrDelta(); 895141572Sharti MBBI = MBB.getLastNonDebugInstr(); 896141572Sharti 897141572Sharti // Check for possible merge with preceding ADD instruction. 898141572Sharti delta += mergeSPUpdates(MBB, MBBI, StackPtr, true); 899143975Sharti emitSPUpdate(MBB, MBBI, StackPtr, delta, Is64Bit, IsLP64, UseLEA, TII, 900143975Sharti *RegInfo); 901143975Sharti } 902143975Sharti} 903143975Sharti 904143975Shartiint X86FrameLowering::getFrameIndexOffset(const MachineFunction &MF, int FI) const { 905141572Sharti const X86RegisterInfo *RegInfo = 90649332Shoek static_cast<const X86RegisterInfo*>(MF.getTarget().getRegisterInfo()); 907141572Sharti const MachineFrameInfo *MFI = MF.getFrameInfo(); 908141572Sharti int Offset = MFI->getObjectOffset(FI) - getOffsetOfLocalArea(); 909141572Sharti uint64_t StackSize = MFI->getStackSize(); 910141572Sharti 911141572Sharti if (RegInfo->hasBasePointer(MF)) { 912145007Sharti assert (hasFP(MF) && "VLAs and dynamic stack realign, but no FP?!"); 913143975Sharti if (FI < 0) { 9141590Srgrimes // Skip the saved EBP. 915141572Sharti return Offset + RegInfo->getSlotSize(); 916145007Sharti } else { 917145007Sharti assert((-(Offset + StackSize)) % MFI->getObjectAlignment(FI) == 0); 918143975Sharti return Offset + StackSize; 919141572Sharti } 9201590Srgrimes } else if (RegInfo->needsStackRealignment(MF)) { 921141572Sharti if (FI < 0) { 922145007Sharti // Skip the saved EBP. 923145007Sharti return Offset + RegInfo->getSlotSize(); 924143975Sharti } else { 925141572Sharti assert((-(Offset + StackSize)) % MFI->getObjectAlignment(FI) == 0); 926141572Sharti return Offset + StackSize; 927145971Sharti } 928145971Sharti // FIXME: Support tail calls 929141572Sharti } else { 930141572Sharti if (!hasFP(MF)) 931145007Sharti return Offset + StackSize; 932145007Sharti 933143975Sharti // Skip the saved EBP. 934141572Sharti Offset += RegInfo->getSlotSize(); 935145007Sharti 936138264Sharti // Skip the RETADDR move area 9371590Srgrimes const X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>(); 9381590Srgrimes int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta(); 939145971Sharti if (TailCallReturnAddrDelta < 0) 940145971Sharti Offset -= TailCallReturnAddrDelta; 9411590Srgrimes } 9421590Srgrimes 9431590Srgrimes return Offset; 9441590Srgrimes} 9451590Srgrimes 9461590Srgrimesint X86FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI, 947186713Sobrien unsigned &FrameReg) const { 948141252Sharti const X86RegisterInfo *RegInfo = 9491590Srgrimes static_cast<const X86RegisterInfo*>(MF.getTarget().getRegisterInfo()); 950186713Sobrien // We can't calculate offset from frame pointer if the stack is realigned, 9511590Srgrimes // so enforce usage of stack/base pointer. The base pointer is used when we 952186713Sobrien // have dynamic allocas in addition to dynamic realignment. 953143813Sharti if (RegInfo->hasBasePointer(MF)) 954186713Sobrien FrameReg = RegInfo->getBaseRegister(); 9551590Srgrimes else if (RegInfo->needsStackRealignment(MF)) 9561590Srgrimes FrameReg = RegInfo->getStackRegister(); 957146046Sharti else 958146046Sharti FrameReg = RegInfo->getFrameRegister(MF); 9591590Srgrimes return getFrameIndexOffset(MF, FI); 9601590Srgrimes} 9611590Srgrimes 9621590Srgrimesbool X86FrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB, 9631590Srgrimes MachineBasicBlock::iterator MI, 964141268Sharti const std::vector<CalleeSavedInfo> &CSI, 9651590Srgrimes const TargetRegisterInfo *TRI) const { 966143813Sharti if (CSI.empty()) 9671590Srgrimes return false; 968143813Sharti 969143975Sharti DebugLoc DL = MBB.findDebugLoc(MI); 970143975Sharti 971143975Sharti MachineFunction &MF = *MBB.getParent(); 972143975Sharti 973143975Sharti unsigned SlotSize = STI.is64Bit() ? 8 : 4; 974143975Sharti unsigned FPReg = TRI->getFrameRegister(MF); 975143813Sharti unsigned CalleeFrameSize = 0; 9761590Srgrimes 9771590Srgrimes const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); 978146046Sharti X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>(); 979146046Sharti 9801590Srgrimes // Push GPRs. It increases frame size. 9811590Srgrimes unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r; 9821590Srgrimes for (unsigned i = CSI.size(); i != 0; --i) { 9831590Srgrimes unsigned Reg = CSI[i-1].getReg(); 9841590Srgrimes if (!X86::GR64RegClass.contains(Reg) && 9851590Srgrimes !X86::GR32RegClass.contains(Reg)) 9861590Srgrimes continue; 9871590Srgrimes // Add the callee-saved register as live-in. It's killed at the spill. 9881590Srgrimes MBB.addLiveIn(Reg); 9891590Srgrimes if (Reg == FPReg) 9901590Srgrimes // X86RegisterInfo::emitPrologue will handle spilling of frame register. 9911590Srgrimes continue; 9921590Srgrimes CalleeFrameSize += SlotSize; 9931590Srgrimes BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, RegState::Kill) 994141268Sharti .setMIFlag(MachineInstr::FrameSetup); 9951590Srgrimes } 996143813Sharti 997143813Sharti X86FI->setCalleeSavedFrameSize(CalleeFrameSize); 9981590Srgrimes 999143813Sharti // Make XMM regs spilled. X86 does not have ability of push/pop XMM. 1000143813Sharti // It can be done by spilling XMMs to stack frame. 1001143813Sharti // Note that only Win64 ABI might spill XMMs. 1002143813Sharti for (unsigned i = CSI.size(); i != 0; --i) { 1003143813Sharti unsigned Reg = CSI[i-1].getReg(); 1004143813Sharti if (X86::GR64RegClass.contains(Reg) || 1005145007Sharti X86::GR32RegClass.contains(Reg)) 1006143813Sharti continue; 1007186713Sobrien // Add the callee-saved register as live-in. It's killed at the spill. 1008143813Sharti MBB.addLiveIn(Reg); 1009143813Sharti const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); 1010143813Sharti TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i-1].getFrameIdx(), 1011160450Sobrien RC, TRI); 1012143813Sharti } 1013145971Sharti 1014186713Sobrien return true; 1015186713Sobrien} 1016186713Sobrien 1017186713Sobrienbool X86FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 1018186713Sobrien MachineBasicBlock::iterator MI, 1019186713Sobrien const std::vector<CalleeSavedInfo> &CSI, 1020186713Sobrien const TargetRegisterInfo *TRI) const { 1021186713Sobrien if (CSI.empty()) 1022186713Sobrien return false; 1023143813Sharti 10241590Srgrimes DebugLoc DL = MBB.findDebugLoc(MI); 10251590Srgrimes 1026146046Sharti MachineFunction &MF = *MBB.getParent(); 1027146145Sharti const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); 1028146145Sharti 1029146145Sharti // Reload XMMs from stack frame. 1030146145Sharti for (unsigned i = 0, e = CSI.size(); i != e; ++i) { 1031146145Sharti unsigned Reg = CSI[i].getReg(); 1032146145Sharti if (X86::GR64RegClass.contains(Reg) || 1033146145Sharti X86::GR32RegClass.contains(Reg)) 1034146145Sharti continue; 1035146145Sharti const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); 1036146145Sharti TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), 1037146145Sharti RC, TRI); 1038146046Sharti } 1039145971Sharti 1040145971Sharti // POP GPRs. 1041145971Sharti unsigned FPReg = TRI->getFrameRegister(MF); 1042145971Sharti unsigned Opc = STI.is64Bit() ? X86::POP64r : X86::POP32r; 1043145971Sharti for (unsigned i = 0, e = CSI.size(); i != e; ++i) { 1044145971Sharti unsigned Reg = CSI[i].getReg(); 1045145971Sharti if (!X86::GR64RegClass.contains(Reg) && 1046145971Sharti !X86::GR32RegClass.contains(Reg)) 1047145971Sharti continue; 1048145971Sharti if (Reg == FPReg) 1049145971Sharti // X86RegisterInfo::emitEpilogue will handle restoring of frame register. 1050145971Sharti continue; 1051145971Sharti BuildMI(MBB, MI, DL, TII.get(Opc), Reg); 1052145971Sharti } 1053145971Sharti return true; 1054145971Sharti} 1055145971Sharti 1056145971Shartivoid 1057145971ShartiX86FrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, 1058145971Sharti RegScavenger *RS) const { 1059145971Sharti MachineFrameInfo *MFI = MF.getFrameInfo(); 1060145971Sharti const X86RegisterInfo *RegInfo = TM.getRegisterInfo(); 1061145971Sharti unsigned SlotSize = RegInfo->getSlotSize(); 1062145971Sharti 1063145971Sharti X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>(); 1064145971Sharti int64_t TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta(); 1065145971Sharti 1066145971Sharti if (TailCallReturnAddrDelta < 0) { 1067145971Sharti // create RETURNADDR area 1068145971Sharti // arg 1069145971Sharti // arg 1070145971Sharti // RETADDR 1071146046Sharti // { ... 1072146046Sharti // RETADDR area 1073146046Sharti // ... 10741590Srgrimes // } 10751590Srgrimes // [EBP] 10761590Srgrimes MFI->CreateFixedObject(-TailCallReturnAddrDelta, 10771590Srgrimes TailCallReturnAddrDelta - SlotSize, true); 10781590Srgrimes } 10791590Srgrimes 10801590Srgrimes if (hasFP(MF)) { 10811590Srgrimes assert((TailCallReturnAddrDelta <= 0) && 10821590Srgrimes "The Delta should always be zero or negative"); 10831590Srgrimes const TargetFrameLowering &TFI = *MF.getTarget().getFrameLowering(); 10841590Srgrimes 10851590Srgrimes // Create a frame entry for the EBP register that must be saved. 10861590Srgrimes int FrameIdx = MFI->CreateFixedObject(SlotSize, 10871590Srgrimes -(int)SlotSize + 1088141268Sharti TFI.getOffsetOfLocalArea() + 10891590Srgrimes TailCallReturnAddrDelta, 1090143813Sharti true); 1091143813Sharti assert(FrameIdx == MFI->getObjectIndexBegin() && 10921590Srgrimes "Slot for EBP register must be last in order to be found!"); 1093143813Sharti (void)FrameIdx; 1094145007Sharti } 1095145007Sharti 1096145007Sharti // Spill the BasePtr if it's used. 1097145007Sharti if (RegInfo->hasBasePointer(MF)) 1098145007Sharti MF.getRegInfo().setPhysRegUsed(RegInfo->getBaseRegister()); 1099143813Sharti} 1100143813Sharti 1101143813Shartistatic bool 1102143813ShartiHasNestArgument(const MachineFunction *MF) { 1103143813Sharti const Function *F = MF->getFunction(); 1104143959Sharti for (Function::const_arg_iterator I = F->arg_begin(), E = F->arg_end(); 11051590Srgrimes I != E; I++) { 1106143813Sharti if (I->hasNestAttr()) 11071590Srgrimes return true; 11081590Srgrimes } 1109146046Sharti return false; 1110146046Sharti} 11111590Srgrimes 11121590Srgrimes/// GetScratchRegister - Get a temp register for performing work in the 11131590Srgrimes/// segmented stack and the Erlang/HiPE stack prologue. Depending on platform 11141590Srgrimes/// and the properties of the function either one or two registers will be 11151590Srgrimes/// needed. Set primary to true for the first register, false for the second. 1116141268Shartistatic unsigned 11171590SrgrimesGetScratchRegister(bool Is64Bit, const MachineFunction &MF, bool Primary) { 1118143813Sharti CallingConv::ID CallingConvention = MF.getFunction()->getCallingConv(); 1119143813Sharti 11201590Srgrimes // Erlang stuff. 1121143813Sharti if (CallingConvention == CallingConv::HiPE) { 1122145007Sharti if (Is64Bit) 1123143813Sharti return Primary ? X86::R14 : X86::R13; 1124143968Sharti else 1125143813Sharti return Primary ? X86::EBX : X86::EDI; 1126143968Sharti } 1127143968Sharti 1128143968Sharti if (Is64Bit) 1129143813Sharti return Primary ? X86::R11 : X86::R12; 11301590Srgrimes 11311590Srgrimes bool IsNested = HasNestArgument(&MF); 1132146046Sharti 1133146046Sharti if (CallingConvention == CallingConv::X86_FastCall || 11341590Srgrimes CallingConvention == CallingConv::Fast) { 11351590Srgrimes if (IsNested) 1136146580Sharti report_fatal_error("Segmented stacks does not support fastcall with " 11371590Srgrimes "nested function."); 1138146581Sharti return Primary ? X86::EAX : X86::ECX; 1139146580Sharti } 11401590Srgrimes if (IsNested) 1141143813Sharti return Primary ? X86::EDX : X86::EAX; 1142143813Sharti return Primary ? X86::ECX : X86::EAX; 11431590Srgrimes} 1144143813Sharti 1145145007Sharti// The stack limit in the TCB is set to this many bytes above the actual stack 1146146580Sharti// limit. 1147143968Shartistatic const uint64_t kSplitStackAvailable = 256; 1148146580Sharti 1149143813Shartivoid 1150146580ShartiX86FrameLowering::adjustForSegmentedStacks(MachineFunction &MF) const { 11515814Sjkh MachineBasicBlock &prologueMBB = MF.front(); 11521590Srgrimes MachineFrameInfo *MFI = MF.getFrameInfo(); 11531590Srgrimes const X86InstrInfo &TII = *TM.getInstrInfo(); 1154146046Sharti uint64_t StackSize; 1155146046Sharti bool Is64Bit = STI.is64Bit(); 1156146046Sharti unsigned TlsReg, TlsOffset; 11571590Srgrimes DebugLoc DL; 11581590Srgrimes 11591590Srgrimes unsigned ScratchReg = GetScratchRegister(Is64Bit, MF, true); 11601590Srgrimes assert(!MF.getRegInfo().isLiveIn(ScratchReg) && 11611590Srgrimes "Scratch register is live-in"); 1162143255Sharti 1163143255Sharti if (MF.getFunction()->isVarArg()) 11641590Srgrimes report_fatal_error("Segmented stacks do not support vararg functions."); 11651590Srgrimes if (!STI.isTargetLinux() && !STI.isTargetDarwin() && 1166143255Sharti !STI.isTargetWin32() && !STI.isTargetFreeBSD()) 11671590Srgrimes report_fatal_error("Segmented stacks not supported on this platform."); 1168146345Sharti 1169146345Sharti MachineBasicBlock *allocMBB = MF.CreateMachineBasicBlock(); 1170146345Sharti MachineBasicBlock *checkMBB = MF.CreateMachineBasicBlock(); 1171146345Sharti X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>(); 1172146345Sharti bool IsNested = false; 1173146345Sharti 1174146345Sharti // We need to know if the function has a nest argument only in 64 bit mode. 1175146345Sharti if (Is64Bit) 11765814Sjkh IsNested = HasNestArgument(&MF); 1177146345Sharti 1178143255Sharti // The MOV R10, RAX needs to be in a different block, since the RET we emit in 1179146345Sharti // allocMBB needs to be last (terminating) instruction. 1180143254Sharti 1181146345Sharti for (MachineBasicBlock::livein_iterator i = prologueMBB.livein_begin(), 1182146345Sharti e = prologueMBB.livein_end(); i != e; i++) { 1183143255Sharti allocMBB->addLiveIn(*i); 1184146345Sharti checkMBB->addLiveIn(*i); 1185143959Sharti } 11861590Srgrimes 11871590Srgrimes if (IsNested) 1188146046Sharti allocMBB->addLiveIn(X86::R10); 1189146046Sharti 1190120184Smarcel MF.push_front(allocMBB); 1191120184Smarcel MF.push_front(checkMBB); 1192120184Smarcel 1193120184Smarcel // Eventually StackSize will be calculated by a link-time pass; which will 1194120184Smarcel // also decide whether checking code needs to be injected into this particular 1195120184Smarcel // prologue. 1196120184Smarcel StackSize = MFI->getStackSize(); 1197120184Smarcel 1198120184Smarcel // When the frame size is less than 256 we just compare the stack 1199143255Sharti // boundary directly to the value of the stack pointer, per gcc. 1200120184Smarcel bool CompareStackPointer = StackSize < kSplitStackAvailable; 1201146345Sharti 1202146345Sharti // Read the limit off the current stacklet off the stack_guard location. 1203146345Sharti if (Is64Bit) { 1204120184Smarcel if (STI.isTargetLinux()) { 1205146345Sharti TlsReg = X86::FS; 1206146345Sharti TlsOffset = 0x70; 1207143255Sharti } else if (STI.isTargetDarwin()) { 1208143255Sharti TlsReg = X86::GS; 1209146345Sharti TlsOffset = 0x60 + 90*8; // See pthread_machdep.h. Steal TLS slot 90. 1210146345Sharti } else if (STI.isTargetFreeBSD()) { 1211146345Sharti TlsReg = X86::FS; 1212120184Smarcel TlsOffset = 0x18; 1213143255Sharti } else { 1214146345Sharti report_fatal_error("Segmented stacks not supported on this platform."); 1215143959Sharti } 1216120184Smarcel 1217120184Smarcel if (CompareStackPointer) 1218120184Smarcel ScratchReg = X86::RSP; 1219120184Smarcel else 1220120184Smarcel BuildMI(checkMBB, DL, TII.get(X86::LEA64r), ScratchReg).addReg(X86::RSP) 1221138232Sharti .addImm(1).addReg(0).addImm(-StackSize).addReg(0); 1222120184Smarcel 1223120184Smarcel BuildMI(checkMBB, DL, TII.get(X86::CMP64rm)).addReg(ScratchReg) 1224120184Smarcel .addReg(0).addImm(1).addReg(0).addImm(TlsOffset).addReg(TlsReg); 1225146046Sharti } else { 1226157588Sfjoe if (STI.isTargetLinux()) { 1227157588Sfjoe TlsReg = X86::GS; 1228157588Sfjoe TlsOffset = 0x30; 1229157588Sfjoe } else if (STI.isTargetDarwin()) { 1230157588Sfjoe TlsReg = X86::GS; 1231157588Sfjoe TlsOffset = 0x48 + 90*4; 1232157588Sfjoe } else if (STI.isTargetWin32()) { 1233157588Sfjoe TlsReg = X86::FS; 1234157588Sfjoe TlsOffset = 0x14; // pvArbitrary, reserved for application use 1235157588Sfjoe } else if (STI.isTargetFreeBSD()) { 1236157588Sfjoe report_fatal_error("Segmented stacks not supported on FreeBSD i386."); 1237157588Sfjoe } else { 1238157588Sfjoe report_fatal_error("Segmented stacks not supported on this platform."); 1239157588Sfjoe } 1240157588Sfjoe 1241157588Sfjoe if (CompareStackPointer) 1242157588Sfjoe ScratchReg = X86::ESP; 1243157588Sfjoe else 1244157588Sfjoe BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP) 1245157588Sfjoe .addImm(1).addReg(0).addImm(-StackSize).addReg(0); 1246157588Sfjoe 1247157588Sfjoe if (STI.isTargetLinux() || STI.isTargetWin32()) { 1248157588Sfjoe BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)).addReg(ScratchReg) 1249157588Sfjoe .addReg(0).addImm(0).addReg(0).addImm(TlsOffset).addReg(TlsReg); 1250157588Sfjoe } else if (STI.isTargetDarwin()) { 1251157588Sfjoe 1252157588Sfjoe // TlsOffset doesn't fit into a mod r/m byte so we need an extra register 1253157588Sfjoe unsigned ScratchReg2; 1254157588Sfjoe bool SaveScratch2; 1255157588Sfjoe if (CompareStackPointer) { 1256157588Sfjoe // The primary scratch register is available for holding the TLS offset 1257157588Sfjoe ScratchReg2 = GetScratchRegister(Is64Bit, MF, true); 1258157588Sfjoe SaveScratch2 = false; 1259157588Sfjoe } else { 1260157588Sfjoe // Need to use a second register to hold the TLS offset 1261146046Sharti ScratchReg2 = GetScratchRegister(Is64Bit, MF, false); 1262146046Sharti 1263146046Sharti // Unfortunately, with fastcc the second scratch register may hold an arg 1264146046Sharti SaveScratch2 = MF.getRegInfo().isLiveIn(ScratchReg2); 1265146046Sharti } 1266146046Sharti 1267146046Sharti // If Scratch2 is live-in then it needs to be saved 126866853Swill assert((!MF.getRegInfo().isLiveIn(ScratchReg2) || SaveScratch2) && 126966853Swill "Scratch register is live-in and not saved"); 127066853Swill 127166853Swill if (SaveScratch2) 127266853Swill BuildMI(checkMBB, DL, TII.get(X86::PUSH32r)) 127366853Swill .addReg(ScratchReg2, RegState::Kill); 127466853Swill 1275143966Sharti BuildMI(checkMBB, DL, TII.get(X86::MOV32ri), ScratchReg2) 1276143966Sharti .addImm(TlsOffset); 127766853Swill BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)) 1278143955Sharti .addReg(ScratchReg) 1279138232Sharti .addReg(ScratchReg2).addImm(1).addReg(0) 1280143955Sharti .addImm(0) 128166853Swill .addReg(TlsReg); 1282143813Sharti 1283143813Sharti if (SaveScratch2) 1284143813Sharti BuildMI(checkMBB, DL, TII.get(X86::POP32r), ScratchReg2); 1285143813Sharti } 1286143813Sharti } 1287143955Sharti 1288143955Sharti // This jump is taken if SP >= (Stacklet Limit + Stack Space required). 1289143966Sharti // It jumps to normal execution of the function body. 1290143955Sharti BuildMI(checkMBB, DL, TII.get(X86::JA_4)).addMBB(&prologueMBB); 1291143955Sharti 1292143955Sharti // On 32 bit we first push the arguments size and then the frame size. On 64 1293143955Sharti // bit, we pass the stack frame size in r10 and the argument size in r11. 1294143955Sharti if (Is64Bit) { 1295143955Sharti // Functions with nested arguments use R10, so it needs to be saved across 1296143955Sharti // the call to _morestack 1297143955Sharti 1298143955Sharti if (IsNested) 1299143955Sharti BuildMI(allocMBB, DL, TII.get(X86::MOV64rr), X86::RAX).addReg(X86::R10); 1300143955Sharti 1301143955Sharti BuildMI(allocMBB, DL, TII.get(X86::MOV64ri), X86::R10) 1302143955Sharti .addImm(StackSize); 1303143955Sharti BuildMI(allocMBB, DL, TII.get(X86::MOV64ri), X86::R11) 1304143955Sharti .addImm(X86FI->getArgumentStackSize()); 1305143955Sharti MF.getRegInfo().setPhysRegUsed(X86::R10); 1306143813Sharti MF.getRegInfo().setPhysRegUsed(X86::R11); 1307143955Sharti } else { 1308143955Sharti BuildMI(allocMBB, DL, TII.get(X86::PUSHi32)) 1309143813Sharti .addImm(X86FI->getArgumentStackSize()); 1310143813Sharti BuildMI(allocMBB, DL, TII.get(X86::PUSHi32)) 1311143955Sharti .addImm(StackSize); 1312143955Sharti } 1313143813Sharti 1314143970Sharti // __morestack is in libgcc 1315143970Sharti if (Is64Bit) 1316143970Sharti BuildMI(allocMBB, DL, TII.get(X86::CALL64pcrel32)) 1317143970Sharti .addExternalSymbol("__morestack"); 1318146038Sharti else 1319146038Sharti BuildMI(allocMBB, DL, TII.get(X86::CALLpcrel32)) 1320143970Sharti .addExternalSymbol("__morestack"); 1321143969Sharti 1322143969Sharti if (IsNested) 132366853Swill BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET_RESTORE_R10)); 1324143955Sharti else 1325143955Sharti BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET)); 1326143955Sharti 1327143955Sharti allocMBB->addSuccessor(&prologueMBB); 1328143955Sharti 1329143955Sharti checkMBB->addSuccessor(allocMBB); 1330143970Sharti checkMBB->addSuccessor(&prologueMBB); 1331143969Sharti 1332143969Sharti#ifdef XDEBUG 1333143969Sharti MF.verify(); 1334143970Sharti#endif 133566853Swill} 1336143955Sharti 1337143966Sharti/// Erlang programs may need a special prologue to handle the stack size they 1338143955Sharti/// might need at runtime. That is because Erlang/OTP does not implement a C 1339143955Sharti/// stack but uses a custom implementation of hybrid stack/heap architecture. 1340143955Sharti/// (for more information see Eric Stenman's Ph.D. thesis: 1341143955Sharti/// http://publications.uu.se/uu/fulltext/nbn_se_uu_diva-2688.pdf) 1342143955Sharti/// 134366853Swill/// CheckStack: 134466853Swill/// temp0 = sp - MaxStack 1345143955Sharti/// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart 1346143955Sharti/// OldStart: 134766853Swill/// ... 134866853Swill/// IncStack: 1349143811Sharti/// call inc_stack # doubles the stack space 1350142557Sharti/// temp0 = sp - MaxStack 13511590Srgrimes/// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart 1352142557Shartivoid X86FrameLowering::adjustForHiPEPrologue(MachineFunction &MF) const { 1353143811Sharti const X86InstrInfo &TII = *TM.getInstrInfo(); 13541590Srgrimes MachineFrameInfo *MFI = MF.getFrameInfo(); 1355142557Sharti const unsigned SlotSize = TM.getRegisterInfo()->getSlotSize(); 1356142557Sharti const bool Is64Bit = STI.is64Bit(); 1357142557Sharti DebugLoc DL; 1358142557Sharti // HiPE-specific values 1359142557Sharti const unsigned HipeLeafWords = 24; 1360142557Sharti const unsigned CCRegisteredArgs = Is64Bit ? 6 : 5; 1361142557Sharti const unsigned Guaranteed = HipeLeafWords * SlotSize; 1362142557Sharti unsigned CallerStkArity = MF.getFunction()->arg_size() > CCRegisteredArgs ? 1363142557Sharti MF.getFunction()->arg_size() - CCRegisteredArgs : 0; 1364142557Sharti unsigned MaxStack = MFI->getStackSize() + CallerStkArity*SlotSize + SlotSize; 1365142557Sharti 1366142557Sharti assert(STI.isTargetLinux() && 1367142557Sharti "HiPE prologue is only supported on Linux operating systems."); 1368142557Sharti 1369142557Sharti // Compute the largest caller's frame that is needed to fit the callees' 1370142557Sharti // frames. This 'MaxStack' is computed from: 1371142557Sharti // 1372142557Sharti // a) the fixed frame size, which is the space needed for all spilled temps, 1373142557Sharti // b) outgoing on-stack parameter areas, and 1374142557Sharti // c) the minimum stack space this function needs to make available for the 1375143959Sharti // functions it calls (a tunable ABI property). 1376142557Sharti if (MFI->hasCalls()) { 1377142557Sharti unsigned MoreStackForCalls = 0; 1378142557Sharti 1379142557Sharti for (MachineFunction::iterator MBBI = MF.begin(), MBBE = MF.end(); 1380142557Sharti MBBI != MBBE; ++MBBI) 1381146027Sharti for (MachineBasicBlock::iterator MI = MBBI->begin(), ME = MBBI->end(); 1382143959Sharti MI != ME; ++MI) { 1383142557Sharti if (!MI->isCall()) 1384142557Sharti continue; 1385142557Sharti 1386142557Sharti // Get callee operand. 1387142557Sharti const MachineOperand &MO = MI->getOperand(0); 1388142557Sharti 1389142557Sharti // Only take account of global function calls (no closures etc.). 1390143240Sharti if (!MO.isGlobal()) 1391143812Sharti continue; 1392143240Sharti 1393143240Sharti const Function *F = dyn_cast<Function>(MO.getGlobal()); 1394143914Sharti if (!F) 1395143240Sharti continue; 1396143914Sharti 1397143914Sharti // Do not update 'MaxStack' for primitive and built-in functions 1398143914Sharti // (encoded with names either starting with "erlang."/"bif_" or not 1399143914Sharti // having a ".", such as a simple <Module>.<Function>.<Arity>, or an 1400143240Sharti // "_", such as the BIF "suspend_0") as they are executed on another 1401143914Sharti // stack. 1402143914Sharti if (F->getName().find("erlang.") != StringRef::npos || 1403143914Sharti F->getName().find("bif_") != StringRef::npos || 1404143240Sharti F->getName().find_first_of("._") == StringRef::npos) 1405143240Sharti continue; 1406143240Sharti 1407143656Sharti unsigned CalleeStkArity = 1408143240Sharti F->arg_size() > CCRegisteredArgs ? F->arg_size()-CCRegisteredArgs : 0; 1409143914Sharti if (HipeLeafWords - 1 > CalleeStkArity) 1410143240Sharti MoreStackForCalls = std::max(MoreStackForCalls, 1411143914Sharti (HipeLeafWords - 1 - CalleeStkArity) * SlotSize); 1412143967Sharti } 1413143656Sharti MaxStack += MoreStackForCalls; 1414143656Sharti } 1415143967Sharti 1416143967Sharti // If the stack frame needed is larger than the guaranteed then runtime checks 1417143919Sharti // and calls to "inc_stack_0" BIF should be inserted in the assembly prologue. 1418143240Sharti if (MaxStack > Guaranteed) { 1419143914Sharti MachineBasicBlock &prologueMBB = MF.front(); 1420143240Sharti MachineBasicBlock *stackCheckMBB = MF.CreateMachineBasicBlock(); 1421143914Sharti MachineBasicBlock *incStackMBB = MF.CreateMachineBasicBlock(); 1422143240Sharti 1423143240Sharti for (MachineBasicBlock::livein_iterator I = prologueMBB.livein_begin(), 1424241280Savg E = prologueMBB.livein_end(); I != E; I++) { 1425143240Sharti stackCheckMBB->addLiveIn(*I); 1426143914Sharti incStackMBB->addLiveIn(*I); 1427143240Sharti } 1428143240Sharti 1429143240Sharti MF.push_front(incStackMBB); 1430143240Sharti MF.push_front(stackCheckMBB); 1431143240Sharti 1432143240Sharti unsigned ScratchReg, SPReg, PReg, SPLimitOffset; 1433143240Sharti unsigned LEAop, CMPop, CALLop; 1434143240Sharti if (Is64Bit) { 1435143240Sharti SPReg = X86::RSP; 1436143812Sharti PReg = X86::RBP; 1437143812Sharti LEAop = X86::LEA64r; 1438143812Sharti CMPop = X86::CMP64rm; 1439143812Sharti CALLop = X86::CALL64pcrel32; 1440143252Sharti SPLimitOffset = 0x90; 1441143914Sharti } else { 1442143252Sharti SPReg = X86::ESP; 1443143955Sharti PReg = X86::EBP; 1444143252Sharti LEAop = X86::LEA32r; 1445143252Sharti CMPop = X86::CMP32rm; 1446143240Sharti CALLop = X86::CALLpcrel32; 1447143955Sharti SPLimitOffset = 0x4c; 1448143252Sharti } 1449143920Sharti 1450143252Sharti ScratchReg = GetScratchRegister(Is64Bit, MF, true); 1451143920Sharti assert(!MF.getRegInfo().isLiveIn(ScratchReg) && 1452143920Sharti "HiPE prologue scratch register is live-in"); 1453143920Sharti 1454143252Sharti // Create new MBB for StackCheck: 1455143252Sharti addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(LEAop), ScratchReg), 1456143252Sharti SPReg, false, -MaxStack); 1457143252Sharti // SPLimitOffset is in a fixed heap location (pointed by BP). 1458143920Sharti addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(CMPop)) 1459143955Sharti .addReg(ScratchReg), PReg, false, SPLimitOffset); 1460143920Sharti BuildMI(stackCheckMBB, DL, TII.get(X86::JAE_4)).addMBB(&prologueMBB); 1461143252Sharti 1462143252Sharti // Create new MBB for IncStack: 1463143966Sharti BuildMI(incStackMBB, DL, TII.get(CALLop)). 1464143955Sharti addExternalSymbol("inc_stack_0"); 1465143955Sharti addRegOffset(BuildMI(incStackMBB, DL, TII.get(LEAop), ScratchReg), 1466143955Sharti SPReg, false, -MaxStack); 1467143955Sharti addRegOffset(BuildMI(incStackMBB, DL, TII.get(CMPop)) 1468143955Sharti .addReg(ScratchReg), PReg, false, SPLimitOffset); 1469143955Sharti BuildMI(incStackMBB, DL, TII.get(X86::JLE_4)).addMBB(incStackMBB); 1470143955Sharti 1471143252Sharti stackCheckMBB->addSuccessor(&prologueMBB, 99); 1472143955Sharti stackCheckMBB->addSuccessor(incStackMBB, 1); 1473143252Sharti incStackMBB->addSuccessor(&prologueMBB, 99); 1474143966Sharti incStackMBB->addSuccessor(incStackMBB, 1); 1475143955Sharti } 1476143955Sharti#ifdef XDEBUG 1477143955Sharti MF.verify(); 1478143955Sharti#endif 1479143955Sharti} 1480143955Sharti 1481143252Shartivoid X86FrameLowering:: 1482143252ShartieliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 1483143920Sharti MachineBasicBlock::iterator I) const { 1484143252Sharti const X86InstrInfo &TII = *TM.getInstrInfo(); 1485143252Sharti const X86RegisterInfo &RegInfo = *TM.getRegisterInfo(); 1486143252Sharti unsigned StackPtr = RegInfo.getStackRegister(); 1487143252Sharti bool reseveCallFrame = hasReservedCallFrame(MF); 1488143252Sharti int Opcode = I->getOpcode(); 1489143920Sharti bool isDestroy = Opcode == TII.getCallFrameDestroyOpcode(); 1490143955Sharti bool IsLP64 = STI.isTarget64BitLP64(); 1491143920Sharti DebugLoc DL = I->getDebugLoc(); 1492143252Sharti uint64_t Amount = !reseveCallFrame ? I->getOperand(0).getImm() : 0; 1493143252Sharti uint64_t CalleeAmt = isDestroy ? I->getOperand(1).getImm() : 0; 1494143252Sharti I = MBB.erase(I); 1495143252Sharti 1496143252Sharti if (!reseveCallFrame) { 1497143252Sharti // If the stack pointer can be changed after prologue, turn the 1498143252Sharti // adjcallstackup instruction into a 'sub ESP, <amt>' and the 1499143252Sharti // adjcallstackdown instruction into 'add ESP, <amt>' 1500143252Sharti // TODO: consider using push / pop instead of sub + store / add 1501143966Sharti if (Amount == 0) 1502143252Sharti return; 1503143252Sharti 1504143955Sharti // We need to keep the stack aligned properly. To do this, we round the 1505143252Sharti // amount of space needed for the outgoing arguments up to the next 1506143252Sharti // alignment boundary. 1507143252Sharti unsigned StackAlign = TM.getFrameLowering()->getStackAlignment(); 1508143252Sharti Amount = (Amount + StackAlign - 1) / StackAlign * StackAlign; 1509143955Sharti 1510143955Sharti MachineInstr *New = 0; 1511143252Sharti if (Opcode == TII.getCallFrameSetupOpcode()) { 1512143252Sharti New = BuildMI(MF, DL, TII.get(getSUBriOpcode(IsLP64, Amount)), 1513143252Sharti StackPtr) 1514143252Sharti .addReg(StackPtr) 1515143812Sharti .addImm(Amount); 1516143914Sharti } else { 1517143812Sharti assert(Opcode == TII.getCallFrameDestroyOpcode()); 1518143964Sharti 1519143913Sharti // Factor out the amount the callee already popped. 1520143812Sharti Amount -= CalleeAmt; 1521143812Sharti 1522143812Sharti if (Amount) { 1523143812Sharti unsigned Opc = getADDriOpcode(IsLP64, Amount); 1524143812Sharti New = BuildMI(MF, DL, TII.get(Opc), StackPtr) 1525143920Sharti .addReg(StackPtr).addImm(Amount); 1526143812Sharti } 1527143920Sharti } 1528143812Sharti 1529143920Sharti if (New) { 1530143920Sharti // The EFLAGS implicit def is dead. 1531143966Sharti New->getOperand(3).setIsDead(); 1532143965Sharti 1533143812Sharti // Replace the pseudo instruction with a new instruction. 1534143813Sharti MBB.insert(I, New); 1535143812Sharti } 1536143812Sharti 1537143955Sharti return; 1538143955Sharti } 1539143966Sharti 1540143964Sharti if (Opcode == TII.getCallFrameDestroyOpcode() && CalleeAmt) { 1541143812Sharti // If we are performing frame pointer elimination and if the callee pops 1542143813Sharti // something off the stack pointer, add it back. We do this until we have 1543143812Sharti // more advanced stack pointer tracking ability. 1544143812Sharti unsigned Opc = getSUBriOpcode(IsLP64, CalleeAmt); 1545143955Sharti MachineInstr *New = BuildMI(MF, DL, TII.get(Opc), StackPtr) 1546143955Sharti .addReg(StackPtr).addImm(CalleeAmt); 1547143920Sharti 1548143920Sharti // The EFLAGS implicit def is dead. 1549143920Sharti New->getOperand(3).setIsDead(); 1550143920Sharti 1551143812Sharti // We are not tracking the stack pointer adjustment by the callee, so make 1552143920Sharti // sure we restore the stack pointer immediately after the call, there may 1553143920Sharti // be spill code inserted between the CALL and ADJCALLSTACKUP instructions. 1554143920Sharti MachineBasicBlock::iterator B = MBB.begin(); 1555143920Sharti while (I != B && !llvm::prior(I)->isCall()) 1556143920Sharti --I; 1557143920Sharti MBB.insert(I, New); 1558143812Sharti } 1559143812Sharti} 1560143966Sharti 1561143812Sharti