SystemZOperators.td revision 263508
1//===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10//===----------------------------------------------------------------------===// 11// Type profiles 12//===----------------------------------------------------------------------===// 13def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>]>; 14def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 15 SDTCisVT<1, i64>]>; 16def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 17def SDT_ZCmp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>; 18def SDT_ZICmp : SDTypeProfile<0, 3, 19 [SDTCisSameAs<0, 1>, 20 SDTCisVT<2, i32>]>; 21def SDT_ZBRCCMask : SDTypeProfile<0, 3, 22 [SDTCisVT<0, i8>, 23 SDTCisVT<1, i8>, 24 SDTCisVT<2, OtherVT>]>; 25def SDT_ZSelectCCMask : SDTypeProfile<1, 4, 26 [SDTCisSameAs<0, 1>, 27 SDTCisSameAs<1, 2>, 28 SDTCisVT<3, i8>, 29 SDTCisVT<4, i8>]>; 30def SDT_ZWrapPtr : SDTypeProfile<1, 1, 31 [SDTCisSameAs<0, 1>, 32 SDTCisPtrTy<0>]>; 33def SDT_ZWrapOffset : SDTypeProfile<1, 2, 34 [SDTCisSameAs<0, 1>, 35 SDTCisSameAs<0, 2>, 36 SDTCisPtrTy<0>]>; 37def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>; 38def SDT_ZExtractAccess : SDTypeProfile<1, 1, 39 [SDTCisVT<0, i32>, 40 SDTCisVT<1, i8>]>; 41def SDT_ZGR128Binary32 : SDTypeProfile<1, 2, 42 [SDTCisVT<0, untyped>, 43 SDTCisVT<1, untyped>, 44 SDTCisVT<2, i32>]>; 45def SDT_ZGR128Binary64 : SDTypeProfile<1, 2, 46 [SDTCisVT<0, untyped>, 47 SDTCisVT<1, untyped>, 48 SDTCisVT<2, i64>]>; 49def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5, 50 [SDTCisVT<0, i32>, 51 SDTCisPtrTy<1>, 52 SDTCisVT<2, i32>, 53 SDTCisVT<3, i32>, 54 SDTCisVT<4, i32>, 55 SDTCisVT<5, i32>]>; 56def SDT_ZAtomicCmpSwapW : SDTypeProfile<1, 6, 57 [SDTCisVT<0, i32>, 58 SDTCisPtrTy<1>, 59 SDTCisVT<2, i32>, 60 SDTCisVT<3, i32>, 61 SDTCisVT<4, i32>, 62 SDTCisVT<5, i32>, 63 SDTCisVT<6, i32>]>; 64def SDT_ZMemMemLength : SDTypeProfile<0, 3, 65 [SDTCisPtrTy<0>, 66 SDTCisPtrTy<1>, 67 SDTCisVT<2, i64>]>; 68def SDT_ZMemMemLoop : SDTypeProfile<0, 4, 69 [SDTCisPtrTy<0>, 70 SDTCisPtrTy<1>, 71 SDTCisVT<2, i64>, 72 SDTCisVT<3, i64>]>; 73def SDT_ZString : SDTypeProfile<1, 3, 74 [SDTCisPtrTy<0>, 75 SDTCisPtrTy<1>, 76 SDTCisPtrTy<2>, 77 SDTCisVT<3, i32>]>; 78def SDT_ZI32Intrinsic : SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>; 79def SDT_ZPrefetch : SDTypeProfile<0, 2, 80 [SDTCisVT<0, i8>, 81 SDTCisPtrTy<1>]>; 82 83//===----------------------------------------------------------------------===// 84// Node definitions 85//===----------------------------------------------------------------------===// 86 87// These are target-independent nodes, but have target-specific formats. 88def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 89 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>; 90def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 91 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue, 92 SDNPOutGlue]>; 93 94// Nodes for SystemZISD::*. See SystemZISelLowering.h for more details. 95def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone, 96 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; 97def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 98 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 99 SDNPVariadic]>; 100def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 101 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 102 SDNPVariadic]>; 103def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 104def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", 105 SDT_ZWrapOffset, []>; 106def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp, [SDNPOutGlue]>; 107def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp, [SDNPOutGlue]>; 108def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp, [SDNPOutGlue]>; 109def z_br_ccmask : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask, 110 [SDNPHasChain, SDNPInGlue]>; 111def z_select_ccmask : SDNode<"SystemZISD::SELECT_CCMASK", SDT_ZSelectCCMask, 112 [SDNPInGlue]>; 113def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>; 114def z_extract_access : SDNode<"SystemZISD::EXTRACT_ACCESS", 115 SDT_ZExtractAccess>; 116def z_umul_lohi64 : SDNode<"SystemZISD::UMUL_LOHI64", SDT_ZGR128Binary64>; 117def z_sdivrem32 : SDNode<"SystemZISD::SDIVREM32", SDT_ZGR128Binary32>; 118def z_sdivrem64 : SDNode<"SystemZISD::SDIVREM64", SDT_ZGR128Binary64>; 119def z_udivrem32 : SDNode<"SystemZISD::UDIVREM32", SDT_ZGR128Binary32>; 120def z_udivrem64 : SDNode<"SystemZISD::UDIVREM64", SDT_ZGR128Binary64>; 121 122class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW> 123 : SDNode<"SystemZISD::"##name, profile, 124 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; 125 126def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">; 127def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">; 128def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">; 129def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">; 130def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">; 131def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">; 132def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">; 133def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">; 134def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">; 135def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">; 136def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">; 137def z_atomic_cmp_swapw : AtomicWOp<"ATOMIC_CMP_SWAPW", SDT_ZAtomicCmpSwapW>; 138 139def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength, 140 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 141def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop, 142 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 143def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength, 144 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 145def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop, 146 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 147def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength, 148 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 149def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop, 150 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 151def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength, 152 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 153def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop, 154 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 155def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLength, 156 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>; 157def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoop, 158 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>; 159def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZString, 160 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>; 161def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString, 162 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 163def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZString, 164 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>; 165def z_ipm : SDNode<"SystemZISD::IPM", SDT_ZI32Intrinsic, 166 [SDNPInGlue]>; 167def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch, 168 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, 169 SDNPMemOperand]>; 170 171//===----------------------------------------------------------------------===// 172// Pattern fragments 173//===----------------------------------------------------------------------===// 174 175// Signed and unsigned comparisons. 176def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 177 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 178 return Type != SystemZICMP::UnsignedOnly; 179}]>; 180def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 181 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 182 return Type != SystemZICMP::SignedOnly; 183}]>; 184 185// Register- and memory-based TEST UNDER MASK. 186def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, imm)>; 187def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>; 188 189// Register sign-extend operations. Sub-32-bit values are represented as i32s. 190def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>; 191def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>; 192def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>; 193 194// Register zero-extend operations. Sub-32-bit values are represented as i32s. 195def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>; 196def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>; 197def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>; 198 199// Typed floating-point loads. 200def loadf32 : PatFrag<(ops node:$src), (f32 (load node:$src))>; 201def loadf64 : PatFrag<(ops node:$src), (f64 (load node:$src))>; 202 203// Extending loads in which the extension type can be signed. 204def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 205 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 206 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD; 207}]>; 208def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 209 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 210}]>; 211def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 212 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 213}]>; 214def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 215 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 216}]>; 217 218// Extending loads in which the extension type can be unsigned. 219def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 220 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 221 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD; 222}]>; 223def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 224 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 225}]>; 226def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 227 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 228}]>; 229def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 230 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 231}]>; 232 233// Extending loads in which the extension type doesn't matter. 234def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 235 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD; 236}]>; 237def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 238 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 239}]>; 240def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 241 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 242}]>; 243def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 244 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 245}]>; 246 247// Aligned loads. 248class AlignedLoad<SDPatternOperator load> 249 : PatFrag<(ops node:$addr), (load node:$addr), [{ 250 LoadSDNode *Load = cast<LoadSDNode>(N); 251 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize(); 252}]>; 253def aligned_load : AlignedLoad<load>; 254def aligned_asextloadi16 : AlignedLoad<asextloadi16>; 255def aligned_asextloadi32 : AlignedLoad<asextloadi32>; 256def aligned_azextloadi16 : AlignedLoad<azextloadi16>; 257def aligned_azextloadi32 : AlignedLoad<azextloadi32>; 258 259// Aligned stores. 260class AlignedStore<SDPatternOperator store> 261 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 262 StoreSDNode *Store = cast<StoreSDNode>(N); 263 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize(); 264}]>; 265def aligned_store : AlignedStore<store>; 266def aligned_truncstorei16 : AlignedStore<truncstorei16>; 267def aligned_truncstorei32 : AlignedStore<truncstorei32>; 268 269// Non-volatile loads. Used for instructions that might access the storage 270// location multiple times. 271class NonvolatileLoad<SDPatternOperator load> 272 : PatFrag<(ops node:$addr), (load node:$addr), [{ 273 LoadSDNode *Load = cast<LoadSDNode>(N); 274 return !Load->isVolatile(); 275}]>; 276def nonvolatile_load : NonvolatileLoad<load>; 277def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>; 278def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>; 279def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>; 280 281// Non-volatile stores. 282class NonvolatileStore<SDPatternOperator store> 283 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 284 StoreSDNode *Store = cast<StoreSDNode>(N); 285 return !Store->isVolatile(); 286}]>; 287def nonvolatile_store : NonvolatileStore<store>; 288def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>; 289def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>; 290def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>; 291 292// A store of a load that can be implemented using MVC. 293def mvc_store : PatFrag<(ops node:$value, node:$addr), 294 (unindexedstore node:$value, node:$addr), 295 [{ return storeLoadCanUseMVC(N); }]>; 296 297// Binary read-modify-write operations on memory in which the other 298// operand is also memory and for which block operations like NC can 299// be used. There are two patterns for each operator, depending on 300// which operand contains the "other" load. 301multiclass block_op<SDPatternOperator operator> { 302 def "1" : PatFrag<(ops node:$value, node:$addr), 303 (unindexedstore (operator node:$value, 304 (unindexedload node:$addr)), 305 node:$addr), 306 [{ return storeLoadCanUseBlockBinary(N, 0); }]>; 307 def "2" : PatFrag<(ops node:$value, node:$addr), 308 (unindexedstore (operator (unindexedload node:$addr), 309 node:$value), 310 node:$addr), 311 [{ return storeLoadCanUseBlockBinary(N, 1); }]>; 312} 313defm block_and : block_op<and>; 314defm block_or : block_op<or>; 315defm block_xor : block_op<xor>; 316 317// Insertions. 318def inserti8 : PatFrag<(ops node:$src1, node:$src2), 319 (or (and node:$src1, -256), node:$src2)>; 320def insertll : PatFrag<(ops node:$src1, node:$src2), 321 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>; 322def insertlh : PatFrag<(ops node:$src1, node:$src2), 323 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>; 324def inserthl : PatFrag<(ops node:$src1, node:$src2), 325 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>; 326def inserthh : PatFrag<(ops node:$src1, node:$src2), 327 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>; 328def insertlf : PatFrag<(ops node:$src1, node:$src2), 329 (or (and node:$src1, 0xffffffff00000000), node:$src2)>; 330def inserthf : PatFrag<(ops node:$src1, node:$src2), 331 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>; 332 333// ORs that can be treated as insertions. 334def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2), 335 (or node:$src1, node:$src2), [{ 336 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits(); 337 return CurDAG->MaskedValueIsZero(N->getOperand(0), 338 APInt::getLowBitsSet(BitWidth, 8)); 339}]>; 340 341// ORs that can be treated as reversed insertions. 342def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2), 343 (or node:$src1, node:$src2), [{ 344 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits(); 345 return CurDAG->MaskedValueIsZero(N->getOperand(1), 346 APInt::getLowBitsSet(BitWidth, 8)); 347}]>; 348 349// Integer absolute, matching the canonical form generated by DAGCombiner. 350def z_iabs32 : PatFrag<(ops node:$src), 351 (xor (add node:$src, (sra node:$src, (i32 31))), 352 (sra node:$src, (i32 31)))>; 353def z_iabs64 : PatFrag<(ops node:$src), 354 (xor (add node:$src, (sra node:$src, (i32 63))), 355 (sra node:$src, (i32 63)))>; 356def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>; 357def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>; 358 359// Fused multiply-add and multiply-subtract, but with the order of the 360// operands matching SystemZ's MA and MS instructions. 361def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 362 (fma node:$src2, node:$src3, node:$src1)>; 363def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 364 (fma node:$src2, node:$src3, (fneg node:$src1))>; 365 366// Floating-point negative absolute. 367def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>; 368 369// Create a unary operator that loads from memory and then performs 370// the given operation on it. 371class loadu<SDPatternOperator operator, SDPatternOperator load = load> 372 : PatFrag<(ops node:$addr), (operator (load node:$addr))>; 373 374// Create a store operator that performs the given unary operation 375// on the value before storing it. 376class storeu<SDPatternOperator operator, SDPatternOperator store = store> 377 : PatFrag<(ops node:$value, node:$addr), 378 (store (operator node:$value), node:$addr)>; 379