SparcInstrAliases.td revision 263763 
1//===-- SparcInstrAliases.td - Instruction Aliases for Sparc Target -------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains instruction aliases for Sparc.
11//===----------------------------------------------------------------------===//
12
13// Instruction aliases for conditional moves.
14
15// mov<cond> <ccreg> rs2, rd
16multiclass cond_mov_alias<string cond, int condVal, string ccreg,
17                          Instruction movrr, Instruction movri,
18                          Instruction fmovs, Instruction fmovd> {
19
20  // mov<cond> (%icc|%xcc|%fcc0), rs2, rd
21  def : InstAlias<!strconcat(!strconcat(!strconcat("mov", cond), ccreg),
22                             ", $rs2, $rd"),
23                  (movrr IntRegs:$rd, IntRegs:$rs2, condVal)>;
24
25  // mov<cond> (%icc|%xcc|%fcc0), simm11, rd
26  def : InstAlias<!strconcat(!strconcat(!strconcat("mov", cond), ccreg),
27                             ", $simm11, $rd"),
28                  (movri IntRegs:$rd, i32imm:$simm11, condVal)>;
29
30  // fmovs<cond> (%icc|%xcc|%fcc0), $rs2, $rd
31  def : InstAlias<!strconcat(!strconcat(!strconcat("fmovs", cond), ccreg),
32                             ", $rs2, $rd"),
33                  (fmovs FPRegs:$rd, FPRegs:$rs2, condVal)>;
34
35  // fmovd<cond> (%icc|%xcc|%fcc0), $rs2, $rd
36  def : InstAlias<!strconcat(!strconcat(!strconcat("fmovd", cond), ccreg),
37                             ", $rs2, $rd"),
38                  (fmovd DFPRegs:$rd, DFPRegs:$rs2, condVal)>;
39}
40
41
42// Instruction aliases for integer conditional branches and moves.
43multiclass int_cond_alias<string cond, int condVal> {
44
45  // b<cond> $imm
46  def : InstAlias<!strconcat(!strconcat("b", cond), " $imm"),
47                  (BCOND brtarget:$imm, condVal)>;
48
49  // b<cond> %xcc, $imm
50  def : InstAlias<!strconcat(!strconcat("b", cond), " %xcc, $imm"),
51                  (BPXCC brtarget:$imm, condVal)>, Requires<[Is64Bit]>;
52
53  defm : cond_mov_alias<cond, condVal, " %icc",
54                            MOVICCrr, MOVICCri,
55                            FMOVS_ICC, FMOVD_ICC>, Requires<[HasV9]>;
56
57  defm : cond_mov_alias<cond, condVal, " %xcc",
58                            MOVXCCrr, MOVXCCri,
59                            FMOVS_XCC, FMOVD_XCC>, Requires<[Is64Bit]>;
60
61  // fmovq<cond> (%icc|%xcc), $rs2, $rd
62  def : InstAlias<!strconcat(!strconcat("fmovq", cond), " %icc, $rs2, $rd"),
63                  (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, condVal)>,
64                  Requires<[HasV9, HasHardQuad]>;
65  def : InstAlias<!strconcat(!strconcat("fmovq", cond), " %xcc, $rs2, $rd"),
66                  (FMOVQ_XCC QFPRegs:$rd, QFPRegs:$rs2, condVal)>,
67                  Requires<[Is64Bit, HasHardQuad]>;
68
69}
70
71
72// Instruction aliases for floating point conditional branches and moves.
73multiclass fp_cond_alias<string cond, int condVal> {
74
75  // fb<cond> $imm
76  def : InstAlias<!strconcat(!strconcat("fb", cond), " $imm"),
77                  (FBCOND brtarget:$imm, condVal), 0>;
78
79  defm : cond_mov_alias<cond, condVal, " %fcc0",
80                        MOVFCCrr, MOVFCCri,
81                        FMOVS_FCC, FMOVD_FCC>, Requires<[HasV9]>;
82
83  // fmovq<cond> %fcc0, $rs2, $rd
84  def : InstAlias<!strconcat(!strconcat("fmovq", cond), " %fcc0, $rs2, $rd"),
85                  (FMOVQ_ICC QFPRegs:$rd, QFPRegs:$rs2, condVal)>,
86                  Requires<[HasV9, HasHardQuad]>;
87}
88
89defm : int_cond_alias<"a",    0b1000>;
90defm : int_cond_alias<"n",    0b0000>;
91defm : int_cond_alias<"ne",   0b1001>;
92defm : int_cond_alias<"e",    0b0001>;
93defm : int_cond_alias<"g",    0b1010>;
94defm : int_cond_alias<"le",   0b0010>;
95defm : int_cond_alias<"ge",   0b1011>;
96defm : int_cond_alias<"l",    0b0011>;
97defm : int_cond_alias<"gu",   0b1100>;
98defm : int_cond_alias<"leu",  0b0100>;
99defm : int_cond_alias<"cc",   0b1101>;
100defm : int_cond_alias<"cs",   0b0101>;
101defm : int_cond_alias<"pos",  0b1110>;
102defm : int_cond_alias<"neg",  0b0110>;
103defm : int_cond_alias<"vc",   0b1111>;
104defm : int_cond_alias<"vs",   0b0111>;
105
106defm : fp_cond_alias<"u",     0b0111>;
107defm : fp_cond_alias<"g",     0b0110>;
108defm : fp_cond_alias<"ug",    0b0101>;
109defm : fp_cond_alias<"l",     0b0100>;
110defm : fp_cond_alias<"ul",    0b0011>;
111defm : fp_cond_alias<"lg",    0b0010>;
112defm : fp_cond_alias<"ne",    0b0001>;
113defm : fp_cond_alias<"e",     0b1001>;
114defm : fp_cond_alias<"ue",    0b1010>;
115defm : fp_cond_alias<"ge",    0b1011>;
116defm : fp_cond_alias<"uge",   0b1100>;
117defm : fp_cond_alias<"le",    0b1101>;
118defm : fp_cond_alias<"ule",   0b1110>;
119defm : fp_cond_alias<"o",     0b1111>;
120
121
122// Instruction aliases for JMPL.
123
124// jmp addr -> jmpl addr, %g0
125def : InstAlias<"jmp $addr", (JMPLrr G0, MEMrr:$addr)>;
126def : InstAlias<"jmp $addr", (JMPLri G0, MEMri:$addr)>;
127
128// call addr -> jmpl addr, %o7
129def : InstAlias<"call $addr", (JMPLrr O7, MEMrr:$addr)>;
130def : InstAlias<"call $addr", (JMPLri O7, MEMri:$addr)>;
131
132// retl -> RETL 8
133def : InstAlias<"retl", (RETL 8)>;
134
135// ret -> RET 8
136def : InstAlias<"ret", (RET 8)>;
137
138// mov reg, rd -> or %g0, reg, rd
139def : InstAlias<"mov $rs2, $rd", (ORrr IntRegs:$rd, G0, IntRegs:$rs2)>;
140
141// mov simm13, rd -> or %g0, simm13, rd
142def : InstAlias<"mov $simm13, $rd", (ORri IntRegs:$rd, G0, i32imm:$simm13)>;
143