AMDGPUAsmBackend.cpp revision 263508 
1//===-- AMDGPUAsmBackend.cpp - AMDGPU Assembler Backend -------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8/// \file
9//===----------------------------------------------------------------------===//
10
11#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
12#include "llvm/ADT/StringRef.h"
13#include "llvm/MC/MCAsmBackend.h"
14#include "llvm/MC/MCAssembler.h"
15#include "llvm/MC/MCObjectWriter.h"
16#include "llvm/MC/MCValue.h"
17#include "llvm/Support/TargetRegistry.h"
18
19using namespace llvm;
20
21namespace {
22
23class AMDGPUMCObjectWriter : public MCObjectWriter {
24public:
25  AMDGPUMCObjectWriter(raw_ostream &OS) : MCObjectWriter(OS, true) { }
26  virtual void ExecutePostLayoutBinding(MCAssembler &Asm,
27                                        const MCAsmLayout &Layout) {
28    //XXX: Implement if necessary.
29  }
30  virtual void RecordRelocation(const MCAssembler &Asm,
31                                const MCAsmLayout &Layout,
32                                const MCFragment *Fragment,
33                                const MCFixup &Fixup,
34                                MCValue Target, uint64_t &FixedValue) {
35    assert(!"Not implemented");
36  }
37
38  virtual void WriteObject(MCAssembler &Asm, const MCAsmLayout &Layout);
39
40};
41
42class AMDGPUAsmBackend : public MCAsmBackend {
43public:
44  AMDGPUAsmBackend(const Target &T)
45    : MCAsmBackend() {}
46
47  virtual unsigned getNumFixupKinds() const { return 0; };
48  virtual void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
49                          uint64_t Value) const;
50  virtual bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
51                                    const MCRelaxableFragment *DF,
52                                    const MCAsmLayout &Layout) const {
53    return false;
54  }
55  virtual void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
56    assert(!"Not implemented");
57  }
58  virtual bool mayNeedRelaxation(const MCInst &Inst) const { return false; }
59  virtual bool writeNopData(uint64_t Count, MCObjectWriter *OW) const {
60    return true;
61  }
62};
63
64} //End anonymous namespace
65
66void AMDGPUMCObjectWriter::WriteObject(MCAssembler &Asm,
67                                       const MCAsmLayout &Layout) {
68  for (MCAssembler::iterator I = Asm.begin(), E = Asm.end(); I != E; ++I) {
69    Asm.writeSectionData(I, Layout);
70  }
71}
72
73void AMDGPUAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,
74                                  unsigned DataSize, uint64_t Value) const {
75
76  uint16_t *Dst = (uint16_t*)(Data + Fixup.getOffset());
77  assert(Fixup.getKind() == FK_PCRel_4);
78  *Dst = (Value - 4) / 4;
79}
80
81//===----------------------------------------------------------------------===//
82// ELFAMDGPUAsmBackend class
83//===----------------------------------------------------------------------===//
84
85namespace {
86
87class ELFAMDGPUAsmBackend : public AMDGPUAsmBackend {
88public:
89  ELFAMDGPUAsmBackend(const Target &T) : AMDGPUAsmBackend(T) { }
90
91  MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
92    return createAMDGPUELFObjectWriter(OS);
93  }
94};
95
96} // end anonymous namespace
97
98MCAsmBackend *llvm::createAMDGPUAsmBackend(const Target &T,
99                                           const MCRegisterInfo &MRI,
100                                           StringRef TT,
101                                           StringRef CPU) {
102  return new ELFAMDGPUAsmBackend(T);
103}
104