PPCCTRLoops.cpp revision 263508
1//===-- PPCCTRLoops.cpp - Identify and generate CTR loops -----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This pass identifies loops where we can generate the PPC branch instructions 11// that decrement and test the count register (CTR) (bdnz and friends). 12// 13// The pattern that defines the induction variable can changed depending on 14// prior optimizations. For example, the IndVarSimplify phase run by 'opt' 15// normalizes induction variables, and the Loop Strength Reduction pass 16// run by 'llc' may also make changes to the induction variable. 17// 18// Criteria for CTR loops: 19// - Countable loops (w/ ind. var for a trip count) 20// - Try inner-most loops first 21// - No nested CTR loops. 22// - No function calls in loops. 23// 24//===----------------------------------------------------------------------===// 25 26#define DEBUG_TYPE "ctrloops" 27 28#include "llvm/Transforms/Scalar.h" 29#include "llvm/ADT/Statistic.h" 30#include "llvm/ADT/STLExtras.h" 31#include "llvm/Analysis/Dominators.h" 32#include "llvm/Analysis/LoopInfo.h" 33#include "llvm/Analysis/ScalarEvolutionExpander.h" 34#include "llvm/IR/Constants.h" 35#include "llvm/IR/DerivedTypes.h" 36#include "llvm/IR/InlineAsm.h" 37#include "llvm/IR/Instructions.h" 38#include "llvm/IR/IntrinsicInst.h" 39#include "llvm/IR/Module.h" 40#include "llvm/PassSupport.h" 41#include "llvm/Support/CommandLine.h" 42#include "llvm/Support/Debug.h" 43#include "llvm/Support/ValueHandle.h" 44#include "llvm/Support/raw_ostream.h" 45#include "llvm/Transforms/Utils/BasicBlockUtils.h" 46#include "llvm/Transforms/Utils/Local.h" 47#include "llvm/Transforms/Utils/LoopUtils.h" 48#include "llvm/Target/TargetLibraryInfo.h" 49#include "PPCTargetMachine.h" 50#include "PPC.h" 51 52#ifndef NDEBUG 53#include "llvm/CodeGen/MachineDominators.h" 54#include "llvm/CodeGen/MachineFunction.h" 55#include "llvm/CodeGen/MachineFunctionPass.h" 56#include "llvm/CodeGen/MachineRegisterInfo.h" 57#endif 58 59#include <algorithm> 60#include <vector> 61 62using namespace llvm; 63 64#ifndef NDEBUG 65static cl::opt<int> CTRLoopLimit("ppc-max-ctrloop", cl::Hidden, cl::init(-1)); 66#endif 67 68STATISTIC(NumCTRLoops, "Number of loops converted to CTR loops"); 69 70namespace llvm { 71 void initializePPCCTRLoopsPass(PassRegistry&); 72#ifndef NDEBUG 73 void initializePPCCTRLoopsVerifyPass(PassRegistry&); 74#endif 75} 76 77namespace { 78 struct PPCCTRLoops : public FunctionPass { 79 80#ifndef NDEBUG 81 static int Counter; 82#endif 83 84 public: 85 static char ID; 86 87 PPCCTRLoops() : FunctionPass(ID), TM(0) { 88 initializePPCCTRLoopsPass(*PassRegistry::getPassRegistry()); 89 } 90 PPCCTRLoops(PPCTargetMachine &TM) : FunctionPass(ID), TM(&TM) { 91 initializePPCCTRLoopsPass(*PassRegistry::getPassRegistry()); 92 } 93 94 virtual bool runOnFunction(Function &F); 95 96 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 97 AU.addRequired<LoopInfo>(); 98 AU.addPreserved<LoopInfo>(); 99 AU.addRequired<DominatorTree>(); 100 AU.addPreserved<DominatorTree>(); 101 AU.addRequired<ScalarEvolution>(); 102 } 103 104 private: 105 bool mightUseCTR(const Triple &TT, BasicBlock *BB); 106 bool convertToCTRLoop(Loop *L); 107 108 private: 109 PPCTargetMachine *TM; 110 LoopInfo *LI; 111 ScalarEvolution *SE; 112 DataLayout *TD; 113 DominatorTree *DT; 114 const TargetLibraryInfo *LibInfo; 115 }; 116 117 char PPCCTRLoops::ID = 0; 118#ifndef NDEBUG 119 int PPCCTRLoops::Counter = 0; 120#endif 121 122#ifndef NDEBUG 123 struct PPCCTRLoopsVerify : public MachineFunctionPass { 124 public: 125 static char ID; 126 127 PPCCTRLoopsVerify() : MachineFunctionPass(ID) { 128 initializePPCCTRLoopsVerifyPass(*PassRegistry::getPassRegistry()); 129 } 130 131 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 132 AU.addRequired<MachineDominatorTree>(); 133 MachineFunctionPass::getAnalysisUsage(AU); 134 } 135 136 virtual bool runOnMachineFunction(MachineFunction &MF); 137 138 private: 139 MachineDominatorTree *MDT; 140 }; 141 142 char PPCCTRLoopsVerify::ID = 0; 143#endif // NDEBUG 144} // end anonymous namespace 145 146INITIALIZE_PASS_BEGIN(PPCCTRLoops, "ppc-ctr-loops", "PowerPC CTR Loops", 147 false, false) 148INITIALIZE_PASS_DEPENDENCY(DominatorTree) 149INITIALIZE_PASS_DEPENDENCY(LoopInfo) 150INITIALIZE_PASS_DEPENDENCY(ScalarEvolution) 151INITIALIZE_PASS_END(PPCCTRLoops, "ppc-ctr-loops", "PowerPC CTR Loops", 152 false, false) 153 154FunctionPass *llvm::createPPCCTRLoops(PPCTargetMachine &TM) { 155 return new PPCCTRLoops(TM); 156} 157 158#ifndef NDEBUG 159INITIALIZE_PASS_BEGIN(PPCCTRLoopsVerify, "ppc-ctr-loops-verify", 160 "PowerPC CTR Loops Verify", false, false) 161INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree) 162INITIALIZE_PASS_END(PPCCTRLoopsVerify, "ppc-ctr-loops-verify", 163 "PowerPC CTR Loops Verify", false, false) 164 165FunctionPass *llvm::createPPCCTRLoopsVerify() { 166 return new PPCCTRLoopsVerify(); 167} 168#endif // NDEBUG 169 170bool PPCCTRLoops::runOnFunction(Function &F) { 171 LI = &getAnalysis<LoopInfo>(); 172 SE = &getAnalysis<ScalarEvolution>(); 173 DT = &getAnalysis<DominatorTree>(); 174 TD = getAnalysisIfAvailable<DataLayout>(); 175 LibInfo = getAnalysisIfAvailable<TargetLibraryInfo>(); 176 177 bool MadeChange = false; 178 179 for (LoopInfo::iterator I = LI->begin(), E = LI->end(); 180 I != E; ++I) { 181 Loop *L = *I; 182 if (!L->getParentLoop()) 183 MadeChange |= convertToCTRLoop(L); 184 } 185 186 return MadeChange; 187} 188 189bool PPCCTRLoops::mightUseCTR(const Triple &TT, BasicBlock *BB) { 190 for (BasicBlock::iterator J = BB->begin(), JE = BB->end(); 191 J != JE; ++J) { 192 if (CallInst *CI = dyn_cast<CallInst>(J)) { 193 if (InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue())) { 194 // Inline ASM is okay, unless it clobbers the ctr register. 195 InlineAsm::ConstraintInfoVector CIV = IA->ParseConstraints(); 196 for (unsigned i = 0, ie = CIV.size(); i < ie; ++i) { 197 InlineAsm::ConstraintInfo &C = CIV[i]; 198 if (C.Type != InlineAsm::isInput) 199 for (unsigned j = 0, je = C.Codes.size(); j < je; ++j) 200 if (StringRef(C.Codes[j]).equals_lower("{ctr}")) 201 return true; 202 } 203 204 continue; 205 } 206 207 if (!TM) 208 return true; 209 const TargetLowering *TLI = TM->getTargetLowering(); 210 211 if (Function *F = CI->getCalledFunction()) { 212 // Most intrinsics don't become function calls, but some might. 213 // sin, cos, exp and log are always calls. 214 unsigned Opcode; 215 if (F->getIntrinsicID() != Intrinsic::not_intrinsic) { 216 switch (F->getIntrinsicID()) { 217 default: continue; 218 219// VisualStudio defines setjmp as _setjmp 220#if defined(_MSC_VER) && defined(setjmp) && \ 221 !defined(setjmp_undefined_for_msvc) 222# pragma push_macro("setjmp") 223# undef setjmp 224# define setjmp_undefined_for_msvc 225#endif 226 227 case Intrinsic::setjmp: 228 229#if defined(_MSC_VER) && defined(setjmp_undefined_for_msvc) 230 // let's return it to _setjmp state 231# pragma pop_macro("setjmp") 232# undef setjmp_undefined_for_msvc 233#endif 234 235 case Intrinsic::longjmp: 236 237 // Exclude eh_sjlj_setjmp; we don't need to exclude eh_sjlj_longjmp 238 // because, although it does clobber the counter register, the 239 // control can't then return to inside the loop unless there is also 240 // an eh_sjlj_setjmp. 241 case Intrinsic::eh_sjlj_setjmp: 242 243 case Intrinsic::memcpy: 244 case Intrinsic::memmove: 245 case Intrinsic::memset: 246 case Intrinsic::powi: 247 case Intrinsic::log: 248 case Intrinsic::log2: 249 case Intrinsic::log10: 250 case Intrinsic::exp: 251 case Intrinsic::exp2: 252 case Intrinsic::pow: 253 case Intrinsic::sin: 254 case Intrinsic::cos: 255 return true; 256 case Intrinsic::copysign: 257 if (CI->getArgOperand(0)->getType()->getScalarType()-> 258 isPPC_FP128Ty()) 259 return true; 260 else 261 continue; // ISD::FCOPYSIGN is never a library call. 262 case Intrinsic::sqrt: Opcode = ISD::FSQRT; break; 263 case Intrinsic::floor: Opcode = ISD::FFLOOR; break; 264 case Intrinsic::ceil: Opcode = ISD::FCEIL; break; 265 case Intrinsic::trunc: Opcode = ISD::FTRUNC; break; 266 case Intrinsic::rint: Opcode = ISD::FRINT; break; 267 case Intrinsic::nearbyint: Opcode = ISD::FNEARBYINT; break; 268 case Intrinsic::round: Opcode = ISD::FROUND; break; 269 } 270 } 271 272 // PowerPC does not use [US]DIVREM or other library calls for 273 // operations on regular types which are not otherwise library calls 274 // (i.e. soft float or atomics). If adapting for targets that do, 275 // additional care is required here. 276 277 LibFunc::Func Func; 278 if (!F->hasLocalLinkage() && F->hasName() && LibInfo && 279 LibInfo->getLibFunc(F->getName(), Func) && 280 LibInfo->hasOptimizedCodeGen(Func)) { 281 // Non-read-only functions are never treated as intrinsics. 282 if (!CI->onlyReadsMemory()) 283 return true; 284 285 // Conversion happens only for FP calls. 286 if (!CI->getArgOperand(0)->getType()->isFloatingPointTy()) 287 return true; 288 289 switch (Func) { 290 default: return true; 291 case LibFunc::copysign: 292 case LibFunc::copysignf: 293 continue; // ISD::FCOPYSIGN is never a library call. 294 case LibFunc::copysignl: 295 return true; 296 case LibFunc::fabs: 297 case LibFunc::fabsf: 298 case LibFunc::fabsl: 299 continue; // ISD::FABS is never a library call. 300 case LibFunc::sqrt: 301 case LibFunc::sqrtf: 302 case LibFunc::sqrtl: 303 Opcode = ISD::FSQRT; break; 304 case LibFunc::floor: 305 case LibFunc::floorf: 306 case LibFunc::floorl: 307 Opcode = ISD::FFLOOR; break; 308 case LibFunc::nearbyint: 309 case LibFunc::nearbyintf: 310 case LibFunc::nearbyintl: 311 Opcode = ISD::FNEARBYINT; break; 312 case LibFunc::ceil: 313 case LibFunc::ceilf: 314 case LibFunc::ceill: 315 Opcode = ISD::FCEIL; break; 316 case LibFunc::rint: 317 case LibFunc::rintf: 318 case LibFunc::rintl: 319 Opcode = ISD::FRINT; break; 320 case LibFunc::round: 321 case LibFunc::roundf: 322 case LibFunc::roundl: 323 Opcode = ISD::FROUND; break; 324 case LibFunc::trunc: 325 case LibFunc::truncf: 326 case LibFunc::truncl: 327 Opcode = ISD::FTRUNC; break; 328 } 329 330 MVT VTy = 331 TLI->getSimpleValueType(CI->getArgOperand(0)->getType(), true); 332 if (VTy == MVT::Other) 333 return true; 334 335 if (TLI->isOperationLegalOrCustom(Opcode, VTy)) 336 continue; 337 else if (VTy.isVector() && 338 TLI->isOperationLegalOrCustom(Opcode, VTy.getScalarType())) 339 continue; 340 341 return true; 342 } 343 } 344 345 return true; 346 } else if (isa<BinaryOperator>(J) && 347 J->getType()->getScalarType()->isPPC_FP128Ty()) { 348 // Most operations on ppc_f128 values become calls. 349 return true; 350 } else if (isa<UIToFPInst>(J) || isa<SIToFPInst>(J) || 351 isa<FPToUIInst>(J) || isa<FPToSIInst>(J)) { 352 CastInst *CI = cast<CastInst>(J); 353 if (CI->getSrcTy()->getScalarType()->isPPC_FP128Ty() || 354 CI->getDestTy()->getScalarType()->isPPC_FP128Ty() || 355 (TT.isArch32Bit() && 356 (CI->getSrcTy()->getScalarType()->isIntegerTy(64) || 357 CI->getDestTy()->getScalarType()->isIntegerTy(64)) 358 )) 359 return true; 360 } else if (TT.isArch32Bit() && 361 J->getType()->getScalarType()->isIntegerTy(64) && 362 (J->getOpcode() == Instruction::UDiv || 363 J->getOpcode() == Instruction::SDiv || 364 J->getOpcode() == Instruction::URem || 365 J->getOpcode() == Instruction::SRem)) { 366 return true; 367 } else if (isa<IndirectBrInst>(J) || isa<InvokeInst>(J)) { 368 // On PowerPC, indirect jumps use the counter register. 369 return true; 370 } else if (SwitchInst *SI = dyn_cast<SwitchInst>(J)) { 371 if (!TM) 372 return true; 373 const TargetLowering *TLI = TM->getTargetLowering(); 374 375 if (TLI->supportJumpTables() && 376 SI->getNumCases()+1 >= (unsigned) TLI->getMinimumJumpTableEntries()) 377 return true; 378 } 379 } 380 381 return false; 382} 383 384bool PPCCTRLoops::convertToCTRLoop(Loop *L) { 385 bool MadeChange = false; 386 387 Triple TT = Triple(L->getHeader()->getParent()->getParent()-> 388 getTargetTriple()); 389 if (!TT.isArch32Bit() && !TT.isArch64Bit()) 390 return MadeChange; // Unknown arch. type. 391 392 // Process nested loops first. 393 for (Loop::iterator I = L->begin(), E = L->end(); I != E; ++I) { 394 MadeChange |= convertToCTRLoop(*I); 395 } 396 397 // If a nested loop has been converted, then we can't convert this loop. 398 if (MadeChange) 399 return MadeChange; 400 401#ifndef NDEBUG 402 // Stop trying after reaching the limit (if any). 403 int Limit = CTRLoopLimit; 404 if (Limit >= 0) { 405 if (Counter >= CTRLoopLimit) 406 return false; 407 Counter++; 408 } 409#endif 410 411 // We don't want to spill/restore the counter register, and so we don't 412 // want to use the counter register if the loop contains calls. 413 for (Loop::block_iterator I = L->block_begin(), IE = L->block_end(); 414 I != IE; ++I) 415 if (mightUseCTR(TT, *I)) 416 return MadeChange; 417 418 SmallVector<BasicBlock*, 4> ExitingBlocks; 419 L->getExitingBlocks(ExitingBlocks); 420 421 BasicBlock *CountedExitBlock = 0; 422 const SCEV *ExitCount = 0; 423 BranchInst *CountedExitBranch = 0; 424 for (SmallVectorImpl<BasicBlock *>::iterator I = ExitingBlocks.begin(), 425 IE = ExitingBlocks.end(); I != IE; ++I) { 426 const SCEV *EC = SE->getExitCount(L, *I); 427 DEBUG(dbgs() << "Exit Count for " << *L << " from block " << 428 (*I)->getName() << ": " << *EC << "\n"); 429 if (isa<SCEVCouldNotCompute>(EC)) 430 continue; 431 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) { 432 if (ConstEC->getValue()->isZero()) 433 continue; 434 } else if (!SE->isLoopInvariant(EC, L)) 435 continue; 436 437 if (SE->getTypeSizeInBits(EC->getType()) > (TT.isArch64Bit() ? 64 : 32)) 438 continue; 439 440 // We now have a loop-invariant count of loop iterations (which is not the 441 // constant zero) for which we know that this loop will not exit via this 442 // exisiting block. 443 444 // We need to make sure that this block will run on every loop iteration. 445 // For this to be true, we must dominate all blocks with backedges. Such 446 // blocks are in-loop predecessors to the header block. 447 bool NotAlways = false; 448 for (pred_iterator PI = pred_begin(L->getHeader()), 449 PIE = pred_end(L->getHeader()); PI != PIE; ++PI) { 450 if (!L->contains(*PI)) 451 continue; 452 453 if (!DT->dominates(*I, *PI)) { 454 NotAlways = true; 455 break; 456 } 457 } 458 459 if (NotAlways) 460 continue; 461 462 // Make sure this blocks ends with a conditional branch. 463 Instruction *TI = (*I)->getTerminator(); 464 if (!TI) 465 continue; 466 467 if (BranchInst *BI = dyn_cast<BranchInst>(TI)) { 468 if (!BI->isConditional()) 469 continue; 470 471 CountedExitBranch = BI; 472 } else 473 continue; 474 475 // Note that this block may not be the loop latch block, even if the loop 476 // has a latch block. 477 CountedExitBlock = *I; 478 ExitCount = EC; 479 break; 480 } 481 482 if (!CountedExitBlock) 483 return MadeChange; 484 485 BasicBlock *Preheader = L->getLoopPreheader(); 486 487 // If we don't have a preheader, then insert one. If we already have a 488 // preheader, then we can use it (except if the preheader contains a use of 489 // the CTR register because some such uses might be reordered by the 490 // selection DAG after the mtctr instruction). 491 if (!Preheader || mightUseCTR(TT, Preheader)) 492 Preheader = InsertPreheaderForLoop(L, this); 493 if (!Preheader) 494 return MadeChange; 495 496 DEBUG(dbgs() << "Preheader for exit count: " << Preheader->getName() << "\n"); 497 498 // Insert the count into the preheader and replace the condition used by the 499 // selected branch. 500 MadeChange = true; 501 502 SCEVExpander SCEVE(*SE, "loopcnt"); 503 LLVMContext &C = SE->getContext(); 504 Type *CountType = TT.isArch64Bit() ? Type::getInt64Ty(C) : 505 Type::getInt32Ty(C); 506 if (!ExitCount->getType()->isPointerTy() && 507 ExitCount->getType() != CountType) 508 ExitCount = SE->getZeroExtendExpr(ExitCount, CountType); 509 ExitCount = SE->getAddExpr(ExitCount, 510 SE->getConstant(CountType, 1)); 511 Value *ECValue = SCEVE.expandCodeFor(ExitCount, CountType, 512 Preheader->getTerminator()); 513 514 IRBuilder<> CountBuilder(Preheader->getTerminator()); 515 Module *M = Preheader->getParent()->getParent(); 516 Value *MTCTRFunc = Intrinsic::getDeclaration(M, Intrinsic::ppc_mtctr, 517 CountType); 518 CountBuilder.CreateCall(MTCTRFunc, ECValue); 519 520 IRBuilder<> CondBuilder(CountedExitBranch); 521 Value *DecFunc = 522 Intrinsic::getDeclaration(M, Intrinsic::ppc_is_decremented_ctr_nonzero); 523 Value *NewCond = CondBuilder.CreateCall(DecFunc); 524 Value *OldCond = CountedExitBranch->getCondition(); 525 CountedExitBranch->setCondition(NewCond); 526 527 // The false branch must exit the loop. 528 if (!L->contains(CountedExitBranch->getSuccessor(0))) 529 CountedExitBranch->swapSuccessors(); 530 531 // The old condition may be dead now, and may have even created a dead PHI 532 // (the original induction variable). 533 RecursivelyDeleteTriviallyDeadInstructions(OldCond); 534 DeleteDeadPHIs(CountedExitBlock); 535 536 ++NumCTRLoops; 537 return MadeChange; 538} 539 540#ifndef NDEBUG 541static bool clobbersCTR(const MachineInstr *MI) { 542 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 543 const MachineOperand &MO = MI->getOperand(i); 544 if (MO.isReg()) { 545 if (MO.isDef() && (MO.getReg() == PPC::CTR || MO.getReg() == PPC::CTR8)) 546 return true; 547 } else if (MO.isRegMask()) { 548 if (MO.clobbersPhysReg(PPC::CTR) || MO.clobbersPhysReg(PPC::CTR8)) 549 return true; 550 } 551 } 552 553 return false; 554} 555 556static bool verifyCTRBranch(MachineBasicBlock *MBB, 557 MachineBasicBlock::iterator I) { 558 MachineBasicBlock::iterator BI = I; 559 SmallSet<MachineBasicBlock *, 16> Visited; 560 SmallVector<MachineBasicBlock *, 8> Preds; 561 bool CheckPreds; 562 563 if (I == MBB->begin()) { 564 Visited.insert(MBB); 565 goto queue_preds; 566 } else 567 --I; 568 569check_block: 570 Visited.insert(MBB); 571 if (I == MBB->end()) 572 goto queue_preds; 573 574 CheckPreds = true; 575 for (MachineBasicBlock::iterator IE = MBB->begin();; --I) { 576 unsigned Opc = I->getOpcode(); 577 if (Opc == PPC::MTCTRloop || Opc == PPC::MTCTR8loop) { 578 CheckPreds = false; 579 break; 580 } 581 582 if (I != BI && clobbersCTR(I)) { 583 DEBUG(dbgs() << "BB#" << MBB->getNumber() << " (" << 584 MBB->getFullName() << ") instruction " << *I << 585 " clobbers CTR, invalidating " << "BB#" << 586 BI->getParent()->getNumber() << " (" << 587 BI->getParent()->getFullName() << ") instruction " << 588 *BI << "\n"); 589 return false; 590 } 591 592 if (I == IE) 593 break; 594 } 595 596 if (!CheckPreds && Preds.empty()) 597 return true; 598 599 if (CheckPreds) { 600queue_preds: 601 if (MachineFunction::iterator(MBB) == MBB->getParent()->begin()) { 602 DEBUG(dbgs() << "Unable to find a MTCTR instruction for BB#" << 603 BI->getParent()->getNumber() << " (" << 604 BI->getParent()->getFullName() << ") instruction " << 605 *BI << "\n"); 606 return false; 607 } 608 609 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(), 610 PIE = MBB->pred_end(); PI != PIE; ++PI) 611 Preds.push_back(*PI); 612 } 613 614 do { 615 MBB = Preds.pop_back_val(); 616 if (!Visited.count(MBB)) { 617 I = MBB->getLastNonDebugInstr(); 618 goto check_block; 619 } 620 } while (!Preds.empty()); 621 622 return true; 623} 624 625bool PPCCTRLoopsVerify::runOnMachineFunction(MachineFunction &MF) { 626 MDT = &getAnalysis<MachineDominatorTree>(); 627 628 // Verify that all bdnz/bdz instructions are dominated by a loop mtctr before 629 // any other instructions that might clobber the ctr register. 630 for (MachineFunction::iterator I = MF.begin(), IE = MF.end(); 631 I != IE; ++I) { 632 MachineBasicBlock *MBB = I; 633 if (!MDT->isReachableFromEntry(MBB)) 634 continue; 635 636 for (MachineBasicBlock::iterator MII = MBB->getFirstTerminator(), 637 MIIE = MBB->end(); MII != MIIE; ++MII) { 638 unsigned Opc = MII->getOpcode(); 639 if (Opc == PPC::BDNZ8 || Opc == PPC::BDNZ || 640 Opc == PPC::BDZ8 || Opc == PPC::BDZ) 641 if (!verifyCTRBranch(MBB, MII)) 642 llvm_unreachable("Invalid PPC CTR loop!"); 643 } 644 } 645 646 return false; 647} 648#endif // NDEBUG 649 650