NVPTXRegisterInfo.cpp revision 263508 
1//===- NVPTXRegisterInfo.cpp - NVPTX Register Information -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the NVPTX implementation of the TargetRegisterInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#define DEBUG_TYPE "nvptx-reg-info"
15
16#include "NVPTXRegisterInfo.h"
17#include "NVPTX.h"
18#include "NVPTXSubtarget.h"
19#include "llvm/ADT/BitVector.h"
20#include "llvm/CodeGen/MachineFrameInfo.h"
21#include "llvm/CodeGen/MachineFunction.h"
22#include "llvm/CodeGen/MachineInstrBuilder.h"
23#include "llvm/MC/MachineLocation.h"
24#include "llvm/Target/TargetInstrInfo.h"
25
26using namespace llvm;
27
28namespace llvm {
29std::string getNVPTXRegClassName(TargetRegisterClass const *RC) {
30  if (RC == &NVPTX::Float32RegsRegClass) {
31    return ".f32";
32  }
33  if (RC == &NVPTX::Float64RegsRegClass) {
34    return ".f64";
35  } else if (RC == &NVPTX::Int64RegsRegClass) {
36    return ".s64";
37  } else if (RC == &NVPTX::Int32RegsRegClass) {
38    return ".s32";
39  } else if (RC == &NVPTX::Int16RegsRegClass) {
40    return ".s16";
41  } else if (RC == &NVPTX::Int1RegsRegClass) {
42    return ".pred";
43  } else if (RC == &NVPTX::SpecialRegsRegClass) {
44    return "!Special!";
45  } else {
46    return "INTERNAL";
47  }
48  return "";
49}
50
51std::string getNVPTXRegClassStr(TargetRegisterClass const *RC) {
52  if (RC == &NVPTX::Float32RegsRegClass) {
53    return "%f";
54  }
55  if (RC == &NVPTX::Float64RegsRegClass) {
56    return "%fl";
57  } else if (RC == &NVPTX::Int64RegsRegClass) {
58    return "%rl";
59  } else if (RC == &NVPTX::Int32RegsRegClass) {
60    return "%r";
61  } else if (RC == &NVPTX::Int16RegsRegClass) {
62    return "%rs";
63  } else if (RC == &NVPTX::Int1RegsRegClass) {
64    return "%p";
65  } else if (RC == &NVPTX::SpecialRegsRegClass) {
66    return "!Special!";
67  } else {
68    return "INTERNAL";
69  }
70  return "";
71}
72}
73
74NVPTXRegisterInfo::NVPTXRegisterInfo(const NVPTXSubtarget &st)
75    : NVPTXGenRegisterInfo(0), Is64Bit(st.is64Bit()) {}
76
77#define GET_REGINFO_TARGET_DESC
78#include "NVPTXGenRegisterInfo.inc"
79
80/// NVPTX Callee Saved Registers
81const uint16_t *
82NVPTXRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
83  static const uint16_t CalleeSavedRegs[] = { 0 };
84  return CalleeSavedRegs;
85}
86
87// NVPTX Callee Saved Reg Classes
88const TargetRegisterClass *const *
89NVPTXRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
90  static const TargetRegisterClass *const CalleeSavedRegClasses[] = { 0 };
91  return CalleeSavedRegClasses;
92}
93
94BitVector NVPTXRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
95  BitVector Reserved(getNumRegs());
96  return Reserved;
97}
98
99void NVPTXRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
100                                            int SPAdj, unsigned FIOperandNum,
101                                            RegScavenger *RS) const {
102  assert(SPAdj == 0 && "Unexpected");
103
104  MachineInstr &MI = *II;
105  int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
106
107  MachineFunction &MF = *MI.getParent()->getParent();
108  int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
109               MI.getOperand(FIOperandNum + 1).getImm();
110
111  // Using I0 as the frame pointer
112  MI.getOperand(FIOperandNum).ChangeToRegister(NVPTX::VRFrame, false);
113  MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
114}
115
116int NVPTXRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
117  return 0;
118}
119
120unsigned NVPTXRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
121  return NVPTX::VRFrame;
122}
123
124unsigned NVPTXRegisterInfo::getRARegister() const { return 0; }
125