MipsMSAInstrFormats.td revision 263508 
1//===- MipsMSAInstrFormats.td - Mips Instruction Formats ---*- tablegen -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10def HasMSA : Predicate<"Subtarget.hasMSA()">,
11             AssemblerPredicate<"FeatureMSA">;
12
13class MSAInst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther> {
14  let Predicates = [HasMSA];
15  let Inst{31-26} = 0b011110;
16}
17
18class MSACBranch : MSAInst {
19  let Inst{31-26} = 0b010001;
20}
21
22class MSASpecial : MSAInst {
23  let Inst{31-26} = 0b000000;
24}
25
26class PseudoMSA<dag outs, dag ins, list<dag> pattern,
27                InstrItinClass itin = IIPseudo>:
28  MipsPseudo<outs, ins, pattern, itin> {
29  let Predicates = [HasMSA];
30}
31
32class MSA_BIT_B_FMT<bits<3> major, bits<6> minor>: MSAInst {
33  bits<5> ws;
34  bits<5> wd;
35  bits<3> m;
36
37  let Inst{25-23} = major;
38  let Inst{22-19} = 0b1110;
39  let Inst{18-16} = m;
40  let Inst{15-11} = ws;
41  let Inst{10-6} = wd;
42  let Inst{5-0} = minor;
43}
44
45class MSA_BIT_H_FMT<bits<3> major, bits<6> minor>: MSAInst {
46  bits<5> ws;
47  bits<5> wd;
48  bits<4> m;
49
50  let Inst{25-23} = major;
51  let Inst{22-20} = 0b110;
52  let Inst{19-16} = m;
53  let Inst{15-11} = ws;
54  let Inst{10-6} = wd;
55  let Inst{5-0} = minor;
56}
57
58class MSA_BIT_W_FMT<bits<3> major, bits<6> minor>: MSAInst {
59  bits<5> ws;
60  bits<5> wd;
61  bits<5> m;
62
63  let Inst{25-23} = major;
64  let Inst{22-21} = 0b10;
65  let Inst{20-16} = m;
66  let Inst{15-11} = ws;
67  let Inst{10-6} = wd;
68  let Inst{5-0} = minor;
69}
70
71class MSA_BIT_D_FMT<bits<3> major, bits<6> minor>: MSAInst {
72  bits<5> ws;
73  bits<5> wd;
74  bits<6> m;
75
76  let Inst{25-23} = major;
77  let Inst{22} = 0b0;
78  let Inst{21-16} = m;
79  let Inst{15-11} = ws;
80  let Inst{10-6} = wd;
81  let Inst{5-0} = minor;
82}
83
84class MSA_2R_FILL_FMT<bits<8> major, bits<2> df, bits<6> minor>: MSAInst {
85  bits<5> rs;
86  bits<5> wd;
87
88  let Inst{25-18} = major;
89  let Inst{17-16} = df;
90  let Inst{15-11} = rs;
91  let Inst{10-6} = wd;
92  let Inst{5-0} = minor;
93}
94
95class MSA_2R_FMT<bits<8> major, bits<2> df, bits<6> minor>: MSAInst {
96  bits<5> ws;
97  bits<5> wd;
98
99  let Inst{25-18} = major;
100  let Inst{17-16} = df;
101  let Inst{15-11} = ws;
102  let Inst{10-6} = wd;
103  let Inst{5-0} = minor;
104}
105
106class MSA_2RF_FMT<bits<9> major, bits<1> df, bits<6> minor>: MSAInst {
107  bits<5> ws;
108  bits<5> wd;
109
110  let Inst{25-17} = major;
111  let Inst{16} = df;
112  let Inst{15-11} = ws;
113  let Inst{10-6} = wd;
114  let Inst{5-0} = minor;
115}
116
117class MSA_3R_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst {
118  bits<5> wt;
119  bits<5> ws;
120  bits<5> wd;
121
122  let Inst{25-23} = major;
123  let Inst{22-21} = df;
124  let Inst{20-16} = wt;
125  let Inst{15-11} = ws;
126  let Inst{10-6} = wd;
127  let Inst{5-0} = minor;
128}
129
130class MSA_3RF_FMT<bits<4> major, bits<1> df, bits<6> minor>: MSAInst {
131  bits<5> wt;
132  bits<5> ws;
133  bits<5> wd;
134
135  let Inst{25-22} = major;
136  let Inst{21} = df;
137  let Inst{20-16} = wt;
138  let Inst{15-11} = ws;
139  let Inst{10-6} = wd;
140  let Inst{5-0} = minor;
141}
142
143class MSA_3R_INDEX_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst {
144  bits<5> rt;
145  bits<5> ws;
146  bits<5> wd;
147
148  let Inst{25-23} = major;
149  let Inst{22-21} = df;
150  let Inst{20-16} = rt;
151  let Inst{15-11} = ws;
152  let Inst{10-6} = wd;
153  let Inst{5-0} = minor;
154}
155
156class MSA_ELM_FMT<bits<10> major, bits<6> minor>: MSAInst {
157  bits<5> ws;
158  bits<5> wd;
159
160  let Inst{25-16} = major;
161  let Inst{15-11} = ws;
162  let Inst{10-6} = wd;
163  let Inst{5-0} = minor;
164}
165
166class MSA_ELM_CFCMSA_FMT<bits<10> major, bits<6> minor>: MSAInst {
167  bits<5> rd;
168  bits<5> cs;
169
170  let Inst{25-16} = major;
171  let Inst{15-11} = cs;
172  let Inst{10-6} = rd;
173  let Inst{5-0} = minor;
174}
175
176class MSA_ELM_CTCMSA_FMT<bits<10> major, bits<6> minor>: MSAInst {
177  bits<5> rs;
178  bits<5> cd;
179
180  let Inst{25-16} = major;
181  let Inst{15-11} = rs;
182  let Inst{10-6} = cd;
183  let Inst{5-0} = minor;
184}
185
186class MSA_ELM_B_FMT<bits<4> major, bits<6> minor>: MSAInst {
187  bits<4> n;
188  bits<5> ws;
189  bits<5> wd;
190
191  let Inst{25-22} = major;
192  let Inst{21-20} = 0b00;
193  let Inst{19-16} = n{3-0};
194  let Inst{15-11} = ws;
195  let Inst{10-6} = wd;
196  let Inst{5-0} = minor;
197}
198
199class MSA_ELM_H_FMT<bits<4> major, bits<6> minor>: MSAInst {
200  bits<4> n;
201  bits<5> ws;
202  bits<5> wd;
203
204  let Inst{25-22} = major;
205  let Inst{21-19} = 0b100;
206  let Inst{18-16} = n{2-0};
207  let Inst{15-11} = ws;
208  let Inst{10-6} = wd;
209  let Inst{5-0} = minor;
210}
211
212class MSA_ELM_W_FMT<bits<4> major, bits<6> minor>: MSAInst {
213  bits<4> n;
214  bits<5> ws;
215  bits<5> wd;
216
217  let Inst{25-22} = major;
218  let Inst{21-18} = 0b1100;
219  let Inst{17-16} = n{1-0};
220  let Inst{15-11} = ws;
221  let Inst{10-6} = wd;
222  let Inst{5-0} = minor;
223}
224
225class MSA_ELM_D_FMT<bits<4> major, bits<6> minor>: MSAInst {
226  bits<4> n;
227  bits<5> ws;
228  bits<5> wd;
229
230  let Inst{25-22} = major;
231  let Inst{21-17} = 0b11100;
232  let Inst{16} = n{0};
233  let Inst{15-11} = ws;
234  let Inst{10-6} = wd;
235  let Inst{5-0} = minor;
236}
237
238class MSA_ELM_COPY_B_FMT<bits<4> major, bits<6> minor>: MSAInst {
239  bits<4> n;
240  bits<5> ws;
241  bits<5> rd;
242
243  let Inst{25-22} = major;
244  let Inst{21-20} = 0b00;
245  let Inst{19-16} = n{3-0};
246  let Inst{15-11} = ws;
247  let Inst{10-6} = rd;
248  let Inst{5-0} = minor;
249}
250
251class MSA_ELM_COPY_H_FMT<bits<4> major, bits<6> minor>: MSAInst {
252  bits<4> n;
253  bits<5> ws;
254  bits<5> rd;
255
256  let Inst{25-22} = major;
257  let Inst{21-19} = 0b100;
258  let Inst{18-16} = n{2-0};
259  let Inst{15-11} = ws;
260  let Inst{10-6} = rd;
261  let Inst{5-0} = minor;
262}
263
264class MSA_ELM_COPY_W_FMT<bits<4> major, bits<6> minor>: MSAInst {
265  bits<4> n;
266  bits<5> ws;
267  bits<5> rd;
268
269  let Inst{25-22} = major;
270  let Inst{21-18} = 0b1100;
271  let Inst{17-16} = n{1-0};
272  let Inst{15-11} = ws;
273  let Inst{10-6} = rd;
274  let Inst{5-0} = minor;
275}
276
277class MSA_ELM_INSERT_B_FMT<bits<4> major, bits<6> minor>: MSAInst {
278  bits<6> n;
279  bits<5> rs;
280  bits<5> wd;
281
282  let Inst{25-22} = major;
283  let Inst{21-20} = 0b00;
284  let Inst{19-16} = n{3-0};
285  let Inst{15-11} = rs;
286  let Inst{10-6} = wd;
287  let Inst{5-0} = minor;
288}
289
290class MSA_ELM_INSERT_H_FMT<bits<4> major, bits<6> minor>: MSAInst {
291  bits<6> n;
292  bits<5> rs;
293  bits<5> wd;
294
295  let Inst{25-22} = major;
296  let Inst{21-19} = 0b100;
297  let Inst{18-16} = n{2-0};
298  let Inst{15-11} = rs;
299  let Inst{10-6} = wd;
300  let Inst{5-0} = minor;
301}
302
303class MSA_ELM_INSERT_W_FMT<bits<4> major, bits<6> minor>: MSAInst {
304  bits<6> n;
305  bits<5> rs;
306  bits<5> wd;
307
308  let Inst{25-22} = major;
309  let Inst{21-18} = 0b1100;
310  let Inst{17-16} = n{1-0};
311  let Inst{15-11} = rs;
312  let Inst{10-6} = wd;
313  let Inst{5-0} = minor;
314}
315
316class MSA_I5_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst {
317  bits<5> imm;
318  bits<5> ws;
319  bits<5> wd;
320
321  let Inst{25-23} = major;
322  let Inst{22-21} = df;
323  let Inst{20-16} = imm;
324  let Inst{15-11} = ws;
325  let Inst{10-6} = wd;
326  let Inst{5-0} = minor;
327}
328
329class MSA_I8_FMT<bits<2> major, bits<6> minor>: MSAInst {
330  bits<8> u8;
331  bits<5> ws;
332  bits<5> wd;
333
334  let Inst{25-24} = major;
335  let Inst{23-16} = u8;
336  let Inst{15-11} = ws;
337  let Inst{10-6} = wd;
338  let Inst{5-0} = minor;
339}
340
341class MSA_I10_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst {
342  bits<10> s10;
343  bits<5> wd;
344
345  let Inst{25-23} = major;
346  let Inst{22-21} = df;
347  let Inst{20-11} = s10;
348  let Inst{10-6} = wd;
349  let Inst{5-0} = minor;
350}
351
352class MSA_MI10_FMT<bits<2> df, bits<4> minor>: MSAInst {
353  bits<21> addr;
354  bits<5> wd;
355
356  let Inst{25-16} = addr{9-0};
357  let Inst{15-11} = addr{20-16};
358  let Inst{10-6} = wd;
359  let Inst{5-2} = minor;
360  let Inst{1-0} = df;
361}
362
363class MSA_VEC_FMT<bits<5> major, bits<6> minor>: MSAInst {
364  bits<5> wt;
365  bits<5> ws;
366  bits<5> wd;
367
368  let Inst{25-21} = major;
369  let Inst{20-16} = wt;
370  let Inst{15-11} = ws;
371  let Inst{10-6} = wd;
372  let Inst{5-0} = minor;
373}
374
375class MSA_CBRANCH_FMT<bits<3> major, bits<2> df>: MSACBranch {
376  bits<16> offset;
377  bits<5> wt;
378
379  let Inst{25-23} = major;
380  let Inst{22-21} = df;
381  let Inst{20-16} = wt;
382  let Inst{15-0} = offset;
383}
384
385class MSA_CBRANCH_V_FMT<bits<5> major>: MSACBranch {
386  bits<16> offset;
387  bits<5> wt;
388
389  let Inst{25-21} = major;
390  let Inst{20-16} = wt;
391  let Inst{15-0} = offset;
392}
393
394class SPECIAL_LSA_FMT<bits<6> minor>: MSASpecial {
395  bits<5> rs;
396  bits<5> rt;
397  bits<5> rd;
398  bits<2> sa;
399
400  let Inst{25-21} = rs;
401  let Inst{20-16} = rt;
402  let Inst{15-11} = rd;
403  let Inst{10-8} = 0b000;
404  let Inst{7-6} = sa;
405  let Inst{5-0} = minor;
406}
407