AArch64InstrInfo.h revision 263508
197403Sobrien//===- AArch64InstrInfo.h - AArch64 Instruction Information -----*- C++ -*-===// 2117397Skan// 397403Sobrien// The LLVM Compiler Infrastructure 4132720Skan// 597403Sobrien// This file is distributed under the University of Illinois Open Source 6132720Skan// License. See LICENSE.TXT for details. 797403Sobrien// 897403Sobrien//===----------------------------------------------------------------------===// 997403Sobrien// 1097403Sobrien// This file contains the AArch64 implementation of the TargetInstrInfo class. 11132720Skan// 1297403Sobrien//===----------------------------------------------------------------------===// 1397403Sobrien 1497403Sobrien#ifndef LLVM_TARGET_AARCH64INSTRINFO_H 1597403Sobrien#define LLVM_TARGET_AARCH64INSTRINFO_H 1697403Sobrien 17132720Skan#include "llvm/Target/TargetInstrInfo.h" 18169691Skan#include "AArch64RegisterInfo.h" 19169691Skan 2097403Sobrien#define GET_INSTRINFO_HEADER 2197403Sobrien#include "AArch64GenInstrInfo.inc" 2297403Sobrien 2397403Sobriennamespace llvm { 2497403Sobrien 2597403Sobrienclass AArch64Subtarget; 2697403Sobrien 2797403Sobrienclass AArch64InstrInfo : public AArch64GenInstrInfo { 2897403Sobrien const AArch64RegisterInfo RI; 2997403Sobrien const AArch64Subtarget &Subtarget; 3097403Sobrienpublic: 3197403Sobrien explicit AArch64InstrInfo(const AArch64Subtarget &TM); 3297403Sobrien 3397403Sobrien /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As 3497403Sobrien /// such, whenever a client has an instance of instruction info, it should 3597403Sobrien /// always be able to get register info as well (through this method). 3697403Sobrien /// 3797403Sobrien const TargetRegisterInfo &getRegisterInfo() const { return RI; } 3897403Sobrien 3997403Sobrien const AArch64Subtarget &getSubTarget() const { return Subtarget; } 4097403Sobrien 4197403Sobrien void copyPhysReg(MachineBasicBlock &MBB, 4297403Sobrien MachineBasicBlock::iterator I, DebugLoc DL, 43117397Skan unsigned DestReg, unsigned SrcReg, 44117397Skan bool KillSrc) const; 45117397Skan 46117397Skan void storeRegToStackSlot(MachineBasicBlock &MBB, 4797403Sobrien MachineBasicBlock::iterator MI, 4897403Sobrien unsigned SrcReg, bool isKill, int FrameIndex, 4997403Sobrien const TargetRegisterClass *RC, 5097403Sobrien const TargetRegisterInfo *TRI) const; 5197403Sobrien void loadRegFromStackSlot(MachineBasicBlock &MBB, 5297403Sobrien MachineBasicBlock::iterator MBBI, 5397403Sobrien unsigned DestReg, int FrameIdx, 5497403Sobrien const TargetRegisterClass *RC, 5597403Sobrien const TargetRegisterInfo *TRI) const; 5697403Sobrien 57169691Skan bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 58169691Skan MachineBasicBlock *&FBB, 5997403Sobrien SmallVectorImpl<MachineOperand> &Cond, 6097403Sobrien bool AllowModify = false) const; 6197403Sobrien unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 6297403Sobrien MachineBasicBlock *FBB, 6397403Sobrien const SmallVectorImpl<MachineOperand> &Cond, 6497403Sobrien DebugLoc DL) const; 65169691Skan unsigned RemoveBranch(MachineBasicBlock &MBB) const; 6697403Sobrien bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const; 6797403Sobrien 68132720Skan bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const; 6997403Sobrien 7097403Sobrien /// Look through the instructions in this function and work out the largest 7197403Sobrien /// the stack frame can be while maintaining the ability to address local 7297403Sobrien /// slots with no complexities. 7397403Sobrien unsigned estimateRSStackLimit(MachineFunction &MF) const; 7497403Sobrien 7597403Sobrien /// getAddressConstraints - For loads and stores (and PRFMs) taking an 7697403Sobrien /// immediate offset, this function determines the constraints required for 7797403Sobrien /// the immediate. It must satisfy: 7897403Sobrien /// + MinOffset <= imm <= MaxOffset 7997403Sobrien /// + imm % OffsetScale == 0 80169691Skan void getAddressConstraints(const MachineInstr &MI, int &AccessScale, 8197403Sobrien int &MinOffset, int &MaxOffset) const; 8297403Sobrien 8397403Sobrien 8497403Sobrien unsigned getInstSizeInBytes(const MachineInstr &MI) const; 85169691Skan 86169691Skan unsigned getInstBundleLength(const MachineInstr &MI) const; 8797403Sobrien 8897403Sobrien}; 8997403Sobrien 9097403Sobrienbool rewriteA64FrameIndex(MachineInstr &MI, unsigned FrameRegIdx, 91169691Skan unsigned FrameReg, int &Offset, 92117397Skan const AArch64InstrInfo &TII); 93117397Skan 94117397Skan 9597403Sobrienvoid emitRegUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, 96132720Skan DebugLoc dl, const TargetInstrInfo &TII, 97117397Skan unsigned DstReg, unsigned SrcReg, unsigned ScratchReg, 9897403Sobrien int64_t NumBytes, 99169691Skan MachineInstr::MIFlag MIFlags = MachineInstr::NoFlags); 10097403Sobrien 101117397Skanvoid emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, 102117397Skan DebugLoc dl, const TargetInstrInfo &TII, 10397403Sobrien unsigned ScratchReg, int64_t NumBytes, 104117397Skan MachineInstr::MIFlag MIFlags = MachineInstr::NoFlags); 10597403Sobrien 10697403Sobrien} 10797403Sobrien 10897403Sobrien#endif 10997403Sobrien