IntrinsicsAArch64.td revision 263508
1//===- IntrinsicsAArch64.td - Defines AArch64 intrinsics -----------*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines all of the AArch64-specific intrinsics. 11// 12//===----------------------------------------------------------------------===// 13 14//===----------------------------------------------------------------------===// 15// Advanced SIMD (NEON) 16 17let TargetPrefix = "aarch64" in { // All intrinsics start with "llvm.aarch64.". 18 19// Vector Absolute Compare (Floating Point) 20def int_aarch64_neon_vacgeq : 21 Intrinsic<[llvm_v2i64_ty], [llvm_v2f64_ty, llvm_v2f64_ty], [IntrNoMem]>; 22def int_aarch64_neon_vacgtq : 23 Intrinsic<[llvm_v2i64_ty], [llvm_v2f64_ty, llvm_v2f64_ty], [IntrNoMem]>; 24 25// Vector saturating accumulate 26def int_aarch64_neon_suqadd : Neon_2Arg_Intrinsic; 27def int_aarch64_neon_usqadd : Neon_2Arg_Intrinsic; 28 29// Vector Bitwise reverse 30def int_aarch64_neon_rbit : Neon_1Arg_Intrinsic; 31 32// Vector extract and narrow 33def int_aarch64_neon_xtn : 34 Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>; 35 36// Vector floating-point convert 37def int_aarch64_neon_frintn : Neon_1Arg_Intrinsic; 38def int_aarch64_neon_fsqrt : Neon_1Arg_Intrinsic; 39def int_aarch64_neon_fcvtxn : 40 Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>; 41def int_aarch64_neon_fcvtns : 42 Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>; 43def int_aarch64_neon_fcvtnu : 44 Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>; 45def int_aarch64_neon_fcvtps : 46 Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>; 47def int_aarch64_neon_fcvtpu : 48 Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>; 49def int_aarch64_neon_fcvtms : 50 Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>; 51def int_aarch64_neon_fcvtmu : 52 Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>; 53def int_aarch64_neon_fcvtas : 54 Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>; 55def int_aarch64_neon_fcvtau : 56 Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>; 57def int_aarch64_neon_fcvtzs : 58 Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>; 59def int_aarch64_neon_fcvtzu : 60 Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>; 61 62// Vector maxNum (Floating Point) 63def int_aarch64_neon_vmaxnm : Neon_2Arg_Intrinsic; 64 65// Vector minNum (Floating Point) 66def int_aarch64_neon_vminnm : Neon_2Arg_Intrinsic; 67 68// Vector Pairwise maxNum (Floating Point) 69def int_aarch64_neon_vpmaxnm : Neon_2Arg_Intrinsic; 70 71// Vector Pairwise minNum (Floating Point) 72def int_aarch64_neon_vpminnm : Neon_2Arg_Intrinsic; 73 74// Vector Multiply Extended and Scalar Multiply Extended (Floating Point) 75def int_aarch64_neon_vmulx : 76 Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, LLVMMatchType<0>]>; 77 78class Neon_N2V_Intrinsic 79 : Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>, llvm_i32_ty], 80 [IntrNoMem]>; 81class Neon_N3V_Intrinsic 82 : Intrinsic<[llvm_anyvector_ty], 83 [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty], 84 [IntrNoMem]>; 85class Neon_N2V_Narrow_Intrinsic 86 : Intrinsic<[llvm_anyvector_ty], 87 [LLVMExtendedElementVectorType<0>, llvm_i32_ty], 88 [IntrNoMem]>; 89 90// Vector rounding shift right by immediate (Signed) 91def int_aarch64_neon_vsrshr : Neon_N2V_Intrinsic; 92def int_aarch64_neon_vurshr : Neon_N2V_Intrinsic; 93def int_aarch64_neon_vsqshlu : Neon_N2V_Intrinsic; 94 95def int_aarch64_neon_vsri : Neon_N3V_Intrinsic; 96def int_aarch64_neon_vsli : Neon_N3V_Intrinsic; 97 98def int_aarch64_neon_vsqshrun : Neon_N2V_Narrow_Intrinsic; 99def int_aarch64_neon_vrshrn : Neon_N2V_Narrow_Intrinsic; 100def int_aarch64_neon_vsqrshrun : Neon_N2V_Narrow_Intrinsic; 101def int_aarch64_neon_vsqshrn : Neon_N2V_Narrow_Intrinsic; 102def int_aarch64_neon_vuqshrn : Neon_N2V_Narrow_Intrinsic; 103def int_aarch64_neon_vsqrshrn : Neon_N2V_Narrow_Intrinsic; 104def int_aarch64_neon_vuqrshrn : Neon_N2V_Narrow_Intrinsic; 105 106// Vector across 107class Neon_Across_Intrinsic 108 : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>; 109 110class Neon_2Arg_Across_Float_Intrinsic 111 : Intrinsic<[llvm_anyvector_ty], [llvm_v4f32_ty], [IntrNoMem]>; 112 113def int_aarch64_neon_saddlv : Neon_Across_Intrinsic; 114def int_aarch64_neon_uaddlv : Neon_Across_Intrinsic; 115def int_aarch64_neon_smaxv : Neon_Across_Intrinsic; 116def int_aarch64_neon_umaxv : Neon_Across_Intrinsic; 117def int_aarch64_neon_sminv : Neon_Across_Intrinsic; 118def int_aarch64_neon_uminv : Neon_Across_Intrinsic; 119def int_aarch64_neon_vaddv : Neon_Across_Intrinsic; 120def int_aarch64_neon_vmaxv : Neon_Across_Intrinsic; 121def int_aarch64_neon_vminv : Neon_Across_Intrinsic; 122def int_aarch64_neon_vmaxnmv : Neon_Across_Intrinsic; 123def int_aarch64_neon_vminnmv : Neon_Across_Intrinsic; 124 125// Vector Table Lookup. 126def int_aarch64_neon_vtbl1 : 127 Intrinsic<[llvm_anyvector_ty], 128 [llvm_anyvector_ty, LLVMMatchType<0>], [IntrNoMem]>; 129 130def int_aarch64_neon_vtbl2 : 131 Intrinsic<[llvm_anyvector_ty], 132 [llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<0>], 133 [IntrNoMem]>; 134 135def int_aarch64_neon_vtbl3 : 136 Intrinsic<[llvm_anyvector_ty], 137 [llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<1>, 138 LLVMMatchType<0>], [IntrNoMem]>; 139 140def int_aarch64_neon_vtbl4 : 141 Intrinsic<[llvm_anyvector_ty], 142 [llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<1>, 143 LLVMMatchType<1>, LLVMMatchType<0>], [IntrNoMem]>; 144 145// Vector Table Extension. 146// Some elements of the destination vector may not be updated, so the original 147// value of that vector is passed as the first argument. The next 1-4 148// arguments after that are the table. 149def int_aarch64_neon_vtbx1 : 150 Intrinsic<[llvm_anyvector_ty], 151 [LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<0>], 152 [IntrNoMem]>; 153 154def int_aarch64_neon_vtbx2 : 155 Intrinsic<[llvm_anyvector_ty], 156 [LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<1>, 157 LLVMMatchType<0>], [IntrNoMem]>; 158 159def int_aarch64_neon_vtbx3 : 160 Intrinsic<[llvm_anyvector_ty], 161 [LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<1>, 162 LLVMMatchType<1>, LLVMMatchType<0>], [IntrNoMem]>; 163 164def int_aarch64_neon_vtbx4 : 165 Intrinsic<[llvm_anyvector_ty], 166 [LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<1>, 167 LLVMMatchType<1>, LLVMMatchType<1>, LLVMMatchType<0>], 168 [IntrNoMem]>; 169 170// Vector Load/store 171def int_aarch64_neon_vld1x2 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>], 172 [llvm_ptr_ty, llvm_i32_ty], 173 [IntrReadArgMem]>; 174def int_aarch64_neon_vld1x3 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, 175 LLVMMatchType<0>], 176 [llvm_ptr_ty, llvm_i32_ty], 177 [IntrReadArgMem]>; 178def int_aarch64_neon_vld1x4 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, 179 LLVMMatchType<0>, LLVMMatchType<0>], 180 [llvm_ptr_ty, llvm_i32_ty], 181 [IntrReadArgMem]>; 182 183def int_aarch64_neon_vst1x2 : Intrinsic<[], 184 [llvm_ptr_ty, llvm_anyvector_ty, 185 LLVMMatchType<0>, llvm_i32_ty], 186 [IntrReadWriteArgMem]>; 187def int_aarch64_neon_vst1x3 : Intrinsic<[], 188 [llvm_ptr_ty, llvm_anyvector_ty, 189 LLVMMatchType<0>, LLVMMatchType<0>, 190 llvm_i32_ty], [IntrReadWriteArgMem]>; 191def int_aarch64_neon_vst1x4 : Intrinsic<[], 192 [llvm_ptr_ty, llvm_anyvector_ty, 193 LLVMMatchType<0>, LLVMMatchType<0>, 194 LLVMMatchType<0>, llvm_i32_ty], 195 [IntrReadWriteArgMem]>; 196 197// Scalar Add 198def int_aarch64_neon_vaddds : 199 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>; 200def int_aarch64_neon_vadddu : 201 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>; 202 203 204// Scalar Sub 205def int_aarch64_neon_vsubds : 206 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>; 207def int_aarch64_neon_vsubdu : 208 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>; 209 210 211// Scalar Shift 212// Scalar Shift Left 213def int_aarch64_neon_vshlds : 214 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>; 215def int_aarch64_neon_vshldu : 216 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>; 217 218// Scalar Saturating Shift Left 219def int_aarch64_neon_vqshls : Neon_2Arg_Intrinsic; 220def int_aarch64_neon_vqshlu : Neon_2Arg_Intrinsic; 221 222// Scalar Shift Rouding Left 223def int_aarch64_neon_vrshlds : 224 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>; 225def int_aarch64_neon_vrshldu : 226 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>; 227 228// Scalar Saturating Rounding Shift Left 229def int_aarch64_neon_vqrshls : Neon_2Arg_Intrinsic; 230def int_aarch64_neon_vqrshlu : Neon_2Arg_Intrinsic; 231 232// Scalar Reduce Pairwise Add. 233def int_aarch64_neon_vpadd : 234 Intrinsic<[llvm_v1i64_ty], [llvm_v2i64_ty],[IntrNoMem]>; 235def int_aarch64_neon_vpfadd : 236 Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>; 237def int_aarch64_neon_vpfaddq : 238 Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>; 239 240// Scalar Reduce Pairwise Floating Point Max/Min. 241def int_aarch64_neon_vpmax : 242 Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>; 243def int_aarch64_neon_vpmaxq : 244 Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>; 245def int_aarch64_neon_vpmin : 246 Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>; 247def int_aarch64_neon_vpminq : 248 Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>; 249 250// Scalar Reduce Pairwise Floating Point Maxnm/Minnm. 251def int_aarch64_neon_vpfmaxnm : 252 Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>; 253def int_aarch64_neon_vpfmaxnmq : 254 Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>; 255def int_aarch64_neon_vpfminnm : 256 Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>; 257def int_aarch64_neon_vpfminnmq : 258 Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>; 259 260// Scalar Signed Integer Convert To Floating-point 261def int_aarch64_neon_vcvtf32_s32 : 262 Intrinsic<[llvm_float_ty], [llvm_v1i32_ty], [IntrNoMem]>; 263def int_aarch64_neon_vcvtf64_s64 : 264 Intrinsic<[llvm_double_ty], [llvm_v1i64_ty], [IntrNoMem]>; 265 266// Scalar Unsigned Integer Convert To Floating-point 267def int_aarch64_neon_vcvtf32_u32 : 268 Intrinsic<[llvm_float_ty], [llvm_v1i32_ty], [IntrNoMem]>; 269def int_aarch64_neon_vcvtf64_u64 : 270 Intrinsic<[llvm_double_ty], [llvm_v1i64_ty], [IntrNoMem]>; 271 272// Scalar Floating-point Reciprocal Exponent 273def int_aarch64_neon_vrecpx : Neon_1Arg_Intrinsic; 274 275class Neon_Cmp_Intrinsic 276 : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty, llvm_anyvector_ty], 277 [IntrNoMem]>; 278 279// Scalar Compare Equal 280def int_aarch64_neon_vceq : Neon_Cmp_Intrinsic; 281 282// Scalar Compare Greater-Than or Equal 283def int_aarch64_neon_vcge : Neon_Cmp_Intrinsic; 284def int_aarch64_neon_vchs : Neon_Cmp_Intrinsic; 285 286// Scalar Compare Less-Than or Equal 287def int_aarch64_neon_vclez : Neon_Cmp_Intrinsic; 288 289// Scalar Compare Less-Than 290def int_aarch64_neon_vcltz : Neon_Cmp_Intrinsic; 291 292// Scalar Compare Greater-Than 293def int_aarch64_neon_vcgt : Neon_Cmp_Intrinsic; 294def int_aarch64_neon_vchi : Neon_Cmp_Intrinsic; 295 296// Scalar Compare Bitwise Test Bits 297def int_aarch64_neon_vtstd : Neon_Cmp_Intrinsic; 298 299// Scalar Floating-point Absolute Compare Greater Than Or Equal 300def int_aarch64_neon_vcage : Neon_Cmp_Intrinsic; 301 302// Scalar Floating-point Absolute Compare Greater Than 303def int_aarch64_neon_vcagt : Neon_Cmp_Intrinsic; 304 305// Scalar Signed Saturating Accumulated of Unsigned Value 306def int_aarch64_neon_vuqadd : Neon_2Arg_Intrinsic; 307 308// Scalar Unsigned Saturating Accumulated of Signed Value 309def int_aarch64_neon_vsqadd : Neon_2Arg_Intrinsic; 310 311// Scalar Absolute Value 312def int_aarch64_neon_vabs : 313 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty], [IntrNoMem]>; 314 315// Scalar Absolute Difference 316def int_aarch64_neon_vabd : Neon_2Arg_Intrinsic; 317 318// Scalar Negate Value 319def int_aarch64_neon_vneg : 320 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty], [IntrNoMem]>; 321 322// Signed Saturating Doubling Multiply-Add Long 323def int_aarch64_neon_vqdmlal : Neon_3Arg_Long_Intrinsic; 324 325// Signed Saturating Doubling Multiply-Subtract Long 326def int_aarch64_neon_vqdmlsl : Neon_3Arg_Long_Intrinsic; 327 328class Neon_2Arg_ShiftImm_Intrinsic 329 : Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_i32_ty], [IntrNoMem]>; 330 331class Neon_3Arg_ShiftImm_Intrinsic 332 : Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty, llvm_i32_ty], 333 [IntrNoMem]>; 334 335// Scalar Shift Right (Immediate) 336def int_aarch64_neon_vshrds_n : Neon_2Arg_ShiftImm_Intrinsic; 337def int_aarch64_neon_vshrdu_n : Neon_2Arg_ShiftImm_Intrinsic; 338 339// Scalar Shift Right and Accumulate (Immediate) 340def int_aarch64_neon_vsrads_n : Neon_3Arg_ShiftImm_Intrinsic; 341def int_aarch64_neon_vsradu_n : Neon_3Arg_ShiftImm_Intrinsic; 342 343// Scalar Rounding Shift Right and Accumulate (Immediate) 344def int_aarch64_neon_vrsrads_n : Neon_3Arg_ShiftImm_Intrinsic; 345def int_aarch64_neon_vrsradu_n : Neon_3Arg_ShiftImm_Intrinsic; 346 347// Scalar Shift Left (Immediate) 348def int_aarch64_neon_vshld_n : Neon_2Arg_ShiftImm_Intrinsic; 349 350// Scalar Saturating Shift Left (Immediate) 351def int_aarch64_neon_vqshls_n : Neon_N2V_Intrinsic; 352def int_aarch64_neon_vqshlu_n : Neon_N2V_Intrinsic; 353 354// Scalar Signed Saturating Shift Left Unsigned (Immediate) 355def int_aarch64_neon_vqshlus_n : Neon_N2V_Intrinsic; 356 357// Scalar Signed Fixed-point Convert To Floating-Point (Immediate) 358def int_aarch64_neon_vcvtf32_n_s32 : 359 Intrinsic<[llvm_float_ty], [llvm_v1i32_ty, llvm_i32_ty], [IntrNoMem]>; 360def int_aarch64_neon_vcvtf64_n_s64 : 361 Intrinsic<[llvm_double_ty], [llvm_v1i64_ty, llvm_i32_ty], [IntrNoMem]>; 362 363// Scalar Unsigned Fixed-point Convert To Floating-Point (Immediate) 364def int_aarch64_neon_vcvtf32_n_u32 : 365 Intrinsic<[llvm_float_ty], [llvm_v1i32_ty, llvm_i32_ty], [IntrNoMem]>; 366def int_aarch64_neon_vcvtf64_n_u64 : 367 Intrinsic<[llvm_double_ty], [llvm_v1i64_ty, llvm_i32_ty], [IntrNoMem]>; 368 369// Scalar Floating-point Convert To Signed Fixed-point (Immediate) 370def int_aarch64_neon_vcvts_n_s32_f32 : 371 Intrinsic<[llvm_v1i32_ty], [llvm_v1f32_ty, llvm_i32_ty], [IntrNoMem]>; 372def int_aarch64_neon_vcvtd_n_s64_f64 : 373 Intrinsic<[llvm_v1i64_ty], [llvm_v1f64_ty, llvm_i32_ty], [IntrNoMem]>; 374 375// Scalar Floating-point Convert To Unsigned Fixed-point (Immediate) 376def int_aarch64_neon_vcvts_n_u32_f32 : 377 Intrinsic<[llvm_v1i32_ty], [llvm_v1f32_ty, llvm_i32_ty], [IntrNoMem]>; 378def int_aarch64_neon_vcvtd_n_u64_f64 : 379 Intrinsic<[llvm_v1i64_ty], [llvm_v1f64_ty, llvm_i32_ty], [IntrNoMem]>; 380 381class Neon_SHA_Intrinsic 382 : Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v1i32_ty, llvm_v4i32_ty], 383 [IntrNoMem]>; 384 385def int_aarch64_neon_sha1c : Neon_SHA_Intrinsic; 386def int_aarch64_neon_sha1m : Neon_SHA_Intrinsic; 387def int_aarch64_neon_sha1p : Neon_SHA_Intrinsic; 388} 389