ChangeLog.gcc43 revision 260139
12007-08-08 Andrew Haley <aph@redhat.com> (r128087) 2 3 * config/arm/libunwind.S (UNWIND_WRAPPER _Unwind_Backtrace): New. 4 * config/arm/unwind-arm.h (__gnu_Unwind_Backtrace): New. 5 * config/arm/unwind-arm.c (__gnu_Unwind_Backtrace): New. 6 72007-07-12 Geoffrey Keating <geoffk@apple.com> (r126588) 8 9 * builtins.c (get_pointer_alignment): Honor DECL_ALIGN on a 10 FUNCTION_DECL. 11 * tree.c (build_decl_stat): Move code from here... 12 (make_node_stat): ... to here. Don't uselessly clear DECL_USER_ALIGN. 13 (expr_align): Honor DECL_ALIGN on a FUNCTION_DECL. Add comment 14 about using DECL_ALIGN of LABEL_DECL and CONST_DECL. 15 * tree.h (DECL_USER_ALIGN): Fix misplaced comment. 16 * varasm.c (assemble_start_function): Use DECL_ALIGN instead of 17 FUNCTION_BOUNDARY. 18 192007-07-09 Geoffrey Keating <geoffk@apple.com> (r126529) 20 21 PR 32617 22 * c-common.c (c_alignof_expr): Look at DECL_ALIGN of 23 FUNCTION_DECLs. 24 (handle_aligned_attribute): Allow use on FUNCTION_DECLs. 25 * varasm.c (assemble_start_function): Honor DECL_ALIGN 26 for FUNCTION_DECLs. Don't use align_functions_log if 27 DECL_USER_ALIGN. 28 * print-tree.c (print_node): Print DECL_ALIGN and DECL_USER_ALIGN 29 even for FUNCTION_DECLs. 30 * c-decl.c (merge_decls): Propagate DECL_ALIGN even for 31 FUNCTION_DECLs. 32 * tree.h (DECL_ALIGN): Update for new location of 'align'. 33 (DECL_FUNCTION_CODE): Update for new location and name of 34 'function_code'. 35 (DECL_OFFSET_ALIGN): Update for new location of 'off_align'. 36 (struct tree_decl_common): Move 'align' and 'off_align' out 37 of union, ensure they're still on a 32-bit boundary. Remove 38 other fields in union 'u1'. 39 (struct tree_function_decl): Add field 'function_code' replacing 40 'u1.f' in tree_decl_common. 41 * tree.c (build_decl_stat): Set initial value of DECL_ALIGN. 42 * doc/extend.texi (Function Attributes): Add 'aligned' attribute. 43 (Variable Attributes): Cross-reference 'aligned' attribute 44 to Function Attributes. 45 * flags.h (force_align_functions_log): Delete. 46 * toplev.c (force_align_functions_log): Delete. 47 482007-07-06 Josh Conner <jconner@apple.com> (r126422) 49 50 PR middle-end/32602 51 PR middle-end/32603 52 * calls.c (store_one_arg): Handle arguments which are partially 53 on the stack when detecting argument overlap. 54 552007-07-03 Eric Christopher <echristo@apple.com> (r126278) 56 57 * doc/cppopts.texi: Add conflicting option note to -dM. 58 * doc/invoke.texi: Add note about possible conflicts with 59 -E for -dCHARS and note that -dM will not produce 60 any results if there is no machine dependent reorg. 61 622007-06-28 Geoffrey Keating <geoffk@apple.com> (r126088) 63 64 * doc/invoke.texi (C++ Dialect Options): Document 65 fvisibility-ms-compat. 66 * c.opt (fvisibility-ms-compat): New. 67 682007-06-05 Joerg Wunsch <j.gnu@uriah.heep.sax.de> (r125346) 69 70 PR preprocessor/23479 71 * doc/extend.texi: Document the 0b-prefixed binary integer 72 constant extension. 73 742007-05-31 Eric Christopher <echristo@apple.com> (r125246) 75 76 * expr.c (convert_move): Assert that we don't have a BLKmode 77 operand. 78 (store_expr): Handle BLKmode moves by calling emit_block_move. 79 802007-05-31 Daniel Berlin <dberlin@dberlin.org> (r125239) 81 82 * c-typeck.c (build_indirect_ref): Include type in error message. 83 (build_binary_op): Pass types to binary_op_error. 84 * c-common.c (binary_op_error): Take two type arguments, print out 85 types with error. 86 * c-common.h (binary_op_error): Update prototype. 87 882007-05-27 Eric Christopher <echristo@apple.com> (r125116) 89 90 * config/rs6000/rs6000.c (rs6000_emit_prologue): Update 91 sp_offset depending on stack size. Save r12 depending 92 on registers we're saving later. 93 (rs6000_emit_epilogue): Update sp_offset depending only 94 on stack size. 95 962007-05-24 Richard Sandiford <rsandifo@nildram.co.uk> (r125037) 97 98 * postreload-gcse.c (reg_changed_after_insn_p): New function. 99 (oprs_unchanged_p): Use it to check all registers in a REG. 100 (record_opr_changes): Look for clobbers in CALL_INSN_FUNCTION_USAGE. 101 (reg_set_between_after_reload_p): Delete. 102 (reg_used_between_after_reload_p): Likewise. 103 (reg_set_or_used_since_bb_start): Likewise. 104 (eliminate_partially_redundant_load): Use reg_changed_after_insn_p 105 and reg_used_between_p instead of reg_set_or_used_since_bb_start. 106 Use reg_set_between_p instead of reg_set_between_after_reload_p. 107 * rtlanal.c (reg_set_p): Check whether REG overlaps 108 regs_invalidated_by_call, rather than just checking the 109 membership of REGNO (REG). 110 1112007-05-18 Geoffrey Keating <geoffk@apple.com> (r124839) 112 113 * dwarf2out.c (print_die): Use '%ld' not '%lu' to print a 'long'. 114 (output_die): Use 'unsigned long' with %x. 115 * sched-vis.c (print_value): Use 'unsigned HOST_WIDE_INT' and 116 HOST_WIDE_INT_PRINT_HEX to print HOST_WIDE_INT. 117 * tree-dump.c (dump_pointer): Use 'unsigned long' for %lx. 118 1192007-05-16 Eric Christopher <echristo@apple.com> (r124763) 120 121 * config/rs6000/rs6000.c (rs6000_emit_prologue): Move altivec register 122 saving after stack push. Set sp_offset whenever we push. 123 (rs6000_emit_epilogue): Move altivec register restore before stack push. 124 1252007-05-03 Ian Lance Taylor <iant@google.com> (r124381) 126 127 * config/rs6000/rs6000.c (rs6000_override_options): Don't set 128 MASK_PPC_GFXOPT for 8540 or 8548. 129 1302007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124341) 131 132 * doc/invoke.texi: Fix typo, 'AMD Family 10h core' instead of 133 'AMD Family 10 core'. 134 1352007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124339) 136 137 * config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3 138 and athlon64-sse3 as improved versions of k8, opteron and athlon64 139 with SSE3 instruction set support. 140 * doc/invoke.texi: Likewise. 141 1422007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124330) 143 144 * config/i386/i386.c (override_options): Tuning 32-byte loop 145 alignment for amdfam10 architecture. Increasing the max loop 146 alignment to 24 bytes. 147 1482007-04-16 Lawrence Crowl <crowl@google.com> (r123909) 149 150 * doc/invoke.texi (Debugging Options): Add documentation for the 151 -femit-struct-debug options -femit-struct-debug-baseonly, 152 -femit-struct-debug-reduced, and 153 -femit-struct-debug-detailed[=...]. 154 155 * c-opts.c (c_common_handle_option): Add 156 OPT_femit_struct_debug_baseonly, OPT_femit_struct_debug_reduced, 157 and OPT_femit_struct_debug_detailed_. 158 * c.opt: Add specifications for 159 -femit-struct-debug-baseonly, -femit-struct-debug-reduced, 160 and -femit-struct-debug-detailed[=...]. 161 * opts.c (set_struct_debug_option): Parse the 162 -femit-struct-debug-... options. 163 * opts.c (matches_main_base, main_input_basename, 164 main_input_baselength, base_of_path, matches_main_base): Add 165 variables and functions to compare header base name to compilation 166 unit base name. 167 * opts.c (should_emit_struct_debug): Add to determine to emit a 168 structure based on the option. 169 (dump_struct_debug) Also disabled function to debug this 170 function. 171 * opts.c (handle_options): Save the base name of the 172 compilation unit. 173 174 * langhooks-def.h (LANG_HOOKS_GENERIC_TYPE_P): Define. 175 (LANG_HOOKS_FOR_TYPES_INITIALIZER): Add. 176 This hook indicates if a type is generic. Set it by default 177 to "never generic". 178 * langhooks.h (struct lang_hooks_for_types): Add a new hook 179 to determine if a struct type is generic or not. 180 * cp/cp-tree.h (class_tmpl_impl_spec_p): Declare a C++ hook. 181 * cp/tree.c (class_tmpl_impl_spec_p): Implement the C++ hook. 182 * cp/cp-lang.c (LANG_HOOKS_GENERIC_TYPE_P): Override null C hook 183 with live C++ hook. 184 185 * flags.h (enum debug_info_usage): Add an enumeration to describe 186 a program's use of a structure type. 187 * dwarf2out.c (gen_struct_or_union_type_die): Add a new parameter 188 to indicate the program's usage of the type. Filter structs based 189 on the -femit-struct-debug-... specification. 190 (gen_type_die): Split into two routines, gen_type_die and 191 gen_type_die_with_usage. gen_type_die is now a wrapper 192 that assumes direct usage. 193 (gen_type_die_with_usage): Replace calls to gen_type_die 194 with gen_type_die_with_usage adding the program usage of 195 the referenced type. 196 (dwarf2out_imported_module_or_decl): Suppress struct debug 197 information using should_emit_struct_debug when appropriate. 198 1992007-04-16 Ian Lance Taylor <iant@google.com> (r123906) 200 201 * tree-ssa-propagate.c (cfg_blocks_add): Insert blocks with fewer 202 predecessors at head rather than tail. 203 204 2052007-04-12 Richard Guenther <rguenther@suse.de> (r123736) 206 207 PR tree-optimization/24689 208 PR tree-optimization/31307 209 * fold-const.c (operand_equal_p): Compare INTEGER_CST array 210 indices by value. 211 * gimplify.c (canonicalize_addr_expr): To be consistent with 212 gimplify_compound_lval only set operands two and three of 213 ARRAY_REFs if they are not gimple_min_invariant. This makes 214 it never at this place. 215 * tree-ssa-ccp.c (maybe_fold_offset_to_array_ref): Likewise. 216 2172007-04-07 H.J. Lu <hongjiu.lu@intel.com> (r123639) 218 219 * config/i386/i386.c (ix86_handle_option): Handle SSSE3. 220 2212007-03-28 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r123313) 222 223 * config.gcc: Accept barcelona as a variant of amdfam10. 224 * config/i386/i386.c (override_options): Likewise. 225 * doc/invoke.texi: Likewise. 226 2272007-03-12 Seongbae Park <seongbae.park@gmail.com> (r122851) 228 229 * c-decl.c (warn_variable_length_array): New function. 230 Refactored from grokdeclarator to handle warn_vla 231 and handle unnamed array case. 232 (grokdeclarator): Refactored VLA warning case. 233 * c.opt (Wvla): New flag. 234 2352007-03-11 Ian Lance Taylor <iant@google.com> (r122831 - partial) 236 237 * tree-vrp.c (vrp_int_const_binop): Handle PLUS_EXPR and 238 the *_DIV_EXPR codes correctly with overflow infinities. 239 2402007-02-09 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r121763) 241 242 * config/i386/driver-i386.c: Turn on -mtune=native for AMDFAM10. 243 (bit_SSE4a): New. 244 2452007-02-08 Harsha Jagasia <harsha.jagasia@amd.com> (r121726) 246 247 * config/i386/xmmintrin.h: Make inclusion of emmintrin.h 248 conditional to __SSE2__. 249 (Entries below should have been added to first ChangeLog 250 entry for amdfam10 dated 2007-02-05) 251 * config/i386/emmintrin.h: Generate #error if __SSE2__ is not 252 defined. 253 * config/i386/pmmintrin.h: Generate #error if __SSE3__ is not 254 defined. 255 * config/i386/tmmintrin.h: Generate #error if __SSSE3__ is not 256 defined. 257 2582007-02-07 Jakub Jelinek <jakub@redhat.com> (r121687) 259 260 * config/i386/i386.c (override_options): Set PTA_SSSE3 for core2. 261 2622007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 263 264 * config/i386/athlon.md (athlon_fldxf_k8, athlon_fld_k8, 265 athlon_fstxf_k8, athlon_fst_k8, athlon_fist, athlon_fmov, 266 athlon_fadd_load, athlon_fadd_load_k8, athlon_fadd, athlon_fmul, 267 athlon_fmul_load, athlon_fmul_load_k8, athlon_fsgn, 268 athlon_fdiv_load, athlon_fdiv_load_k8, athlon_fdiv_k8, 269 athlon_fpspc_load, athlon_fpspc, athlon_fcmov_load, 270 athlon_fcmov_load_k8, athlon_fcmov_k8, athlon_fcomi_load_k8, 271 athlon_fcomi, athlon_fcom_load_k8, athlon_fcom): Added amdfam10. 272 2732007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 274 275 * config/i386/i386.md (x86_sahf_1, cmpfp_i_mixed, cmpfp_i_sse, 276 cmpfp_i_i387, cmpfp_iu_mixed, cmpfp_iu_sse, cmpfp_iu_387, 277 swapsi, swaphi_1, swapqi_1, swapdi_rex64, fix_truncsfdi_sse, 278 fix_truncdfdi_sse, fix_truncsfsi_sse, fix_truncdfsi_sse, 279 x86_fldcw_1, floatsisf2_mixed, floatsisf2_sse, floatdisf2_mixed, 280 floatdisf2_sse, floatsidf2_mixed, floatsidf2_sse, 281 floatdidf2_mixed, floatdidf2_sse, muldi3_1_rex64, mulsi3_1, 282 mulsi3_1_zext, mulhi3_1, mulqi3_1, umulqihi3_1, mulqihi3_insn, 283 umulditi3_insn, umulsidi3_insn, mulditi3_insn, mulsidi3_insn, 284 umuldi3_highpart_rex64, umulsi3_highpart_insn, 285 umulsi3_highpart_zext, smuldi3_highpart_rex64, 286 smulsi3_highpart_insn, smulsi3_highpart_zext, x86_64_shld, 287 x86_shld_1, x86_64_shrd, sqrtsf2_mixed, sqrtsf2_sse, 288 sqrtsf2_i387, sqrtdf2_mixed, sqrtdf2_sse, sqrtdf2_i387, 289 sqrtextendsfdf2_i387, sqrtxf2, sqrtextendsfxf2_i387, 290 sqrtextenddfxf2_i387): Added amdfam10_decode. 291 292 * config/i386/athlon.md (athlon_idirect_amdfam10, 293 athlon_ivector_amdfam10, athlon_idirect_load_amdfam10, 294 athlon_ivector_load_amdfam10, athlon_idirect_both_amdfam10, 295 athlon_ivector_both_amdfam10, athlon_idirect_store_amdfam10, 296 athlon_ivector_store_amdfam10): New define_insn_reservation. 297 (athlon_idirect_loadmov, athlon_idirect_movstore): Added 298 amdfam10. 299 3002007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 301 302 * config/i386/athlon.md (athlon_call_amdfam10, 303 athlon_pop_amdfam10, athlon_lea_amdfam10): New 304 define_insn_reservation. 305 (athlon_branch, athlon_push, athlon_leave_k8, athlon_imul_k8, 306 athlon_imul_k8_DI, athlon_imul_mem_k8, athlon_imul_mem_k8_DI, 307 athlon_idiv, athlon_idiv_mem, athlon_str): Added amdfam10. 308 3092007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 310 311 * config/i386/athlon.md (athlon_sseld_amdfam10, 312 athlon_mmxld_amdfam10, athlon_ssest_amdfam10, 313 athlon_mmxssest_short_amdfam10): New define_insn_reservation. 314 3152007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 316 317 * config/i386/athlon.md (athlon_sseins_amdfam10): New 318 define_insn_reservation. 319 * config/i386/i386.md (sseins): Added sseins to define_attr type 320 and define_attr unit. 321 * config/i386/sse.md: Set type attribute to sseins for insertq 322 and insertqi. 323 3242007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 325 326 * config/i386/athlon.md (sselog_load_amdfam10, sselog_amdfam10, 327 ssecmpvector_load_amdfam10, ssecmpvector_amdfam10, 328 ssecomi_load_amdfam10, ssecomi_amdfam10, 329 sseaddvector_load_amdfam10, sseaddvector_amdfam10): New 330 define_insn_reservation. 331 (ssecmp_load_k8, ssecmp, sseadd_load_k8, seadd): Added amdfam10. 332 3332007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 334 335 * config/i386/athlon.md (cvtss2sd_load_amdfam10, 336 cvtss2sd_amdfam10, cvtps2pd_load_amdfam10, cvtps2pd_amdfam10, 337 cvtsi2sd_load_amdfam10, cvtsi2ss_load_amdfam10, 338 cvtsi2sd_amdfam10, cvtsi2ss_amdfam10, cvtsd2ss_load_amdfam10, 339 cvtsd2ss_amdfam10, cvtpd2ps_load_amdfam10, cvtpd2ps_amdfam10, 340 cvtsX2si_load_amdfam10, cvtsX2si_amdfam10): New 341 define_insn_reservation. 342 343 * config/i386/sse.md (cvtsi2ss, cvtsi2ssq, cvtss2si, 344 cvtss2siq, cvttss2si, cvttss2siq, cvtsi2sd, cvtsi2sdq, 345 cvtsd2si, cvtsd2siq, cvttsd2si, cvttsd2siq, 346 cvtpd2dq, cvttpd2dq, cvtsd2ss, cvtss2sd, 347 cvtpd2ps, cvtps2pd): Added amdfam10_decode attribute. 348 3492007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 350 351 * config/i386/athlon.md (athlon_ssedivvector_amdfam10, 352 athlon_ssedivvector_load_amdfam10, athlon_ssemulvector_amdfam10, 353 athlon_ssemulvector_load_amdfam10): New define_insn_reservation. 354 (athlon_ssediv, athlon_ssediv_load_k8, athlon_ssemul, 355 athlon_ssemul_load_k8): Added amdfam10. 356 3572007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 358 359 * config/i386/i386.h (TARGET_SSE_UNALIGNED_MOVE_OPTIMAL): New macro. 360 (x86_sse_unaligned_move_optimal): New variable. 361 362 * config/i386/i386.c (x86_sse_unaligned_move_optimal): Enable for 363 m_AMDFAM10. 364 (ix86_expand_vector_move_misalign): Add code to generate movupd/movups 365 for unaligned vector SSE double/single precision loads for AMDFAM10. 366 3672007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 368 369 * config/i386/i386.h (TARGET_AMDFAM10): New macro. 370 (TARGET_CPU_CPP_BUILTINS): Add code for amdfam10. 371 Define TARGET_CPU_DEFAULT_amdfam10. 372 (TARGET_CPU_DEFAULT_NAMES): Add amdfam10. 373 (processor_type): Add PROCESSOR_AMDFAM10. 374 375 * config/i386/i386.md: Add amdfam10 as a new cpu attribute to match 376 processor_type in config/i386/i386.h. 377 Enable imul peepholes for TARGET_AMDFAM10. 378 379 * config.gcc: Add support for --with-cpu option for amdfam10. 380 381 * config/i386/i386.c (amdfam10_cost): New variable. 382 (m_AMDFAM10): New macro. 383 (m_ATHLON_K8_AMDFAM10): New macro. 384 (x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen, 385 x86_cmove, x86_3dnow_a, x86_deep_branch, x86_use_simode_fiop, 386 x86_promote_QImode, x86_integer_DFmode_moves, 387 x86_partial_reg_dependency, x86_memory_mismatch_stall, 388 x86_accumulate_outgoing_args, x86_arch_always_fancy_math_387, 389 x86_sse_partial_reg_dependency, x86_sse_typeless_stores, 390 x86_use_ffreep, x86_use_incdec, x86_four_jump_limit, 391 x86_schedule, x86_use_bt, x86_cmpxchg16b, x86_pad_returns): 392 Enable/disable for amdfam10. 393 (override_options): Add amdfam10_cost to processor_target_table. 394 Set up PROCESSOR_AMDFAM10 for amdfam10 entry in 395 processor_alias_table. 396 (ix86_issue_rate): Add PROCESSOR_AMDFAM10. 397 (ix86_adjust_cost): Add code for amdfam10. 398 3992007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 400 401 * config/i386/i386.opt: Add new Advanced Bit Manipulation (-mabm) 402 instruction set feature flag. Add new (-mpopcnt) flag for popcnt 403 instruction. Add new SSE4A (-msse4a) instruction set feature flag. 404 * config/i386/i386.h: Add builtin definition for SSE4A. 405 * config/i386/i386.md: Add support for ABM instructions 406 (popcnt and lzcnt). 407 * config/i386/sse.md: Add support for SSE4A instructions 408 (movntss, movntsd, extrq, insertq). 409 * config/i386/i386.c: Add support for ABM and SSE4A builtins. 410 Add -march=amdfam10 flag. 411 * config/i386/ammintrin.h: Add support for SSE4A intrinsics. 412 * doc/invoke.texi: Add documentation on flags for sse4a, abm, popcnt 413 and amdfam10. 414 * doc/extend.texi: Add documentation for SSE4A builtins. 415 4162007-01-24 Jakub Jelinek <jakub@redhat.com> (r121140) 417 418 * config/i386/i386.h (x86_cmpxchg16b): Remove const. 419 (TARGET_CMPXCHG16B): Define to x86_cmpxchg16b. 420 * config/i386/i386.c (x86_cmpxchg16b): Remove const. 421 (override_options): Add PTA_CX16 flag. Set x86_cmpxchg16b 422 for CPUs that have PTA_CX16 set. 423 4242007-01-18 Josh Conner <jconner@apple.com> (r120902) 425 426 PR target/30485 427 * config/rs6000/rs6000.c (rs6000_emit_vector_compare): Add 428 support for UNLE, UNLT, UNGE, and UNGT. 429 4302007-01-17 Eric Christopher <echristo@apple.com> (r120846) 431 432 * config.gcc: Support core2 processor. 433 4342007-01-11 Joseph Myers <joseph@codesourcery.com> (r120688) 435 436 * c-common.c (vector_types_convertible_p): Treat opaque types as 437 always convertible if they have the same size, but not otherwise. 438 4392007-01-08 Geoffrey Keating <geoffk@apple.com> (r120611) 440 441 * target.h (struct gcc_target): New field library_rtti_comdat. 442 * target-def.h (TARGET_CXX_LIBRARY_RTTI_COMDAT): New. 443 (TARGET_CXX): Add TARGET_CXX_LIBRARY_RTTI_COMDAT. 444 * doc/tm.texi (C++ ABI): Document TARGET_CXX_LIBRARY_RTTI_COMDAT. 445 * config/darwin.h (TARGET_CXX_LIBRARY_RTTI_COMDAT): Define. 446 4472007-01-08 Mark Shinwell <shinwell@codesourcery.com> (r120572) 448 449 * c.opt: Add -flax-vector-conversions. 450 * c-typeck.c (convert_for_assignment): Pass flag to 451 vector_types_convertible_p to allow emission of note. 452 (digest_init): Likewise. 453 * c-opts.c: Handle -flax-vector-conversions. 454 * c-common.c (flag_lax_vector_conversions): New. 455 (vector_types_convertible_p): Unless -flax-vector conversions 456 has been passed, disallow conversions between vectors with 457 differing numbers of subparts and/or element types. If such 458 a conversion is disallowed, possibly emit a note on the first 459 occasion only to inform the user of -flax-vector-conversions. 460 The new last argument specifies this. 461 * c-common.h (flag_lax_vector_conversions): New. 462 (vector_types_convertible_p): Add extra argument. 463 * config/i386/i386.c (ix86_init_mmx_sse_builtins): Use 464 char_type_node for V*QI type vectors. 465 * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): 466 Update to satisfy new typechecking rules. 467 * config/rs6000/altivec.h (vec_cmple): Use vec_cmpge, for both 468 C and C++ variants. 469 * doc/invoke.texi (C Dialect Options): Document 470 -flax-vector-conversions. 471 4722007-01-05 Manuel Lopez-Ibanez <manu@gcc.gnu.org> (r120505) 473 474 PR c/19978 475 * tree.h (TREE_OVERFLOW_P): New. 476 * c-typeck.c (parser_build_unary_op): Warn only if result 477 overflowed and operands did not. 478 (parser_build_binary_op): Likewise. 479 (convert_for_assignment): Remove redundant overflow_warning. 480 * c-common.c (overflow_warning): Don't check or set TREE_OVERFLOW. 481 4822006-12-13 Ian Lance Taylor <iant@google.com> (r119855) 483 484 PR c++/19564 485 PR c++/19756 486 * c-typeck.c (parser_build_binary_op): Move parentheses warnings 487 to warn_about_parentheses in c-common.c. 488 * c-common.c (warn_about_parentheses): New function. 489 * c-common.h (warn_about_parentheses): Declare. 490 * doc/invoke.texi (Warning Options): Update -Wparentheses 491 description. 492 4932006-12-12 Geoffrey Keating <geoffk@apple.com> (r119820) 494 495 * mips-tdump.c: Replace CROSS_COMPILE with 496 CROSS_DIRECTORY_STRUCTURE. 497 * mips-tfile.c: Likewise. 498 * gcc.c: Likewise. 499 * configure.ac: Likewise. 500 * cppdefault.c: Likewise. 501 * Makefile.in: Likewise. 502 * config/alpha/osf.h: Likewise. 503 * config/i386/cygwin.h: Likewise. 504 * config/i386/beos-elf.h: Likewise. 505 * config/i386/nto.h: Likewise. 506 * config/svr4.h: Likewise. 507 * config/rs6000/aix.h: Likewise. 508 * config/rs6000/sysv4.h: Likewise. 509 * collect2.c: Likewise. 510 * configure: Regenerate. 511 512 * doc/tm.texi (Alignment Output): Document that ASM_OUTPUT_SKIP 513 actually takes an unsigned HOST_WIDE_INT for its second parameter. 514 5152006-12-02 H.J. Lu <hongjiu.lu@intel.com> (r119454 - partial) 516 517 PR target/30040 518 * config/i386/driver-i386.c (bit_SSSE3): New. 519 5202006-11-27 Uros Bizjak <ubizjak@gmail.com> (r119260) 521 522 * config/i386/i386.c (x86_ext_80387_constants): Add m_K8, m_CORE2 523 and m_GENERIC64. 524 5252006-11-18 Vladimir Makarov <vmakarov@redhat.com> (r118973) 526 527 * doc/invoke.texi (core2): Add item. 528 529 * config/i386/i386.h (TARGET_CORE2, TARGET_CPU_DEFAULT_core2): New 530 macros. 531 (TARGET_CPU_CPP_BUILTINS): Add code for core2. 532 (TARGET_CPU_DEFAULT_generic): Change value. 533 (TARGET_CPU_DEFAULT_NAMES): Add core2. 534 (processor_type): Add new constant PROCESSOR_CORE2. 535 536 * config/i386/i386.md (cpu): Add core2. 537 538 * config/i386/i386.c (core2_cost): New initialized variable. 539 (m_CORE2): New macro. 540 (x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen, 541 x86_deep_branch, x86_partial_reg_stall, x86_use_simode_fiop, 542 x86_use_cltd, x86_promote_QImode, x86_sub_esp_4, x86_sub_esp_8, 543 x86_add_esp_4, x86_add_esp_8, x86_integer_DFmode_moves, 544 x86_partial_reg_dependency, x86_memory_mismatch_stall, 545 x86_accumulate_outgoing_args, x86_prologue_using_move, 546 x86_epilogue_using_move, x86_arch_always_fancy_math_387, 547 x86_sse_partial_reg_dependency, x86_rep_movl_optimal, 548 x86_use_incdec, x86_four_jump_limit, x86_schedule, 549 x86_pad_returns): Add m_CORE2. 550 (override_options): Add entries for Core2. 551 (ix86_issue_rate): Add case for Core2. 552 5532006-11-07 Eric Christopher <echristo@apple.com> (r118576) 554 555 * libgcc2.c (__bswapdi2): Rename from bswapDI2. 556 (__bswapsi2): Ditto. 557 * libgcc2.h: Remove transformation of bswap routines. 558 * config/i386/i386.md (bswapsi2): New. 559 (bswapdi2): Ditto. 560 5612006-10-31 Geoffrey Keating <geoffk@apple.com> (r118360) 562 563 * coverage.c (coverage_checksum_string): Update comment. 564 * dwarf2out.c (switch_to_eh_frame_section): Update for removal 565 of get_file_function_name. 566 * cgraphunit.c (cgraph_build_static_cdtor): Update for rename 567 of get_file_function_name_long. 568 * tree.c (get_file_function_name): Rename from 569 get_file_function_name_long; improve comment; handle 'I' and 'D' 570 specially when the target has ctor/dtor support; remove special 571 handling for 'F'. 572 (get_file_function_name): Remove. 573 * tree.h (get_file_function_name): Rename from 574 get_file_function_name_long. 575 (get_file_function_name): Remove prototype. 576 5772006-10-31 Geoffrey Keating <geoffk@apple.com> (r118356) 578 579 * c-decl.c (grokdeclarator): Don't set DECL_EXTERNAL on 580 inline static functions in c99 mode. 581 582 PR 16622 583 * doc/extend.texi (Inline): Update. 584 * c-tree.h (struct language_function): Remove field 'extern_inline'. 585 * c-decl.c (current_extern_inline): Delete. 586 (pop_scope): Adjust test for an undefined nested function. 587 Add warning about undeclared inline function. 588 (diagnose_mismatched_decls): Update comments. Disallow overriding 589 of inline functions in a translation unit in C99. Allow inline 590 declarations in C99 at any time. 591 (merge_decls): Boolize variables. Handle C99 'extern inline' 592 semantics. 593 (grokdeclarator): Set DECL_EXTERNAL here for functions. Handle 594 C99 inline semantics. 595 (start_function): Don't clear current_extern_inline. Don't set 596 DECL_EXTERNAL. 597 (c_push_function_context): Don't push current_extern_inline. 598 (c_pop_function_context): Don't restore current_extern_inline. 599 600 PR 11377 601 * c-typeck.c (build_external_ref): Warn about static variables 602 used in extern inline functions. 603 * c-decl.c (start_decl): Warn about static variables declared 604 in extern inline functions. 605 6062006-10-27 Vladimir Makarov <vmakarov@redhat.com> (r118090) 607 608 * config/i386/i386.h (TARGET_GEODE): 609 (TARGET_CPU_CPP_BUILTINS): Add code for geode. 610 (TARGET_CPU_DEFAULT_geode): New macro. 611 (TARGET_CPU_DEFAULT_k6, TARGET_CPU_DEFAULT_k6_2, 612 TARGET_CPU_DEFAULT_k6_3, TARGET_CPU_DEFAULT_athlon, 613 TARGET_CPU_DEFAULT_athlon_sse, TARGET_CPU_DEFAULT_k8, 614 TARGET_CPU_DEFAULT_pentium_m, TARGET_CPU_DEFAULT_prescott, 615 TARGET_CPU_DEFAULT_nocona, TARGET_CPU_DEFAULT_generic): Increase 616 the macro values. 617 (TARGET_CPU_DEFAULT_NAMES): Add geode. 618 (processor_type): Add PROCESSOR_GEODE. 619 620 * config/i386/i386.md: Include geode.md. 621 (cpu): Add geode. 622 623 * config/i386/i386.c (geode_cost): New initialized global 624 variable. 625 (m_GEODE, m_K6_GEODE): New macros. 626 (x86_use_leave, x86_push_memory, x86_deep_branch, x86_use_sahf, 627 x86_use_himode_fiop, x86_promote_QImode, x86_add_esp_4, 628 x86_add_esp_8, x86_rep_movl_optimal, x86_ext_80387_constants, 629 x86_schedule): Use m_K6_GEODE instead of m_K6. 630 (x86_movx, x86_cmove): Set up m_GEODE. 631 (x86_integer_DFmode_moves): Clear m_GEODE. 632 (processor_target_table): Add entry for geode. 633 (processor_alias_table): Ditto. 634 635 * config/i386/geode.md: New file. 636 637 * doc/invoke.texi: Add entry about geode processor. 638 6392006-10-24 Richard Guenther <rguenther@suse.de> (r118001) 640 641 PR middle-end/28796 642 * builtins.c (fold_builtin_classify): Use HONOR_INFINITIES 643 and HONOR_NANS instead of MODE_HAS_INFINITIES and MODE_HAS_NANS 644 for deciding optimizations in consistency with fold-const.c 645 (fold_builtin_unordered_cmp): Likewise. 646 6472006-10-22 H.J. Lu <hongjiu.lu@intel.com> (r117958) 648 649 * config.gcc (i[34567]86-*-*): Add tmmintrin.h to extra_headers. 650 (x86_64-*-*): Likewise. 651 652 * config/i386/i386.c (pta_flags): Add PTA_SSSE3. 653 (override_options): Check SSSE3. 654 (ix86_builtins): Add IX86_BUILTIN_PHADDW, IX86_BUILTIN_PHADDD, 655 IX86_BUILTIN_PHADDSW, IX86_BUILTIN_PHSUBW, IX86_BUILTIN_PHSUBD, 656 IX86_BUILTIN_PHSUBSW, IX86_BUILTIN_PMADDUBSW, 657 IX86_BUILTIN_PMULHRSW, IX86_BUILTIN_PSHUFB, 658 IX86_BUILTIN_PSIGNB, IX86_BUILTIN_PSIGNW, IX86_BUILTIN_PSIGND, 659 IX86_BUILTIN_PALIGNR, IX86_BUILTIN_PABSB, IX86_BUILTIN_PABSW, 660 IX86_BUILTIN_PABSD, IX86_BUILTIN_PHADDW128, 661 IX86_BUILTIN_PHADDD128, IX86_BUILTIN_PHADDSW128, 662 IX86_BUILTIN_PHSUBW128, IX86_BUILTIN_PHSUBD128, 663 IX86_BUILTIN_PHSUBSW128, IX86_BUILTIN_PMADDUBSW128, 664 IX86_BUILTIN_PMULHRSW128, IX86_BUILTIN_PSHUFB128, 665 IX86_BUILTIN_PSIGNB128, IX86_BUILTIN_PSIGNW128, 666 IX86_BUILTIN_PSIGND128, IX86_BUILTIN_PALIGNR128, 667 IX86_BUILTIN_PABSB128, IX86_BUILTIN_PABSW128 and 668 IX86_BUILTIN_PABSD128. 669 (bdesc_2arg): Add SSSE3. 670 (bdesc_1arg): Likewise. 671 (ix86_init_mmx_sse_builtins): Support SSSE3. 672 (ix86_expand_builtin): Likewise. 673 * config/i386/i386.h (TARGET_CPU_CPP_BUILTINS): Likewise. 674 675 * config/i386/i386.md (UNSPEC_PSHUFB): New. 676 (UNSPEC_PSIGN): Likewise. 677 (UNSPEC_PALIGNR): Likewise. 678 Include mmx.md before sse.md. 679 680 * config/i386/i386.opt: Add -mssse3. 681 682 * config/i386/sse.md (ssse3_phaddwv8hi3): New pattern for SSSE3. 683 (ssse3_phaddwv4hi3): Likewise. 684 (ssse3_phadddv4si3): Likewise. 685 (ssse3_phadddv2si3): Likewise. 686 (ssse3_phaddswv8hi3): Likewise. 687 (ssse3_phaddswv4hi3): Likewise. 688 (ssse3_phsubwv8hi3): Likewise. 689 (ssse3_phsubwv4hi3): Likewise. 690 (ssse3_phsubdv4si3): Likewise. 691 (ssse3_phsubdv2si3): Likewise. 692 (ssse3_phsubswv8hi3): Likewise. 693 (ssse3_phsubswv4hi3): Likewise. 694 (ssse3_pmaddubswv8hi3): Likewise. 695 (ssse3_pmaddubswv4hi3): Likewise. 696 (ssse3_pmulhrswv8hi3): Likewise. 697 (ssse3_pmulhrswv4hi3): Likewise. 698 (ssse3_pshufbv16qi3): Likewise. 699 (ssse3_pshufbv8qi3): Likewise. 700 (ssse3_psign<mode>3): Likewise. 701 (ssse3_psign<mode>3): Likewise. 702 (ssse3_palignrti): Likewise. 703 (ssse3_palignrdi): Likewise. 704 (abs<mode>2): Likewise. 705 (abs<mode>2): Likewise. 706 707 * config/i386/tmmintrin.h: New file. 708 709 * doc/extend.texi: Document SSSE3 built-in functions. 710 711 * doc/invoke.texi: Document -mssse3/-mno-ssse3 switches. 712 7132006-10-22 H.J. Lu <hongjiu.lu@intel.com> (r117959) 714 715 * config/i386/tmmintrin.h: Remove the duplicated content. 716 7172006-10-21 Richard Guenther <rguenther@suse.de> (r117932) 718 719 PR tree-optimization/3511 720 * tree-ssa-pre.c (phi_translate): Fold CALL_EXPRs that 721 got new invariant arguments during PHI translation. 722 7232006-10-21 Richard Guenther <rguenther@suse.de> (r117929) 724 725 * builtins.c (fold_builtin_classify): Fix typo. 726 7272006-09-07 Eric Christopher <echristo@apple.com> (r118361) 728 Falk Hueffner <falk@debian.org> 729 730 * doc/extend.texi (__builtin_bswap32): Document. 731 (__builtin_bswap64): Ditto. 732 * doc/libgcc.texi (bswapsi2): Document. 733 (bswapdi2): Ditto. 734 * doc/rtl.texi (bswap): Document. 735 * optabs.c (expand_unop): Don't widen a bswap. 736 (init_optabs): Init bswap. Set libfuncs explicitly 737 for bswapsi2 and bswapdi2. 738 * optabs.h (OTI_bswap): New. 739 (bswap_optab): Ditto. 740 * genopinit.c (optabs): Handle bswap_optab. 741 * tree.h (tree_index): Add TI_UINT32_TYPE and 742 TI_UINT64_TYPE. 743 (uint32_type_node): New. 744 (uint64_type_node): Ditto. 745 * tree.c (build_common_tree_nodes_2): Initialize 746 uint32_type_node and uint64_type_node. 747 * builtins.c (expand_builtin_bswap): New. 748 (expand_builtin): Call. 749 (fold_builtin_bswap): New. 750 (fold_builtin_1): Call. 751 * fold-const.c (tree_expr_nonnegative_p): Return true 752 for bswap. 753 * builtin-types.def (BT_UINT32): New. 754 (BT_UINT64): Ditto. 755 (BT_FN_UINT32_UINT32): Ditto. 756 (BT_FN_UINT64_UINT64): Ditto. 757 * builtins.def (BUILT_IN_BSWAP32): New. 758 (BUILT_IN_BSWAP64): Ditto. 759 * rtl.def (BSWAP): New. 760 * genattrtab.c (check_attr_value): New. 761 * libgcc2.c (__bswapSI2): New. 762 (__bswapDI2): Ditto. 763 * libgcc2.h (__bswapSI2): Declare. 764 (__bswapDI2): Ditto. 765 * mklibgcc.in (lib2funcs): Add _bswapsi2 and _bswapdi2. 766 * simplify-rtx.c (simplify_const_unary_operation): Return 767 0 for BSWAP. 768 * libgcc-std.ver (__bwapsi2): Add. 769 (__bswapdi2): Ditto. 770 * reload1.c (eliminate_regs_1): Add bswap. 771 (elimination_effects): Ditto. 772 * config/i386/i386.h (x86_bswap): New. 773 (TARGET_BSWAP): Use. 774 * config/i386/i386.c (x86_bswap): Set. 775