ChangeLog.gcc43 revision 259947
12007-08-08  Andrew Haley  <aph@redhat.com> (r128087)
2
3	* config/arm/libunwind.S (UNWIND_WRAPPER _Unwind_Backtrace): New.
4	* config/arm/unwind-arm.h (__gnu_Unwind_Backtrace): New.
5	* config/arm/unwind-arm.c (__gnu_Unwind_Backtrace): New.
6
72007-07-12  Geoffrey Keating  <geoffk@apple.com> (r126588)
8
9	* builtins.c (get_pointer_alignment): Honor DECL_ALIGN on a
10	FUNCTION_DECL.
11	* tree.c (build_decl_stat): Move code from here...
12	(make_node_stat): ... to here.  Don't uselessly clear DECL_USER_ALIGN.
13	(expr_align): Honor DECL_ALIGN on a FUNCTION_DECL.  Add comment
14	about using DECL_ALIGN of LABEL_DECL and CONST_DECL.
15	* tree.h (DECL_USER_ALIGN): Fix misplaced comment.
16	* varasm.c (assemble_start_function): Use DECL_ALIGN instead of
17	FUNCTION_BOUNDARY.
18
192007-07-09  Geoffrey Keating  <geoffk@apple.com> (r126529)
20
21	PR 32617
22	* c-common.c (c_alignof_expr): Look at DECL_ALIGN of
23	FUNCTION_DECLs.
24	(handle_aligned_attribute): Allow use on FUNCTION_DECLs.
25	* varasm.c (assemble_start_function): Honor DECL_ALIGN
26	for FUNCTION_DECLs.  Don't use align_functions_log if
27	DECL_USER_ALIGN.
28	* print-tree.c (print_node): Print DECL_ALIGN and DECL_USER_ALIGN
29	even for FUNCTION_DECLs.
30	* c-decl.c (merge_decls): Propagate DECL_ALIGN even for
31	FUNCTION_DECLs.
32	* tree.h (DECL_ALIGN): Update for new location of 'align'.
33	(DECL_FUNCTION_CODE): Update for new location and name of
34	'function_code'.
35	(DECL_OFFSET_ALIGN): Update for new location of 'off_align'.
36	(struct tree_decl_common): Move 'align' and 'off_align' out
37	of union, ensure they're still on a 32-bit boundary.  Remove
38	other fields in union 'u1'.
39	(struct tree_function_decl): Add field 'function_code' replacing
40	'u1.f' in tree_decl_common.
41	* tree.c (build_decl_stat): Set initial value of DECL_ALIGN.
42	* doc/extend.texi (Function Attributes): Add 'aligned' attribute.
43	(Variable Attributes): Cross-reference 'aligned' attribute
44	to Function Attributes.
45	* flags.h (force_align_functions_log): Delete.
46	* toplev.c (force_align_functions_log): Delete.
47
482007-06-05  Joerg Wunsch  <j.gnu@uriah.heep.sax.de> (r125346)
49
50	PR preprocessor/23479
51	* doc/extend.texi: Document the 0b-prefixed binary integer
52	constant extension.
53	
542007-05-31  Eric Christopher  <echristo@apple.com> (r125246)
55
56	* expr.c (convert_move): Assert that we don't have a BLKmode
57	operand.
58	(store_expr): Handle BLKmode moves by calling emit_block_move.
59
602007-05-31  Daniel Berlin  <dberlin@dberlin.org> (r125239)
61
62	* c-typeck.c (build_indirect_ref): Include type in error message.
63	(build_binary_op): Pass types to binary_op_error.
64	* c-common.c (binary_op_error): Take two type arguments, print out
65	types with error.
66	* c-common.h (binary_op_error): Update prototype.
67
682007-05-27  Eric Christopher  <echristo@apple.com> (r125116)
69
70	* config/rs6000/rs6000.c (rs6000_emit_prologue): Update
71	sp_offset depending on stack size. Save r12 depending
72	on registers we're saving later.
73	(rs6000_emit_epilogue): Update sp_offset depending only
74	on stack size.
75
762007-05-24  Richard Sandiford  <rsandifo@nildram.co.uk> (r125037)
77
78	* postreload-gcse.c (reg_changed_after_insn_p): New function.
79	(oprs_unchanged_p): Use it to check all registers in a REG.
80	(record_opr_changes): Look for clobbers in CALL_INSN_FUNCTION_USAGE.
81	(reg_set_between_after_reload_p): Delete.
82	(reg_used_between_after_reload_p): Likewise.
83	(reg_set_or_used_since_bb_start): Likewise.
84	(eliminate_partially_redundant_load): Use reg_changed_after_insn_p
85	and reg_used_between_p instead of reg_set_or_used_since_bb_start.
86	Use reg_set_between_p instead of reg_set_between_after_reload_p.
87	* rtlanal.c (reg_set_p): Check whether REG overlaps
88	regs_invalidated_by_call, rather than just checking the
89	membership of REGNO (REG).
90
912007-05-18  Geoffrey Keating  <geoffk@apple.com> (r124839)
92 
93	* dwarf2out.c (print_die): Use '%ld' not '%lu' to print a 'long'.
94	(output_die): Use 'unsigned long' with %x.
95	* sched-vis.c (print_value): Use 'unsigned HOST_WIDE_INT' and
96	HOST_WIDE_INT_PRINT_HEX to print HOST_WIDE_INT.
97	* tree-dump.c (dump_pointer): Use 'unsigned long' for %lx.
98
992007-05-16  Eric Christopher  <echristo@apple.com> (r124763)
100
101       * config/rs6000/rs6000.c (rs6000_emit_prologue): Move altivec register
102        saving after stack push. Set sp_offset whenever we push.
103        (rs6000_emit_epilogue): Move altivec register restore before stack push.
104
1052007-05-03  Ian Lance Taylor  <iant@google.com> (r124381)
106
107	* config/rs6000/rs6000.c (rs6000_override_options): Don't set
108	MASK_PPC_GFXOPT for 8540 or 8548.
109
1102007-05-01  Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124341)
111
112	* doc/invoke.texi: Fix typo, 'AMD Family 10h core' instead of 
113	'AMD Family 10 core'.
114
1152007-05-01  Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124339)
116 
117	* config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3 
118	and athlon64-sse3 as improved versions of k8, opteron and athlon64 
119	with SSE3 instruction set support.
120	* doc/invoke.texi: Likewise.
121
1222007-05-01  Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124330)
123
124	* config/i386/i386.c (override_options): Tuning 32-byte loop
125	alignment for amdfam10 architecture. Increasing the max loop
126	alignment to 24 bytes.
127
1282007-04-16  Lawrence Crowl  <crowl@google.com> (r123909)
129
130	* doc/invoke.texi (Debugging Options): Add documentation for the
131	-femit-struct-debug options -femit-struct-debug-baseonly,
132	-femit-struct-debug-reduced, and
133	-femit-struct-debug-detailed[=...].
134
135	* c-opts.c (c_common_handle_option): Add
136	OPT_femit_struct_debug_baseonly, OPT_femit_struct_debug_reduced,
137	and OPT_femit_struct_debug_detailed_.
138	* c.opt: Add specifications for
139	-femit-struct-debug-baseonly, -femit-struct-debug-reduced,
140	and -femit-struct-debug-detailed[=...].
141	* opts.c (set_struct_debug_option): Parse the
142	-femit-struct-debug-... options.
143	* opts.c (matches_main_base, main_input_basename,
144	main_input_baselength, base_of_path, matches_main_base): Add
145	variables and functions to compare header base name to compilation
146	unit base name.
147	* opts.c (should_emit_struct_debug): Add to determine to emit a
148	structure based on the option.
149	(dump_struct_debug) Also disabled function to debug this
150	function.
151	* opts.c (handle_options): Save the base name of the
152	compilation unit.
153
154	* langhooks-def.h (LANG_HOOKS_GENERIC_TYPE_P): Define.
155        (LANG_HOOKS_FOR_TYPES_INITIALIZER): Add.
156	This hook indicates if a type is generic.  Set it by default
157	to "never generic".
158	* langhooks.h (struct lang_hooks_for_types): Add a new hook
159	to determine if a struct type is generic or not.
160	* cp/cp-tree.h (class_tmpl_impl_spec_p): Declare a C++ hook.
161	* cp/tree.c (class_tmpl_impl_spec_p): Implement the C++ hook.
162	* cp/cp-lang.c (LANG_HOOKS_GENERIC_TYPE_P): Override null C hook
163	with live C++ hook.
164
165	* flags.h (enum debug_info_usage): Add an enumeration to describe
166	a program's use of a structure type.
167	* dwarf2out.c (gen_struct_or_union_type_die): Add a new parameter
168	to indicate the program's usage of the type.  Filter structs based
169	on the -femit-struct-debug-... specification.
170	(gen_type_die): Split into two routines, gen_type_die and
171	gen_type_die_with_usage.  gen_type_die is now a wrapper
172	that assumes direct usage.
173	(gen_type_die_with_usage): Replace calls to gen_type_die
174	with gen_type_die_with_usage adding the program usage of
175	the referenced type.
176	(dwarf2out_imported_module_or_decl): Suppress struct debug
177	information using should_emit_struct_debug when appropriate.
178
1792007-04-16  Ian Lance Taylor  <iant@google.com> (r123906)
180
181	* tree-ssa-propagate.c (cfg_blocks_add): Insert blocks with fewer
182	predecessors at head rather than tail.
183
184
1852007-04-12  Richard Guenther  <rguenther@suse.de> (r123736)
186
187	PR tree-optimization/24689
188	PR tree-optimization/31307
189	* fold-const.c (operand_equal_p): Compare INTEGER_CST array
190	indices by value.
191	* gimplify.c (canonicalize_addr_expr): To be consistent with
192	gimplify_compound_lval only set operands two and three of
193	ARRAY_REFs if they are not gimple_min_invariant.  This makes
194	it never at this place.
195	* tree-ssa-ccp.c (maybe_fold_offset_to_array_ref): Likewise.
196
1972007-04-07  H.J. Lu  <hongjiu.lu@intel.com> (r123639)
198
199	* config/i386/i386.c (ix86_handle_option): Handle SSSE3.
200
2012007-03-28  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com> (r123313)
202
203	* config.gcc: Accept barcelona as a variant of amdfam10.
204	* config/i386/i386.c (override_options): Likewise.
205	* doc/invoke.texi: Likewise.
206
2072007-03-12  Seongbae Park <seongbae.park@gmail.com> (r122851)
208
209	* c-decl.c (warn_variable_length_array): New function.
210	Refactored from grokdeclarator to handle warn_vla
211	and handle unnamed array case.
212	(grokdeclarator): Refactored VLA warning case.
213	* c.opt (Wvla): New flag.
214
2152007-03-11  Ian Lance Taylor  <iant@google.com> (r122831 - partial)
216
217	* tree-vrp.c (vrp_int_const_binop): Handle PLUS_EXPR and
218	the *_DIV_EXPR codes correctly with overflow infinities.
219
2202007-02-09  Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r121763)
221
222	* config/i386/driver-i386.c: Turn on -mtune=native for AMDFAM10.
223	(bit_SSE4a): New.
224
2252007-02-08  Harsha Jagasia  <harsha.jagasia@amd.com> (r121726)
226
227	* config/i386/xmmintrin.h: Make inclusion of emmintrin.h
228	conditional to __SSE2__.
229	(Entries below should have been added to first ChangeLog
230	entry for amdfam10 dated 2007-02-05)
231	* config/i386/emmintrin.h: Generate #error if __SSE2__ is not
232	defined.
233	* config/i386/pmmintrin.h: Generate #error if __SSE3__ is not
234	defined.
235	* config/i386/tmmintrin.h: Generate #error if __SSSE3__ is not
236	defined.
237
2382007-02-07  Jakub Jelinek  <jakub@redhat.com> (r121687)
239
240	* config/i386/i386.c (override_options): Set PTA_SSSE3 for core2.
241
2422007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
243
244	* config/i386/athlon.md (athlon_fldxf_k8, athlon_fld_k8,
245	athlon_fstxf_k8, athlon_fst_k8, athlon_fist, athlon_fmov,
246	athlon_fadd_load, athlon_fadd_load_k8, athlon_fadd, athlon_fmul,
247	athlon_fmul_load, athlon_fmul_load_k8, athlon_fsgn,
248	athlon_fdiv_load, athlon_fdiv_load_k8, athlon_fdiv_k8,
249	athlon_fpspc_load, athlon_fpspc, athlon_fcmov_load,
250	athlon_fcmov_load_k8, athlon_fcmov_k8, athlon_fcomi_load_k8,
251	athlon_fcomi, athlon_fcom_load_k8, athlon_fcom): Added amdfam10.
252
2532007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
254
255	* config/i386/i386.md (x86_sahf_1, cmpfp_i_mixed, cmpfp_i_sse,
256	cmpfp_i_i387, cmpfp_iu_mixed, cmpfp_iu_sse, cmpfp_iu_387,
257	swapsi, swaphi_1, swapqi_1, swapdi_rex64, fix_truncsfdi_sse,
258	fix_truncdfdi_sse, fix_truncsfsi_sse, fix_truncdfsi_sse,
259	x86_fldcw_1, floatsisf2_mixed, floatsisf2_sse, floatdisf2_mixed,
260	floatdisf2_sse, floatsidf2_mixed, floatsidf2_sse,
261	floatdidf2_mixed, floatdidf2_sse, muldi3_1_rex64, mulsi3_1,
262	mulsi3_1_zext, mulhi3_1, mulqi3_1, umulqihi3_1, mulqihi3_insn,
263	umulditi3_insn, umulsidi3_insn, mulditi3_insn, mulsidi3_insn,
264	umuldi3_highpart_rex64, umulsi3_highpart_insn,
265	umulsi3_highpart_zext, smuldi3_highpart_rex64,
266	smulsi3_highpart_insn, smulsi3_highpart_zext, x86_64_shld,
267	x86_shld_1, x86_64_shrd, sqrtsf2_mixed, sqrtsf2_sse,
268	sqrtsf2_i387, sqrtdf2_mixed, sqrtdf2_sse, sqrtdf2_i387,
269	sqrtextendsfdf2_i387, sqrtxf2, sqrtextendsfxf2_i387,
270	sqrtextenddfxf2_i387): Added amdfam10_decode.
271	
272	* config/i386/athlon.md (athlon_idirect_amdfam10,
273	athlon_ivector_amdfam10, athlon_idirect_load_amdfam10,
274	athlon_ivector_load_amdfam10, athlon_idirect_both_amdfam10,
275	athlon_ivector_both_amdfam10, athlon_idirect_store_amdfam10,
276	athlon_ivector_store_amdfam10): New define_insn_reservation.
277	(athlon_idirect_loadmov, athlon_idirect_movstore): Added
278	amdfam10.
279
2802007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
281
282	* config/i386/athlon.md (athlon_call_amdfam10,
283	athlon_pop_amdfam10, athlon_lea_amdfam10): New
284	define_insn_reservation.
285	(athlon_branch, athlon_push, athlon_leave_k8, athlon_imul_k8,
286	athlon_imul_k8_DI, athlon_imul_mem_k8, athlon_imul_mem_k8_DI,
287	athlon_idiv, athlon_idiv_mem, athlon_str): Added amdfam10.
288
2892007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
290
291	* config/i386/athlon.md (athlon_sseld_amdfam10,
292	athlon_mmxld_amdfam10, athlon_ssest_amdfam10,
293	athlon_mmxssest_short_amdfam10): New define_insn_reservation.
294
2952007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
296
297	* config/i386/athlon.md (athlon_sseins_amdfam10): New
298	define_insn_reservation.
299	* config/i386/i386.md (sseins): Added sseins to define_attr type
300	and define_attr unit.
301	* config/i386/sse.md: Set type attribute to sseins for insertq
302	and insertqi.
303
3042007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
305
306	* config/i386/athlon.md (sselog_load_amdfam10, sselog_amdfam10,
307	ssecmpvector_load_amdfam10, ssecmpvector_amdfam10,
308	ssecomi_load_amdfam10, ssecomi_amdfam10,
309	sseaddvector_load_amdfam10, sseaddvector_amdfam10): New
310	define_insn_reservation.
311	(ssecmp_load_k8, ssecmp, sseadd_load_k8, seadd): Added amdfam10.
312
3132007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
314
315	* config/i386/athlon.md (cvtss2sd_load_amdfam10,
316	cvtss2sd_amdfam10, cvtps2pd_load_amdfam10, cvtps2pd_amdfam10,
317	cvtsi2sd_load_amdfam10, cvtsi2ss_load_amdfam10,
318	cvtsi2sd_amdfam10, cvtsi2ss_amdfam10, cvtsd2ss_load_amdfam10,
319	cvtsd2ss_amdfam10, cvtpd2ps_load_amdfam10, cvtpd2ps_amdfam10,
320	cvtsX2si_load_amdfam10, cvtsX2si_amdfam10): New 
321	define_insn_reservation.
322
323	* config/i386/sse.md (cvtsi2ss, cvtsi2ssq, cvtss2si,
324	cvtss2siq, cvttss2si, cvttss2siq, cvtsi2sd, cvtsi2sdq,
325	cvtsd2si, cvtsd2siq, cvttsd2si, cvttsd2siq,
326	cvtpd2dq, cvttpd2dq, cvtsd2ss, cvtss2sd,
327	cvtpd2ps, cvtps2pd): Added amdfam10_decode attribute.
328
3292007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
330
331	* config/i386/athlon.md (athlon_ssedivvector_amdfam10,
332	athlon_ssedivvector_load_amdfam10, athlon_ssemulvector_amdfam10,
333	athlon_ssemulvector_load_amdfam10): New define_insn_reservation.
334	(athlon_ssediv, athlon_ssediv_load_k8, athlon_ssemul,
335	athlon_ssemul_load_k8): Added amdfam10.
336
3372007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
338
339	* config/i386/i386.h (TARGET_SSE_UNALIGNED_MOVE_OPTIMAL): New macro.
340	(x86_sse_unaligned_move_optimal): New variable.
341	
342	* config/i386/i386.c (x86_sse_unaligned_move_optimal): Enable for  
343	m_AMDFAM10.
344	(ix86_expand_vector_move_misalign): Add code to generate movupd/movups
345	for unaligned vector SSE double/single precision loads for AMDFAM10.
346
3472007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
348
349	* config/i386/i386.h (TARGET_AMDFAM10): New macro.
350	(TARGET_CPU_CPP_BUILTINS): Add code for amdfam10.
351	Define TARGET_CPU_DEFAULT_amdfam10.
352	(TARGET_CPU_DEFAULT_NAMES): Add amdfam10.
353	(processor_type): Add PROCESSOR_AMDFAM10.	
354	
355	* config/i386/i386.md: Add amdfam10 as a new cpu attribute to match
356	processor_type in config/i386/i386.h.
357	Enable imul peepholes for TARGET_AMDFAM10.
358	
359	* config.gcc: Add support for --with-cpu option for amdfam10.
360	
361	* config/i386/i386.c (amdfam10_cost): New variable.
362	(m_AMDFAM10): New macro.
363	(m_ATHLON_K8_AMDFAM10): New macro.
364	(x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen,
365	x86_cmove, x86_3dnow_a, x86_deep_branch, x86_use_simode_fiop,
366	x86_promote_QImode, x86_integer_DFmode_moves,
367	x86_partial_reg_dependency, x86_memory_mismatch_stall, 
368	x86_accumulate_outgoing_args, x86_arch_always_fancy_math_387,
369	x86_sse_partial_reg_dependency, x86_sse_typeless_stores,
370	x86_use_ffreep, x86_use_incdec, x86_four_jump_limit,
371	x86_schedule, x86_use_bt, x86_cmpxchg16b, x86_pad_returns):
372	Enable/disable for amdfam10.
373	(override_options): Add amdfam10_cost to processor_target_table.
374	Set up PROCESSOR_AMDFAM10 for amdfam10 entry in 
375	processor_alias_table.
376	(ix86_issue_rate): Add PROCESSOR_AMDFAM10.
377	(ix86_adjust_cost): Add code for amdfam10.
378
3792007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
380	
381	* config/i386/i386.opt: Add new Advanced Bit Manipulation (-mabm)
382	instruction set feature flag. Add new (-mpopcnt) flag for popcnt 
383	instruction. Add new SSE4A (-msse4a) instruction set feature flag.
384	* config/i386/i386.h: Add builtin definition for SSE4A.
385	* config/i386/i386.md: Add support for ABM instructions 
386	(popcnt and lzcnt).
387	* config/i386/sse.md: Add support for SSE4A instructions
388	(movntss, movntsd, extrq, insertq).
389	* config/i386/i386.c: Add support for ABM and SSE4A builtins.
390	Add -march=amdfam10 flag.
391	* config/i386/ammintrin.h: Add support for SSE4A intrinsics.
392	* doc/invoke.texi: Add documentation on flags for sse4a, abm, popcnt
393	and amdfam10.
394	* doc/extend.texi: Add documentation for SSE4A builtins.
395
3962007-01-24  Jakub Jelinek  <jakub@redhat.com> (r121140)
397
398	* config/i386/i386.h (x86_cmpxchg16b): Remove const.
399	(TARGET_CMPXCHG16B): Define to x86_cmpxchg16b.
400	* config/i386/i386.c (x86_cmpxchg16b): Remove const.
401	(override_options): Add PTA_CX16 flag.  Set x86_cmpxchg16b
402	for CPUs that have PTA_CX16 set.
403
4042007-01-17  Eric Christopher  <echristo@apple.com> (r120846)
405
406	* config.gcc: Support core2 processor.
407
4082007-01-08  Geoffrey Keating  <geoffk@apple.com> (r120611)
409
410	* target.h (struct gcc_target): New field library_rtti_comdat.
411	* target-def.h (TARGET_CXX_LIBRARY_RTTI_COMDAT): New.
412	(TARGET_CXX): Add TARGET_CXX_LIBRARY_RTTI_COMDAT.
413	* doc/tm.texi (C++ ABI): Document TARGET_CXX_LIBRARY_RTTI_COMDAT.
414	* config/darwin.h (TARGET_CXX_LIBRARY_RTTI_COMDAT): Define.
415
4162007-01-05  Manuel Lopez-Ibanez  <manu@gcc.gnu.org> (r120505)
417
418	PR c/19978
419	* tree.h (TREE_OVERFLOW_P): New.
420	* c-typeck.c (parser_build_unary_op): Warn only if result
421	overflowed and operands did not.
422	(parser_build_binary_op): Likewise.
423	(convert_for_assignment): Remove redundant overflow_warning.
424	* c-common.c (overflow_warning): Don't check or set TREE_OVERFLOW.
425
4262006-12-13  Ian Lance Taylor  <iant@google.com> (r119855)
427
428	PR c++/19564
429	PR c++/19756
430	* c-typeck.c (parser_build_binary_op): Move parentheses warnings
431	to warn_about_parentheses in c-common.c.
432	* c-common.c (warn_about_parentheses): New function.
433	* c-common.h (warn_about_parentheses): Declare.
434	* doc/invoke.texi (Warning Options): Update -Wparentheses
435	description.
436
4372006-12-12  Geoffrey Keating  <geoffk@apple.com> (r119820)
438 
439	* mips-tdump.c: Replace CROSS_COMPILE with
440	CROSS_DIRECTORY_STRUCTURE.
441	* mips-tfile.c: Likewise.
442	* gcc.c: Likewise.
443	* configure.ac: Likewise.
444	* cppdefault.c: Likewise.
445	* Makefile.in: Likewise.
446	* config/alpha/osf.h: Likewise.
447	* config/i386/cygwin.h: Likewise.
448	* config/i386/beos-elf.h: Likewise.
449	* config/i386/nto.h: Likewise.
450	* config/svr4.h: Likewise.
451	* config/rs6000/aix.h: Likewise.
452	* config/rs6000/sysv4.h: Likewise.
453	* collect2.c: Likewise.
454	* configure: Regenerate.
455
456 	* doc/tm.texi (Alignment Output): Document that ASM_OUTPUT_SKIP
457 	actually takes an unsigned HOST_WIDE_INT for its second parameter.
458
4592006-12-02  H.J. Lu  <hongjiu.lu@intel.com> (r119454 - partial)
460
461	PR target/30040
462	* config/i386/driver-i386.c (bit_SSSE3): New.
463
4642006-11-27  Uros Bizjak  <ubizjak@gmail.com> (r119260)
465
466	* config/i386/i386.c (x86_ext_80387_constants): Add m_K8, m_CORE2
467	and m_GENERIC64.
468
4692006-11-18  Vladimir Makarov  <vmakarov@redhat.com> (r118973)
470
471	* doc/invoke.texi (core2): Add item.
472
473	* config/i386/i386.h (TARGET_CORE2, TARGET_CPU_DEFAULT_core2): New
474	macros.
475	(TARGET_CPU_CPP_BUILTINS): Add code for core2.
476	(TARGET_CPU_DEFAULT_generic): Change value.
477	(TARGET_CPU_DEFAULT_NAMES): Add core2.
478	(processor_type): Add new constant PROCESSOR_CORE2.
479
480	* config/i386/i386.md (cpu): Add core2.
481
482	* config/i386/i386.c (core2_cost): New initialized variable.
483	(m_CORE2): New macro.
484	(x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen,
485	x86_deep_branch, x86_partial_reg_stall, x86_use_simode_fiop,
486	x86_use_cltd, x86_promote_QImode, x86_sub_esp_4, x86_sub_esp_8,
487	x86_add_esp_4, x86_add_esp_8, x86_integer_DFmode_moves,
488	x86_partial_reg_dependency, x86_memory_mismatch_stall,
489	x86_accumulate_outgoing_args, x86_prologue_using_move,
490	x86_epilogue_using_move, x86_arch_always_fancy_math_387,
491	x86_sse_partial_reg_dependency, x86_rep_movl_optimal,
492	x86_use_incdec, x86_four_jump_limit, x86_schedule,
493	x86_pad_returns): Add m_CORE2.
494	(override_options): Add entries for Core2.
495	(ix86_issue_rate): Add case for Core2.
496	
4972006-11-07  Eric Christopher  <echristo@apple.com> (r118576)
498
499	* libgcc2.c (__bswapdi2): Rename from bswapDI2.
500	(__bswapsi2): Ditto.
501	* libgcc2.h: Remove transformation of bswap routines.
502	* config/i386/i386.md (bswapsi2): New.
503	(bswapdi2): Ditto.
504
5052006-10-31  Geoffrey Keating  <geoffk@apple.com> (r118360)
506 
507	* coverage.c (coverage_checksum_string): Update comment.
508	* dwarf2out.c (switch_to_eh_frame_section): Update for removal
509	of get_file_function_name.
510	* cgraphunit.c (cgraph_build_static_cdtor): Update for rename
511	of get_file_function_name_long.
512	* tree.c (get_file_function_name): Rename from
513	get_file_function_name_long; improve comment; handle 'I' and 'D'
514	specially when the target has ctor/dtor support; remove special
515	handling for 'F'.
516	(get_file_function_name): Remove.
517	* tree.h (get_file_function_name): Rename from
518        get_file_function_name_long.
519	(get_file_function_name): Remove prototype.
520
5212006-10-31  Geoffrey Keating  <geoffk@apple.com> (r118356)
522
523	* c-decl.c (grokdeclarator): Don't set DECL_EXTERNAL on
524	inline static functions in c99 mode.
525
526	PR 16622
527	* doc/extend.texi (Inline): Update.
528	* c-tree.h (struct language_function): Remove field 'extern_inline'.
529	* c-decl.c (current_extern_inline): Delete.
530	(pop_scope): Adjust test for an undefined nested function.
531	Add warning about undeclared inline function.
532	(diagnose_mismatched_decls): Update comments.  Disallow overriding
533	of inline functions in a translation unit in C99.  Allow inline
534	declarations in C99 at any time.
535	(merge_decls): Boolize variables.  Handle C99 'extern inline'
536	semantics.
537	(grokdeclarator): Set DECL_EXTERNAL here for functions.  Handle
538	C99 inline semantics.
539	(start_function): Don't clear current_extern_inline.  Don't set
540	DECL_EXTERNAL.
541	(c_push_function_context): Don't push current_extern_inline.
542	(c_pop_function_context): Don't restore current_extern_inline.
543
544	PR 11377
545	* c-typeck.c (build_external_ref): Warn about static variables
546	used in extern inline functions.
547	* c-decl.c (start_decl): Warn about static variables declared
548	in extern inline functions.
549
5502006-10-27  Vladimir Makarov  <vmakarov@redhat.com> (r118090)
551
552	* config/i386/i386.h (TARGET_GEODE):
553	(TARGET_CPU_CPP_BUILTINS): Add code for geode.
554	(TARGET_CPU_DEFAULT_geode): New macro.
555	(TARGET_CPU_DEFAULT_k6, TARGET_CPU_DEFAULT_k6_2,
556	TARGET_CPU_DEFAULT_k6_3, TARGET_CPU_DEFAULT_athlon,
557	TARGET_CPU_DEFAULT_athlon_sse, TARGET_CPU_DEFAULT_k8,
558	TARGET_CPU_DEFAULT_pentium_m, TARGET_CPU_DEFAULT_prescott,
559	TARGET_CPU_DEFAULT_nocona, TARGET_CPU_DEFAULT_generic): Increase
560	the macro values.
561	(TARGET_CPU_DEFAULT_NAMES): Add geode.
562	(processor_type): Add PROCESSOR_GEODE.
563
564	* config/i386/i386.md: Include geode.md.
565	(cpu): Add geode.
566
567	* config/i386/i386.c (geode_cost): New initialized global
568	variable.
569	(m_GEODE, m_K6_GEODE): New macros.
570	(x86_use_leave, x86_push_memory, x86_deep_branch, x86_use_sahf,
571	x86_use_himode_fiop, x86_promote_QImode, x86_add_esp_4,
572	x86_add_esp_8, x86_rep_movl_optimal, x86_ext_80387_constants,
573	x86_schedule): Use m_K6_GEODE instead of m_K6.
574	(x86_movx, x86_cmove): Set up m_GEODE.
575	(x86_integer_DFmode_moves): Clear m_GEODE.
576	(processor_target_table): Add entry for geode.
577	(processor_alias_table): Ditto.
578
579	* config/i386/geode.md: New file.
580
581	* doc/invoke.texi: Add entry about geode processor.
582    
5832006-10-24  Richard Guenther  <rguenther@suse.de> (r118001)
584
585	PR middle-end/28796
586	* builtins.c (fold_builtin_classify): Use HONOR_INFINITIES
587	and HONOR_NANS instead of MODE_HAS_INFINITIES and MODE_HAS_NANS
588	for deciding optimizations in consistency with fold-const.c
589	(fold_builtin_unordered_cmp): Likewise.
590
5912006-10-22  H.J. Lu  <hongjiu.lu@intel.com> (r117958)
592
593	* config.gcc (i[34567]86-*-*): Add tmmintrin.h to extra_headers.
594	(x86_64-*-*): Likewise.
595
596	* config/i386/i386.c (pta_flags): Add PTA_SSSE3.
597	(override_options): Check SSSE3.
598	(ix86_builtins): Add IX86_BUILTIN_PHADDW, IX86_BUILTIN_PHADDD,
599	IX86_BUILTIN_PHADDSW, IX86_BUILTIN_PHSUBW, IX86_BUILTIN_PHSUBD,
600	IX86_BUILTIN_PHSUBSW, IX86_BUILTIN_PMADDUBSW,
601	IX86_BUILTIN_PMULHRSW, IX86_BUILTIN_PSHUFB,
602	IX86_BUILTIN_PSIGNB, IX86_BUILTIN_PSIGNW, IX86_BUILTIN_PSIGND,
603	IX86_BUILTIN_PALIGNR, IX86_BUILTIN_PABSB, IX86_BUILTIN_PABSW,
604	IX86_BUILTIN_PABSD, IX86_BUILTIN_PHADDW128,
605	IX86_BUILTIN_PHADDD128, IX86_BUILTIN_PHADDSW128,
606	IX86_BUILTIN_PHSUBW128, IX86_BUILTIN_PHSUBD128,
607	IX86_BUILTIN_PHSUBSW128, IX86_BUILTIN_PMADDUBSW128,
608	IX86_BUILTIN_PMULHRSW128, IX86_BUILTIN_PSHUFB128,
609	IX86_BUILTIN_PSIGNB128, IX86_BUILTIN_PSIGNW128,
610	IX86_BUILTIN_PSIGND128, IX86_BUILTIN_PALIGNR128,
611	IX86_BUILTIN_PABSB128, IX86_BUILTIN_PABSW128 and
612	IX86_BUILTIN_PABSD128.
613	(bdesc_2arg): Add SSSE3.
614	(bdesc_1arg): Likewise.
615	(ix86_init_mmx_sse_builtins): Support SSSE3.
616	(ix86_expand_builtin): Likewise.
617	* config/i386/i386.h (TARGET_CPU_CPP_BUILTINS): Likewise.
618
619	* config/i386/i386.md (UNSPEC_PSHUFB): New.
620	(UNSPEC_PSIGN): Likewise.
621	(UNSPEC_PALIGNR): Likewise.
622	Include mmx.md before sse.md.
623
624	* config/i386/i386.opt: Add -mssse3.
625
626	* config/i386/sse.md (ssse3_phaddwv8hi3): New pattern for SSSE3.
627	(ssse3_phaddwv4hi3): Likewise.
628	(ssse3_phadddv4si3): Likewise.
629	(ssse3_phadddv2si3): Likewise.
630	(ssse3_phaddswv8hi3): Likewise.
631	(ssse3_phaddswv4hi3): Likewise.
632	(ssse3_phsubwv8hi3): Likewise.
633	(ssse3_phsubwv4hi3): Likewise.
634	(ssse3_phsubdv4si3): Likewise.
635	(ssse3_phsubdv2si3): Likewise.
636	(ssse3_phsubswv8hi3): Likewise.
637	(ssse3_phsubswv4hi3): Likewise.
638	(ssse3_pmaddubswv8hi3): Likewise.
639	(ssse3_pmaddubswv4hi3): Likewise.
640	(ssse3_pmulhrswv8hi3): Likewise.
641	(ssse3_pmulhrswv4hi3): Likewise.
642	(ssse3_pshufbv16qi3): Likewise.
643	(ssse3_pshufbv8qi3): Likewise.
644	(ssse3_psign<mode>3): Likewise.
645	(ssse3_psign<mode>3): Likewise.
646	(ssse3_palignrti): Likewise.
647	(ssse3_palignrdi): Likewise.
648	(abs<mode>2): Likewise.
649	(abs<mode>2): Likewise.
650
651	* config/i386/tmmintrin.h: New file.
652
653	* doc/extend.texi: Document SSSE3 built-in functions.
654
655	* doc/invoke.texi: Document -mssse3/-mno-ssse3 switches.
656
6572006-10-22  H.J. Lu  <hongjiu.lu@intel.com> (r117959)
658  	 
659	* config/i386/tmmintrin.h: Remove the duplicated content.
660
6612006-10-21  Richard Guenther  <rguenther@suse.de> (r117932)
662
663	PR tree-optimization/3511
664	* tree-ssa-pre.c (phi_translate): Fold CALL_EXPRs that
665	got new invariant arguments during PHI translation.
666
6672006-10-21  Richard Guenther  <rguenther@suse.de> (r117929)
668
669	* builtins.c (fold_builtin_classify): Fix typo.
670
6712006-09-07  Eric Christopher  <echristo@apple.com> (r118361)
672	    Falk Hueffner  <falk@debian.org>
673
674	* doc/extend.texi (__builtin_bswap32): Document.
675	(__builtin_bswap64): Ditto.
676	* doc/libgcc.texi (bswapsi2): Document.
677	(bswapdi2): Ditto.
678	* doc/rtl.texi (bswap): Document.
679	* optabs.c (expand_unop): Don't widen a bswap.
680	(init_optabs): Init bswap. Set libfuncs explicitly
681	for bswapsi2 and bswapdi2.
682	* optabs.h (OTI_bswap): New.
683	(bswap_optab): Ditto.
684	* genopinit.c (optabs): Handle bswap_optab.
685	* tree.h (tree_index): Add TI_UINT32_TYPE and
686	TI_UINT64_TYPE.
687	(uint32_type_node): New.
688	(uint64_type_node): Ditto.
689	* tree.c (build_common_tree_nodes_2): Initialize
690	uint32_type_node and uint64_type_node.
691	* builtins.c (expand_builtin_bswap): New.
692	(expand_builtin): Call.
693	(fold_builtin_bswap): New.
694	(fold_builtin_1): Call.
695	* fold-const.c (tree_expr_nonnegative_p): Return true
696	for bswap.
697	* builtin-types.def (BT_UINT32): New.
698	(BT_UINT64): Ditto.
699	(BT_FN_UINT32_UINT32): Ditto.
700	(BT_FN_UINT64_UINT64): Ditto.
701	* builtins.def (BUILT_IN_BSWAP32): New.
702	(BUILT_IN_BSWAP64): Ditto.
703	* rtl.def (BSWAP): New.
704	* genattrtab.c (check_attr_value): New.
705	* libgcc2.c (__bswapSI2): New.
706	(__bswapDI2): Ditto.
707	* libgcc2.h (__bswapSI2): Declare.
708	(__bswapDI2): Ditto.
709	* mklibgcc.in (lib2funcs): Add _bswapsi2 and _bswapdi2.
710	* simplify-rtx.c (simplify_const_unary_operation): Return
711	0 for BSWAP.
712	* libgcc-std.ver (__bwapsi2): Add.
713	(__bswapdi2): Ditto.
714	* reload1.c (eliminate_regs_1): Add bswap.
715	(elimination_effects): Ditto.
716	* config/i386/i386.h (x86_bswap): New.
717	(TARGET_BSWAP): Use.
718	* config/i386/i386.c (x86_bswap): Set.
719