1/* ********************************************************************* 2 * Broadcom Common Firmware Environment (CFE) 3 * 4 * API entry module File: zipstart_entry.S 5 * 6 * Low-level API entry point routines and some other misc stuff. 7 * 8 * Author: Mitch Lichtenberg (mpl@broadcom.com) 9 * 10 ********************************************************************* 11 * 12 * Copyright 2000,2001,2002,2003 13 * Broadcom Corporation. All rights reserved. 14 * 15 * This software is furnished under license and may be used and 16 * copied only in accordance with the following terms and 17 * conditions. Subject to these conditions, you may download, 18 * copy, install, use, modify and distribute modified or unmodified 19 * copies of this software in source and/or binary form. No title 20 * or ownership is transferred hereby. 21 * 22 * 1) Any source code used, modified or distributed must reproduce 23 * and retain this copyright notice and list of conditions 24 * as they appear in the source file. 25 * 26 * 2) No right is granted to use any trade name, trademark, or 27 * logo of Broadcom Corporation. The "Broadcom Corporation" 28 * name may not be used to endorse or promote products derived 29 * from this software without the prior written permission of 30 * Broadcom Corporation. 31 * 32 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR 33 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED 34 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 35 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 36 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 37 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, 38 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 39 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 40 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 41 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 42 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 43 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 44 * THE POSSIBILITY OF SUCH DAMAGE. 45 ********************************************************************* */ 46 47 48#include "sbmips.h" 49#include "exception.h" 50 51#include "bsp_config.h" 52#include "cpu_config.h" 53 54#ifdef _CFE_ 55#include "cfe_devfuncs.h" 56#else 57 58#if (CFG_BIENDIAN) && defined(__MIPSEB) 59#define CFE_EPTSEAL_REV 0x31454643 60#endif 61#define CFE_EPTSEAL 0x43464531 62 63#define cfe_command_restart 0 64#endif 65 66#ifndef CFG_STACK_SIZE 67#error "CFG_STACK_SIZE not defined" 68#else 69#define STACK_SIZE ((CFG_STACK_SIZE+1023) & ~1023) 70#endif 71 72#include "segtable.h" 73 74 75/* ********************************************************************* 76 * Macros 77 ********************************************************************* */ 78 79#include "mipsmacros.h" 80 81 82#if CPUCFG_REGS32 83#define LREG lw 84#define SREG sw 85#define SRL srl 86#define SLL sll 87#else 88#define LREG ld 89#define SREG sd 90#define SRL dsrl 91#define SLL dsll 92#endif 93 94 95#include "exception.h" 96 97 98 99/* ********************************************************************* 100 * _exc_entry(k0) 101 * 102 * Main exception entry point. 103 * 104 * Input parameters: 105 * k0 - exception type 106 * 107 * Return value: 108 * ... 109 ********************************************************************* */ 110 111LEAF(_exc_entry) 112 113 .set noreorder 114 .set noat 115 116 subu k1,sp,EXCEPTION_SIZE 117 SRL k1,3 118 SLL k1,3 119 120 SREG zero,XGR_ZERO(k1) 121 SREG AT,XGR_AT(k1) 122 123 SREG v0,XGR_V0(k1) 124 SREG v1,XGR_V1(k1) 125 126 SREG a0,XGR_A0(k1) 127 SREG a1,XGR_A1(k1) 128 SREG a2,XGR_A2(k1) 129 SREG a3,XGR_A3(k1) 130 131 SREG t0,XGR_T0(k1) 132 SREG t1,XGR_T1(k1) 133 SREG t2,XGR_T2(k1) 134 SREG t3,XGR_T3(k1) 135 SREG t4,XGR_T4(k1) 136 SREG t5,XGR_T5(k1) 137 SREG t6,XGR_T6(k1) 138 SREG t7,XGR_T7(k1) 139 140 SREG s0,XGR_S0(k1) 141 SREG s1,XGR_S1(k1) 142 SREG s2,XGR_S2(k1) 143 SREG s3,XGR_S3(k1) 144 SREG s4,XGR_S4(k1) 145 SREG s5,XGR_S5(k1) 146 SREG s6,XGR_S6(k1) 147 SREG s7,XGR_S7(k1) 148 149 SREG t8,XGR_T8(k1) 150 SREG t9,XGR_T9(k1) 151 152 SREG gp,XGR_GP(k1) 153 SREG sp,XGR_SP(k1) 154 SREG fp,XGR_FP(k1) 155 SREG ra,XGR_RA(k1) 156 157 mfc0 t0,C0_CAUSE 158 mfc0 t1,C0_SR 159 MFC0 t2,C0_BADVADDR 160 MFC0 t3,C0_EPC 161 mfc0 t4,C0_PRID 162 mflo t5 163 mfhi t6 164 SREG t0,XCP0_CAUSE(k1) 165 SREG t1,XCP0_SR(k1) 166 SREG t2,XCP0_VADDR(k1) 167 SREG t3,XCP0_EPC(k1) 168 SREG t4,XCP0_PRID(k1) 169 SREG t5,XGR_LO(k1) 170 SREG t6,XGR_HI(k1) 171 172 la gp,_gp # Load up GP, not relocated so it's easy 173 174 move a0,k0 # Pass exception type 175 move a1,k1 # Pass frame to exception handler 176 move sp,k1 # "C" gets fresh stack area 177 178 jal zs_exception 179 nop 180 181 move k1, sp 182 LREG AT,XGR_AT(k1) 183 184 LREG t0,XGR_LO(k1) 185 LREG t1,XGR_HI(k1) 186 mtlo t0 187 mthi t1 188 189 LREG a0,XGR_A0(k1) 190 LREG a1,XGR_A1(k1) 191 LREG a2,XGR_A2(k1) 192 LREG a3,XGR_A3(k1) 193 194 LREG t0,XGR_T0(k1) 195 LREG t1,XGR_T1(k1) 196 LREG t2,XGR_T2(k1) 197 LREG t3,XGR_T3(k1) 198 LREG t4,XGR_T4(k1) 199 LREG t5,XGR_T5(k1) 200 LREG t6,XGR_T6(k1) 201 LREG t7,XGR_T7(k1) 202 203 LREG s0,XGR_S0(k1) 204 LREG s1,XGR_S1(k1) 205 LREG s2,XGR_S2(k1) 206 LREG s3,XGR_S3(k1) 207 LREG s4,XGR_S4(k1) 208 LREG s5,XGR_S5(k1) 209 LREG s6,XGR_S6(k1) 210 LREG s7,XGR_S7(k1) 211 212 LREG t8,XGR_T8(k1) 213 LREG t9,XGR_T9(k1) 214 215 LREG gp,XGR_GP(k1) 216 LREG sp,XGR_SP(k1) 217 LREG fp,XGR_FP(k1) 218 LREG ra,XGR_RA(k1) 219 220/* do any CP0 cleanup here */ 221 222 LREG v0,XGR_V0(k1) 223 LREG v1,XGR_V1(k1) 224 225 ERET 226 227 .set at 228 .set reorder 229 230 231END(_exc_entry) 232 233 234 235/* ********************************************************************* 236 * End 237 ********************************************************************* */ 238