1/*
2 * Dump R4x00 TLB for debugging purposes.
3 *
4 * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
5 * Copyright (C) 1999 by Silicon Graphics, Inc.
6 */
7#include <linux/config.h>
8#include <linux/kernel.h>
9#include <linux/mm.h>
10#include <linux/sched.h>
11#include <linux/string.h>
12
13#include <asm/bootinfo.h>
14#include <asm/cpu.h>
15#include <asm/cachectl.h>
16#include <asm/mipsregs.h>
17#include <asm/page.h>
18#include <asm/pgtable.h>
19
20static inline const char *msg2str(unsigned int mask)
21{
22	switch (mask) {
23	case PM_4K:	return "4kb";
24	case PM_16K:	return "16kb";
25	case PM_64K:	return "64kb";
26	case PM_256K:	return "256kb";
27#ifndef CONFIG_CPU_VR41XX
28	case PM_1M:	return "1Mb";
29	case PM_4M:	return "4Mb";
30	case PM_16M:	return "16Mb";
31	case PM_64M:	return "64Mb";
32	case PM_256M:	return "256Mb";
33#endif
34	}
35}
36
37void dump_tlb(int first, int last)
38{
39	int	i;
40	unsigned int pagemask, c0, c1, asid;
41	unsigned long long entrylo0, entrylo1;
42	unsigned long entryhi;
43
44	asid = read_c0_entryhi() & 0xff;
45
46	printk("\n");
47	for(i=first;i<=last;i++) {
48		write_c0_index(i);
49		__asm__ __volatile__(
50			".set\tmips3\n\t"
51			".set\tnoreorder\n\t"
52			"nop;nop;nop;nop\n\t"
53			"tlbr\n\t"
54			"nop;nop;nop;nop\n\t"
55			".set\treorder\n\t"
56			".set\tmips0\n\t");
57		pagemask = read_c0_pagemask();
58		entryhi  = read_c0_entryhi();
59		entrylo0 = read_c0_entrylo0();
60		entrylo1 = read_c0_entrylo1();
61
62		/* Unused entries have a virtual address in KSEG0.  */
63		if ((entryhi & 0xf0000000) != 0x80000000
64		    && (entryhi & 0xff) == asid) {
65			/*
66			 * Only print entries in use
67			 */
68			printk("Index: %2d pgmask=%s ", i, msg2str(pagemask));
69
70			c0 = (entrylo0 >> 3) & 7;
71			c1 = (entrylo1 >> 3) & 7;
72
73			printk("va=%08lx asid=%02lx\n",
74			       (entryhi & 0xffffe000), (entryhi & 0xff));
75			printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n",
76			       (entrylo0 << 6) & PAGE_MASK, c0,
77			       (entrylo0 & 4) ? 1 : 0,
78			       (entrylo0 & 2) ? 1 : 0,
79			       (entrylo0 & 1));
80			printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n",
81			       (entrylo1 << 6) & PAGE_MASK, c1,
82			       (entrylo1 & 4) ? 1 : 0,
83			       (entrylo1 & 2) ? 1 : 0,
84			       (entrylo1 & 1));
85			printk("\n");
86		}
87	}
88
89	write_c0_entryhi(asid);
90}
91
92void dump_tlb_all(void)
93{
94	dump_tlb(0, mips_cpu.tlbsize - 1);
95}
96
97void dump_tlb_wired(void)
98{
99	int	wired;
100
101	wired = read_c0_wired();
102	printk("Wired: %d", wired);
103	dump_tlb(0, read_c0_wired());
104}
105
106#define BARRIER						\
107	__asm__ __volatile__(				\
108		".set\tnoreorder\n\t"			\
109		"nop;nop;nop;nop;nop;nop;nop\n\t"	\
110		".set\treorder");
111
112void
113dump_tlb_addr(unsigned long addr)
114{
115	unsigned int flags, oldpid;
116	int index;
117
118	__save_and_cli(flags);
119	oldpid = read_c0_entryhi() & 0xff;
120	BARRIER;
121	write_c0_entryhi((addr & PAGE_MASK) | oldpid);
122	BARRIER;
123	tlb_probe();
124	BARRIER;
125	index = read_c0_index();
126	write_c0_entryhi(oldpid);
127	__restore_flags(flags);
128
129	if (index < 0) {
130		printk("No entry for address 0x%08lx in TLB\n", addr);
131		return;
132	}
133
134	printk("Entry %d maps address 0x%08lx\n", index, addr);
135	dump_tlb(index, index);
136}
137
138void
139dump_tlb_nonwired(void)
140{
141	dump_tlb(read_c0_wired(), mips_cpu.tlbsize - 1);
142}
143
144void
145dump_list_process(struct task_struct *t, void *address)
146{
147	pgd_t	*page_dir, *pgd;
148	pmd_t	*pmd;
149	pte_t	*pte, page;
150	unsigned int addr;
151	unsigned long val;
152
153	addr = (unsigned int) address;
154
155	printk("Addr                 == %08x\n", addr);
156	printk("task                 == %08p\n", t);
157	printk("task->mm             == %08p\n", t->mm);
158	//printk("tasks->mm.pgd        == %08x\n", (unsigned int) t->mm->pgd);
159
160	if (addr > KSEG0)
161		page_dir = pgd_offset_k(0);
162	else
163		page_dir = pgd_offset(t->mm, 0);
164	printk("page_dir == %08x\n", (unsigned int) page_dir);
165
166	if (addr > KSEG0)
167		pgd = pgd_offset_k(addr);
168	else
169		pgd = pgd_offset(t->mm, addr);
170	printk("pgd == %08x, ", (unsigned int) pgd);
171
172	pmd = pmd_offset(pgd, addr);
173	printk("pmd == %08x, ", (unsigned int) pmd);
174
175	pte = pte_offset(pmd, addr);
176	printk("pte == %08x, ", (unsigned int) pte);
177
178	page = *pte;
179#ifdef CONFIG_64BIT_PHYS_ADDR
180	printk("page == %08Lx\n", pte_val(page));
181#else
182	printk("page == %08lx\n", pte_val(page));
183#endif
184
185	val = pte_val(page);
186	if (val & _PAGE_PRESENT) printk("present ");
187	if (val & _PAGE_READ) printk("read ");
188	if (val & _PAGE_WRITE) printk("write ");
189	if (val & _PAGE_ACCESSED) printk("accessed ");
190	if (val & _PAGE_MODIFIED) printk("modified ");
191	if (val & _PAGE_R4KBUG) printk("r4kbug ");
192	if (val & _PAGE_GLOBAL) printk("global ");
193	if (val & _PAGE_VALID) printk("valid ");
194	printk("\n");
195}
196
197void
198dump_list_current(void *address)
199{
200	dump_list_process(current, address);
201}
202
203unsigned int
204vtop(void *address)
205{
206	pgd_t	*pgd;
207	pmd_t	*pmd;
208	pte_t	*pte;
209	unsigned int addr, paddr;
210
211	addr = (unsigned long) address;
212	pgd = pgd_offset(current->mm, addr);
213	pmd = pmd_offset(pgd, addr);
214	pte = pte_offset(pmd, addr);
215	paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
216	paddr |= (addr & ~PAGE_MASK);
217
218	return paddr;
219}
220
221void
222dump16(unsigned long *p)
223{
224	int i;
225
226	for(i=0;i<8;i++)
227	{
228		printk("*%8p = %08lx, ", p, *p); p++;
229		printk("*%8p = %08lx\n", p, *p); p++;
230	}
231}
232