Searched refs:vuint32 (Results 1 - 25 of 56) sorted by path

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/haiku/headers/private/graphics/matrox/
H A Dmga_macros.h309 #define MGA_REG32(r_) ((vuint32 *)regs)[(r_) >> 2]
/haiku/headers/private/graphics/neomagic/
H A Dnm_macros.h304 #define NM_REG32(r_) ((vuint32 *)regs)[(r_) >> 2]
308 #define NM_2REG32(r_) ((vuint32 *)regs2)[(r_) >> 2]
/haiku/headers/private/graphics/radeon/
H A Dmmio.h18 #define INREG( regs, addr ) (*((vuint32 *)(regs + (addr))))
20 #define OUTREG( regs, addr, val ) do { *(vuint32 *)(regs + (addr)) = (val); } while( 0 )
/haiku/headers/private/graphics/skeleton/
H A Dmacros.h743 #define ENG_RG32(r_) ((vuint32 *)regs)[(r_) >> 2]
/haiku/headers/private/graphics/via/
H A Dmacros.h806 #define ENG_REG32(r_) ((vuint32 *)regs)[(r_) >> 2]
/haiku/src/add-ons/accelerants/3dfx/
H A Daccelerant.h179 #define INREG32(addr) *((vuint32*)(gInfo.regs + addr))
183 #define OUTREG32(addr, val) *((vuint32*)(gInfo.regs + addr)) = val
/haiku/src/add-ons/accelerants/ati/
H A Daccelerant.h238 #define INREG(addr) *((vuint32*)(gInfo.regs + addr))
242 #define OUTREG(addr, val) *((vuint32*)(gInfo.regs + addr)) = val
/haiku/src/add-ons/accelerants/et6x00/
H A DAcceleration.c142 *((vuint32 *)(mmRegs+0x84)) = srcAddr;
148 *((vuint32 *)(mmRegs+0xa0)) = destAddr;
244 *((vuint32 *)(mmRegs+0x84)) = srcAddr;
250 *((vuint32 *)(mmRegs+0xa0)) = (top * screenWidth + left) * bpp;
/haiku/src/add-ons/accelerants/intel_810/
H A Di810_regs.h113 #define INREG32(addr) (*((vuint32*)(gInfo.regs + (addr))))
117 #define OUTREG32(addr, val) (*((vuint32*)(gInfo.regs + (addr))) = (val))
/haiku/src/add-ons/accelerants/matrox/
H A DOverlay.c280 temp32 = (adress - ((uintptr_t)((vuint32 *)si->framebuffer)));
H A Dglobal.h5 extern vuint32 *regs;
/haiku/src/add-ons/accelerants/matrox/engine/
H A Dmga_bes.c273 moi->a1orgv = (uintptr_t)((vuint32 *)si->overlay.ob.buffer);
274 moi->a1orgv -= (uintptr_t)((vuint32 *)si->framebuffer);
H A Dmga_crtc.c515 vuint32 * fb;
538 fb = (vuint32 *) si->framebuffer + curadd;
H A Dmga_general.c155 ((vuint32 *)si->fbc.frame_buffer)[offset] = value;
163 if (((vuint32 *)si->fbc.frame_buffer)[offset] != value) result = B_ERROR;
H A Dmga_globals.c14 vuint32 *regs;
H A Dmga_globals.h5 extern vuint32 *regs;
/haiku/src/add-ons/accelerants/neomagic/engine/
H A Dnm_globals.c15 vuint32 *regs, *regs2;
H A Dnm_globals.h5 extern vuint32 *regs, *regs2;
/haiku/src/add-ons/accelerants/nvidia/
H A DOverlay.c249 temp32 = (adress - ((uintptr_t)((vuint32 *)si->framebuffer)));
/haiku/src/add-ons/accelerants/nvidia/engine/
H A Dnv_bes.c238 moi->a1orgv = (uintptr_t)((vuint32 *)si->overlay.ob.buffer);
239 moi->a1orgv -= (uintptr_t)((vuint32 *)si->framebuffer);
H A Dnv_crtc.c818 vuint32 * fb;
852 fb = (vuint32 *) si->framebuffer + curadd;
H A Dnv_crtc2.c778 vuint32 * fb;
812 fb = (vuint32 *) si->framebuffer + curadd;
/haiku/src/add-ons/accelerants/radeon/
H A Dmonitor_detection.c155 vuint32 old_vclk_ecp_cntl, value;
/haiku/src/add-ons/accelerants/s3/
H A Dregister_io.cpp19 #define INREG32(addr) *((vuint32*)(gInfo.regs + addr))
23 #define OUTREG32(addr, val) *((vuint32*)(gInfo.regs + addr)) = val
H A Dsavage.h78 #define BCI_GET_PTR vuint32* bci_ptr = ((uint32*)(gInfo.regs + BCI_BUFFER_OFFSET))

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