Searched refs:setOpcode (Results 1 - 25 of 30) sorted by relevance

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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Mips/
H A DMipsDirectObjLower.cpp45 Inst.setOpcode(Mips::DSLL32);
48 Inst.setOpcode(Mips::DSRL32);
51 Inst.setOpcode(Mips::DSRA32);
77 InstIn.setOpcode((Opcode == Mips::DEXT) ? Mips::DEXTU : Mips::DINSU);
83 InstIn.setOpcode((Opcode == Mips::DEXT) ? Mips::DEXTM : Mips::DINSM);
H A DMipsMCInstLower.cpp117 Inst.setOpcode(Opc);
152 OutMI.setOpcode(MI->getOpcode());
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/X86/
H A DX86MCInstLower.cpp224 OutMI.setOpcode(NewOpc);
229 OutMI.setOpcode(NewOpc);
252 Inst.setOpcode(Opcode);
303 Inst.setOpcode(Opcode);
308 OutMI.setOpcode(MI->getOpcode());
399 OutMI.setOpcode(Opcode);
407 OutMI.setOpcode(X86::RET);
425 OutMI.setOpcode(Opcode);
433 case X86::ADD16rr_DB: OutMI.setOpcode(X86::OR16rr); goto ReSimplify;
434 case X86::ADD32rr_DB: OutMI.setOpcode(X8
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/
H A DARMAsmPrinter.cpp1050 BrInst.setOpcode(ARM::t2B);
1116 TmpInst.setOpcode(Opcode);
1297 TmpInst.setOpcode(MI->getOpcode() == ARM::t2LEApcrel ? ARM::t2ADR
1311 TmpInst.setOpcode(MI->getOpcode() == ARM::t2LEApcrelJT ? ARM::t2ADR
1327 TmpInst.setOpcode(ARM::MOVr);
1339 TmpInst.setOpcode(ARM::BX);
1348 TmpInst.setOpcode(ARM::tMOVr);
1358 TmpInst.setOpcode(ARM::tBX);
1370 TmpInst.setOpcode(ARM::MOVr);
1382 TmpInst.setOpcode(AR
[all...]
H A DARMInstrInfo.cpp38 NopInst.setOpcode(ARM::HINT);
43 NopInst.setOpcode(ARM::MOVr);
H A DARMMCInstLower.cpp116 OutMI.setOpcode(MI->getOpcode());
H A DThumb1InstrInfo.cpp30 NopInst.setOpcode(ARM::tMOVr);
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Hexagon/
H A DHexagonMCInstLower.cpp43 MCI.setOpcode(MI->getOpcode());
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MBlaze/MCTargetDesc/
H A DMBlazeAsmBackend.cpp103 Res.setOpcode(getRelaxedOpcode(Inst.getOpcode()));
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MSP430/
H A DMSP430MCInstLower.cpp110 OutMI.setOpcode(MI->getOpcode());
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp5678 TmpInst.setOpcode(ARM::ADR);
5688 Inst.setOpcode(ARM::t2LDRpci);
5691 Inst.setOpcode(ARM::t2LDRBpci);
5694 Inst.setOpcode(ARM::t2LDRHpci);
5697 Inst.setOpcode(ARM::t2LDRSBpci);
5700 Inst.setOpcode(ARM::t2LDRSHpci);
5710 TmpInst.setOpcode(getRealVSTOpcode(Inst.getOpcode(), Spacing));
5732 TmpInst.setOpcode(getRealVSTOpcode(Inst.getOpcode(), Spacing));
5756 TmpInst.setOpcode(getRealVSTOpcode(Inst.getOpcode(), Spacing));
5782 TmpInst.setOpcode(getRealVSTOpcod
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/X86/AsmParser/
H A DX86AsmParser.cpp1523 TmpInst.setOpcode(X86::AND16ri8);
1536 TmpInst.setOpcode(X86::AND32ri8);
1549 TmpInst.setOpcode(X86::AND64ri8);
1562 TmpInst.setOpcode(X86::XOR16ri8);
1575 TmpInst.setOpcode(X86::XOR32ri8);
1588 TmpInst.setOpcode(X86::XOR64ri8);
1601 TmpInst.setOpcode(X86::OR16ri8);
1614 TmpInst.setOpcode(X86::OR32ri8);
1627 TmpInst.setOpcode(X86::OR64ri8);
1640 TmpInst.setOpcode(X8
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1819 Inst.setOpcode(ARM::RFEDA);
1822 Inst.setOpcode(ARM::RFEDA_UPD);
1825 Inst.setOpcode(ARM::RFEDB);
1828 Inst.setOpcode(ARM::RFEDB_UPD);
1831 Inst.setOpcode(ARM::RFEIA);
1834 Inst.setOpcode(ARM::RFEIA_UPD);
1837 Inst.setOpcode(ARM::RFEIB);
1840 Inst.setOpcode(ARM::RFEIB_UPD);
1843 Inst.setOpcode(ARM::SRSDA);
1846 Inst.setOpcode(AR
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/include/llvm/MC/
H A DMCInst.h157 void setOpcode(unsigned Op) { Opcode = Op; } function in class:llvm::MCInst
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MBlaze/
H A DMBlazeMCInstLower.cpp116 OutMI.setOpcode(MI->getOpcode());
/macosx-10.10.1/IOATAPIProtocolTransport-350.0.3/
H A DIOATAPIProtocolTransport.cpp905 cmd->setOpcode ( kATAPIFnExecIO );
1886 fIdentifyCommand->setOpcode ( kATAFnExecIO );
2012 cmd->setOpcode ( kATAFnExecIO );
2058 cmd->setOpcode ( kATAFnExecIO );
2139 fResetCommand->setOpcode ( kATAFnBusReset );
2253 cmd->setOpcode ( kATAFnRegAccess );
2349 cmd->setOpcode ( kATAFnExecIO );
2385 cmd->setOpcode ( kATAFnRegAccess );
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/PowerPC/
H A DPPCAsmPrinter.cpp337 TmpInst.setOpcode(PPC::BL_Darwin); // Darwin vs SVR4 doesn't matter here.
358 TmpInst.setOpcode(PPC::LD);
393 TmpInst.setOpcode(Subtarget.isPPC64() ? PPC::MFCR8 : PPC::MFCR);
H A DPPCMCInstLower.cpp146 OutMI.setOpcode(MI->getOpcode());
/macosx-10.10.1/JavaScriptCore-7600.1.17/offlineasm/
H A Dx86.rb641 def handleX86Set(setOpcode, operand)
643 $asm.puts "#{setOpcode} #{operand.x86Operand(:byte)}"
652 $asm.puts "#{setOpcode} %al"
658 def handleX86IntCompareSet(setOpcode, kind)
659 handleX86IntCompare(setOpcode[3..-1], kind)
660 handleX86Set(setOpcode, operands[2])
690 def handleX86SetTest(setOpcode, kind)
692 handleX86Set(setOpcode, operands.last)
/macosx-10.10.1/IOATAFamily-253.0.1/
H A DIOATACommand.h74 /*!@function setOpcode
77 virtual void setOpcode( ataOpcode inCode);
H A DATADeviceNub.cpp292 cmd->setOpcode( kATAFnExecIO);
H A DIOATACommand.cpp158 IOATACommand::setOpcode( ataOpcode inCode) function in class:IOATACommand
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Hexagon/InstPrinter/
H A DHexagonInstPrinter.cpp60 Nop.setOpcode (Hexagon::NOP);
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/X86/MCTargetDesc/
H A DX86AsmBackend.cpp279 Res.setOpcode(RelaxedOp);
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/MCTargetDesc/
H A DARMAsmBackend.cpp213 Res.setOpcode(RelaxedOp);

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