Searched refs:regWrites (Results 1 - 15 of 15) sorted by relevance

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar9002/
H A Dar9287_attach.c393 int regWrites = 0; local
418 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_modes, modesIndex, regWrites);
419 regWrites = ath_hal_ini_write(ah, &AH9287(ah)->ah_ini_rxgain, modesIndex, regWrites);
420 regWrites = ath_hal_ini_write(ah, &AH9287(ah)->ah_ini_txgain, modesIndex, regWrites);
421 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_common, 1, regWrites);
H A Dar9285_attach.c494 int regWrites = 0; local
509 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_modes,
510 modesIndex, regWrites);
512 regWrites = ath_hal_ini_write(ah, &AH9285(ah)->ah_ini_txgain,
513 modesIndex, regWrites);
515 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_common,
516 1, regWrites);
H A Dar9280_attach.c497 int regWrites = 0; local
531 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_modes,
532 modesIndex, regWrites);
548 DMA_YIELD(regWrites);
552 regWrites = ath_hal_ini_write(ah, &AH9280(ah)->ah_ini_rxgain,
553 modesIndex, regWrites);
554 regWrites = ath_hal_ini_write(ah, &AH9280(ah)->ah_ini_txgain,
555 modesIndex, regWrites);
558 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_common,
559 1, regWrites);
[all...]
H A Dar9287.c92 int regWrites = 0; local
103 regWrites);
107 regWrites);
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5212/
H A Dar5111.c229 int i, regWrites = 0; local
299 HAL_INI_WRITE_BANK(ah, ar5212Bank0_5111, rfReg, regWrites);
302 HAL_INI_WRITE_ARRAY(ah, ar5212Bank1_5111, 1, regWrites);
305 HAL_INI_WRITE_ARRAY(ah, ar5212Bank2_5111, modesIndex, regWrites);
308 HAL_INI_WRITE_ARRAY(ah, ar5212Bank3_5111, modesIndex, regWrites);
322 HAL_INI_WRITE_BANK(ah, ar5212Bank6_5111, rfReg, regWrites);
341 HAL_INI_WRITE_BANK(ah, ar5212Bank7_5111, rfReg, regWrites);
H A Dar2316.c71 int regWrites)
75 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2316, modesIndex, regWrites);
76 HAL_INI_WRITE_ARRAY(ah, ar5212Common_2316, 1, regWrites);
77 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2316, freqIndex, regWrites);
179 int regWrites = 0; local
214 HAL_INI_WRITE_BANK(ah, ar5212Bank1_2316, priv->Bank1Data, regWrites);
215 HAL_INI_WRITE_BANK(ah, ar5212Bank2_2316, priv->Bank2Data, regWrites);
216 HAL_INI_WRITE_BANK(ah, ar5212Bank3_2316, priv->Bank3Data, regWrites);
217 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2316, priv->Bank6Data, regWrites);
218 HAL_INI_WRITE_BANK(ah, ar5212Bank7_2316, priv->Bank7Data, regWrites);
70 ar2316WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, int regWrites) argument
[all...]
H A Dar2425.c167 int regWrites = 0; local
202 HAL_INI_WRITE_BANK(ah, ar5212Bank1_2425, priv->Bank1Data, regWrites);
203 HAL_INI_WRITE_BANK(ah, ar5212Bank2_2425, priv->Bank2Data, regWrites);
204 HAL_INI_WRITE_BANK(ah, ar5212Bank3_2425, priv->Bank3Data, regWrites);
208 regWrites);
211 regWrites);
212 HAL_INI_WRITE_BANK(ah, ar5212Bank7_2425, priv->Bank7Data, regWrites);
H A Dar5413.c174 int regWrites = 0; local
250 HAL_INI_WRITE_BANK(ah, ar5212Bank1_5413, priv->Bank1Data, regWrites);
251 HAL_INI_WRITE_BANK(ah, ar5212Bank2_5413, priv->Bank2Data, regWrites);
252 HAL_INI_WRITE_BANK(ah, ar5212Bank3_5413, priv->Bank3Data, regWrites);
253 HAL_INI_WRITE_BANK(ah, ar5212Bank6_5413, priv->Bank6Data, regWrites);
254 HAL_INI_WRITE_BANK(ah, ar5212Bank7_5413, priv->Bank7Data, regWrites);
H A Dar5112.c197 int regWrites = 0; local
328 HAL_INI_WRITE_BANK(ah, ar5212Bank1_5112, priv->Bank1Data, regWrites);
329 HAL_INI_WRITE_BANK(ah, ar5212Bank2_5112, priv->Bank2Data, regWrites);
330 HAL_INI_WRITE_BANK(ah, ar5212Bank3_5112, priv->Bank3Data, regWrites);
331 HAL_INI_WRITE_BANK(ah, ar5212Bank6_5112, priv->Bank6Data, regWrites);
332 HAL_INI_WRITE_BANK(ah, ar5212Bank7_5112, priv->Bank7Data, regWrites);
H A Dar2317.c157 int regWrites = 0; local
192 HAL_INI_WRITE_BANK(ah, ar5212Bank1_2317, priv->Bank1Data, regWrites);
193 HAL_INI_WRITE_BANK(ah, ar5212Bank2_2317, priv->Bank2Data, regWrites);
194 HAL_INI_WRITE_BANK(ah, ar5212Bank3_2317, priv->Bank3Data, regWrites);
195 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2317, priv->Bank6Data, regWrites);
196 HAL_INI_WRITE_BANK(ah, ar5212Bank7_2317, priv->Bank7Data, regWrites);
H A Dar2413.c173 int regWrites = 0; local
208 HAL_INI_WRITE_BANK(ah, ar5212Bank1_2413, priv->Bank1Data, regWrites);
209 HAL_INI_WRITE_BANK(ah, ar5212Bank2_2413, priv->Bank2Data, regWrites);
210 HAL_INI_WRITE_BANK(ah, ar5212Bank3_2413, priv->Bank3Data, regWrites);
211 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2413, priv->Bank6Data, regWrites);
212 HAL_INI_WRITE_BANK(ah, ar5212Bank7_2413, priv->Bank7Data, regWrites);
H A Dar5212_reset.c137 int i, regWrites; local
301 regWrites = ath_hal_ini_write(ah, &ahp->ah_ini_modes, modesIndex, 0);
302 regWrites = write_common(ah, &ahp->ah_ini_common, bChannelChange,
303 regWrites);
312 ahp->ah_rfHal->writeRegs(ah, modesIndex, freqIndex, regWrites);
H A Dar5212.h137 u_int modeIndex, u_int freqIndex, int regWrites);
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5416/
H A Dar5416_attach.c588 int regWrites = 0; local
621 regWrites = ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_addac, 1,
622 regWrites);
625 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_modes,
626 modesIndex, regWrites);
627 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_common,
628 1, regWrites);
630 /* XXX updated regWrites? */
631 AH5212(ah)->ah_rfHal->writeRegs(ah, modesIndex, freqIndex, regWrites);
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5312/
H A Dar5312_reset.c108 int i, regWrites = 0; local
231 regWrites = ath_hal_ini_write(ah, &ahp->ah_ini_modes, modesIndex, 0);
232 regWrites = write_common(ah, &ahp->ah_ini_common, bChannelChange,
233 regWrites);
234 ahp->ah_rfHal->writeRegs(ah, modesIndex, freqIndex, regWrites);

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