Searched refs:max_dac2_clock_32dh (Results 1 - 23 of 23) sorted by relevance

/haiku/src/add-ons/accelerants/matrox/
H A DGetModeInfo.c82 max_pclk = si->ps.max_dac2_clock_32dh;
86 max_pclk = si->ps.max_dac2_clock_32dh;
H A DProposeDisplayMode.c312 max_vclk = si->ps.max_dac2_clock_32dh;
317 max_vclk = si->ps.max_dac2_clock_32dh;
/haiku/src/add-ons/accelerants/skeleton/
H A DGetModeInfo.c76 max_pclk = si->ps.max_dac2_clock_32dh;
80 max_pclk = si->ps.max_dac2_clock_32dh;
H A DProposeDisplayMode.c429 max_vclk = si->ps.max_dac2_clock_32dh;
434 max_vclk = si->ps.max_dac2_clock_32dh;
/haiku/src/add-ons/accelerants/via/
H A DGetModeInfo.c76 max_pclk = si->ps.max_dac2_clock_32dh;
80 max_pclk = si->ps.max_dac2_clock_32dh;
H A DProposeDisplayMode.c431 max_vclk = si->ps.max_dac2_clock_32dh;
436 max_vclk = si->ps.max_dac2_clock_32dh;
/haiku/src/add-ons/accelerants/nvidia/
H A DGetModeInfo.c76 max_pclk = si->ps.max_dac2_clock_32dh;
80 max_pclk = si->ps.max_dac2_clock_32dh;
H A DProposeDisplayMode.c479 max_vclk = si->ps.max_dac2_clock_32dh;
484 max_vclk = si->ps.max_dac2_clock_32dh;
/haiku/src/add-ons/accelerants/matrox/engine/
H A Dmga_info.c169 si->ps.max_dac2_clock_32dh = pins[58];//vid ctrl
306 si->ps.max_dac2_clock_32dh = 136;
429 si->ps.max_dac2_clock_32dh = si->ps.max_dac2_clock_32;
502 if (pins[125] == 0xff) si->ps.max_dac2_clock_32dh = si->ps.max_dac2_clock_32;
503 else si->ps.max_dac2_clock_32dh = 4 * pins[125];
646 si->ps.max_dac2_clock_32dh = 0;
685 si->ps.max_dac2_clock_32dh = 0;
725 si->ps.max_dac2_clock_32dh = 136;
766 si->ps.max_dac2_clock_32dh = 136;
806 si->ps.max_dac2_clock_32dh
[all...]
H A Dmga_maven.c378 max_pclk = si->ps.max_dac2_clock_32dh;
595 max_pclk = si->ps.max_dac2_clock_32dh;
H A Dmga_maventv.c90 max_pclks_field = (si->ps.max_dac2_clock_32dh * 1000000) / fields_sec;
/haiku/src/add-ons/accelerants/via/engine/
H A Dinfo.c705 si->ps.max_dac2_clock_32dh = 0;
739 si->ps.max_dac2_clock_32dh = 0;
773 si->ps.max_dac2_clock_32dh = 0;
812 si->ps.max_dac2_clock_32dh = 180;
824 si->ps.max_dac2_clock_32dh = 250;
861 si->ps.max_dac2_clock_32dh = 250;
911 si->ps.max_dac2_clock_32dh = 250;
1059 LOG(2,("max_dac2_clock_32dh: %dMhz\n", si->ps.max_dac2_clock_32dh));
H A Ddac2.c280 max_pclk = si->ps.max_dac2_clock_32dh;
H A Dtvout.c95 max_pclks_field = (si->ps.max_dac2_clock_32dh * 1000000) / fields_sec;
/haiku/headers/private/graphics/matrox/
H A DDriverInterface.h222 uint32 max_dac2_clock_32dh; member in struct:__anon785::__anon789
/haiku/headers/private/graphics/skeleton/
H A DDriverInterface.h276 uint32 max_dac2_clock_32dh; member in struct:__anon937::__anon943
/haiku/src/add-ons/accelerants/skeleton/engine/
H A Ddac2.c280 max_pclk = si->ps.max_dac2_clock_32dh;
H A Dinfo.c2636 si->ps.max_dac2_clock_32dh = 0;
2670 si->ps.max_dac2_clock_32dh = 0;
2704 si->ps.max_dac2_clock_32dh = 0;
2743 si->ps.max_dac2_clock_32dh = 180;
2755 si->ps.max_dac2_clock_32dh = 250;
2792 si->ps.max_dac2_clock_32dh = 250;
2842 si->ps.max_dac2_clock_32dh = 250;
3042 LOG(2,("max_dac2_clock_32dh: %dMhz\n", si->ps.max_dac2_clock_32dh));
H A Dtvout.c95 max_pclks_field = (si->ps.max_dac2_clock_32dh * 1000000) / fields_sec;
/haiku/headers/private/graphics/via/
H A DDriverInterface.h287 uint32 max_dac2_clock_32dh; member in struct:__anon7::__anon10
/haiku/headers/private/graphics/nvidia/
H A DDriverInterface.h416 uint32 max_dac2_clock_32dh; member in struct:__anon21::__anon27
/haiku/src/add-ons/accelerants/nvidia/engine/
H A Dnv_dac2.c325 max_pclk = si->ps.max_dac2_clock_32dh;
H A Dnv_info.c2992 si->ps.max_dac2_clock_32dh = 0;
3026 si->ps.max_dac2_clock_32dh = 0;
3060 si->ps.max_dac2_clock_32dh = 0;
3099 si->ps.max_dac2_clock_32dh = 180;
3111 si->ps.max_dac2_clock_32dh = 250;
3148 si->ps.max_dac2_clock_32dh = 250;
3213 si->ps.max_dac2_clock_32dh = 250;
3386 LOG(2,("max_dac2_clock_32dh: %dMhz\n", si->ps.max_dac2_clock_32dh));

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