Searched refs:barSize (Results 1 - 5 of 5) sorted by relevance
| /haiku/src/add-ons/kernel/drivers/graphics/framebuffer/ |
| H A D | framebuffer.cpp | 42 uint64 barSize = info.u.h0.base_register_sizes[i]; local
46 barSize |= (uint64)info.u.h0.base_register_sizes[i + 1] << 32;
49 if (addr <= frameBuffer && addr + barSize > frameBuffer) {
52 size = barSize;
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| /haiku/src/add-ons/kernel/busses/mmc/ |
| H A D | sdhci_pci.cpp | 78 uint64 barSize = pciInfo.u.h0.base_register_sizes[bar]; local
82 barSize |= (uint64)pciInfo.u.h0.base_register_sizes[bar + 1] << 32;
85 if (physicalAddress == 0 || barSize == 0) {
100 physicalAddress, barSize, B_ANY_KERNEL_BLOCK_ADDRESS,
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| /haiku/src/add-ons/kernel/busses/agp_gart/ |
| H A D | intel_gart.cpp | 658 uint64 barSize = info.display.u.h0.base_register_sizes[mmioIndex]; local
661 barSize |= (uint64)info.display.u.h0.base_register_sizes[mmioIndex + 1] << 32;
665 info.registers_area = mmioMapper.Map("intel GMCH mmio", addr, barSize,
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| /haiku/src/add-ons/kernel/drivers/graphics/intel_extreme/ |
| H A D | intel_extreme.cpp | 647 uint64 barSize = info.pci->u.h0.base_register_sizes[mmioIndex]; local
650 barSize |= (uint64)info.pci->u.h0.base_register_sizes[mmioIndex + 1] << 32;
653 info.registers_area = mmioMapper.Map("intel extreme mmio", addr, barSize,
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| /haiku/src/add-ons/kernel/busses/virtio/virtio_pci/ |
| H A D | virtio_pci.cpp | 670 size_t barSize = pciInfo->u.h0.base_register_sizes[i]; local
673 barSize |= (uint64)pciInfo->u.h0.base_register_sizes[i + 1] << 32;
677 barAddr, barSize, B_ANY_KERNEL_ADDRESS, B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA,
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