/haiku/src/add-ons/media/media-add-ons/radeon/ |
H A D | Capture.cpp | 93 SetRegister(C_RADEON_CAP0_TRIG_CNTL, C_RADEON_CAP0_TRIGGER_W_NO_ACTION); 101 SetRegister(C_RADEON_CAP0_BUF0_OFFSET, fOffset0); 102 SetRegister(C_RADEON_CAP0_BUF_PITCH, fPitch << 1); 107 SetRegister(C_RADEON_CAP0_BUF0_OFFSET, fOffset0); 108 SetRegister(C_RADEON_CAP0_BUF1_OFFSET, fOffset1); 109 SetRegister(C_RADEON_CAP0_BUF_PITCH, fPitch << 1); 114 SetRegister(C_RADEON_CAP0_BUF0_OFFSET, fOffset0); 115 SetRegister(C_RADEON_CAP0_BUF0_EVEN_OFFSET, fOffset0 + fSize); 116 SetRegister(C_RADEON_CAP0_BUF_PITCH, fPitch << 1); 121 SetRegister(C_RADEON_CAP0_BUF0_OFFSE 338 void CCapture::SetRegister(radeon_register index, int value) function in class:CCapture 343 void CCapture::SetRegister(radeon_register index, int mask, int value) function in class:CCapture [all...] |
H A D | Theater100.cpp | 78 SetRegister(VIP_ADC_CNTL, ADC_CPRESET, ADC_CPRESET); 80 SetRegister(VIP_ADC_CNTL, ADC_CPRESET, 0); 82 SetRegister(VIP_ADC_CNTL, ADC_PDWN, ADC_PDWN_DOWN); 89 SetRegister(VIP_MASTER_CNTL, VIN_ASYNC_RST, VIN_ASYNC_RST); 90 SetRegister(VIP_MASTER_CNTL, DVS_ASYNC_RST, DVS_ASYNC_RST); 93 SetRegister(VIP_CLOCK_SEL_CNTL, VIN_CLK_SEL, VIN_CLK_SEL_REF_CLK); 96 SetRegister(VIP_PLL_CNTL1, VINRST, VINRST); 97 SetRegister(VIP_PLL_CNTL1, L54RST, L54RST); 100 SetRegister(VIP_ADC_CNTL, ADC_PDWN, ADC_PDWN); 103 SetRegister(VIP_DVS_PORT_CTR [all...] |
H A D | MSP3430.cpp | 232 SetRegister(MSP3430_WR_DEM, MSP3430_DEM_MODUS, 0x2003); 233 SetRegister(MSP3430_WR_DEM, MSP3430_DEM_STANDARD_SEL, C_MSP3430_BTSC_STEREO); // 0x20 234 SetRegister(MSP3430_WR_DSP, MSP3430_DSP_FM_PRESCALE, 0x2403); 235 SetRegister(MSP3430_WR_DSP, MSP3430_DSP_SRC_MAT_MAIN, 0x0320); 236 SetRegister(MSP3430_WR_DSP, MSP3430_DSP_VOL_MAIN, 0x7300); 237 SetRegister(MSP3430_WR_DSP, MSP3430_DSP_SRC_MAT_MAIN, 0x0320); 240 SetRegister(MSP3430_WR_DSP, MSP3430_DSP_VOL_MAIN, 0x0000); 250 SetRegister(MSP3430_WR_DEM, I2S_CONFIG, fast ? 0x0001 : 0x0000); 709 SetRegister(MSP3430_WR_DSP, BEEPER, beeper); 745 SetRegister(MSP3430_WR_DS 866 void CMSP3430::SetRegister(int address, int subaddress, int value) function in class:CMSP3430 [all...] |
H A D | I2CPort.cpp | 45 fRadeon.SetRegister(C_RADEON_I2C_CNTL_1, 0x00ff0000, 48 fRadeon.SetRegister(C_RADEON_I2C_CNTL_0, 0x000000ff, 69 fRadeon.SetRegister(C_RADEON_I2C_CNTL_1, 0); 134 void CI2CPort::SetRegister(int address, int index, int value) function in class:CI2CPort 142 PRINT(("CI2CPort::SetRegister() - error\n")); 150 fRadeon.SetRegister(C_RADEON_I2C_CNTL_0, 155 fRadeon.SetRegister(C_RADEON_I2C_DATA, address & ~(1)); 159 fRadeon.SetRegister(C_RADEON_I2C_DATA, buffer[offset]); 163 fRadeon.SetRegister(C_RADEON_I2C_CNTL_1, 167 fRadeon.SetRegister(C_RADEON_I2C_CNTL_ [all...] |
H A D | MSP3430.h | 33 void SetRegister(int address, int subaddress, int value);
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H A D | Theater.cpp | 58 void CTheater::SetRegister(int index, int value) function in class:CTheater 60 fPort.SetRegister(fDevice, index, value); 63 void CTheater::SetRegister(int index, int mask, int value) function in class:CTheater 66 PRINT(("WARNING: CTheater::SetRegister(0x%04x, 0x%08x, 0x%08x)\n", index, mask, value)); 68 fPort.SetRegister(fDevice, index,
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H A D | Theater200.cpp | 331 SetRegister(VIP_HOSTINTF_PORT_CNTL, data & (~VIP_HOSTINTF_PORT_CNTL__FIFO_RW_MODE)); 335 SetRegister(VIP_HOSTINTF_PORT_CNTL, data & (~VIP_HOSTINTF_PORT_CNTL__FIFOD_ENDIAN_SWAP)); 387 SetRegister(VIP_TC_DOWNLOAD, (data & ~VIP_TC_DOWNLOAD__TC_RESET_MODE) | (0x02 << 17)); 394 SetRegister(VIP_TC_SOURCE, 0x90000000); 395 SetRegister(VIP_TC_DESTINATION, 0x00000000); 396 SetRegister(VIP_TC_COMMAND, 0xe0000044 | ((seg_list->num_bytes - 1) << 7)); 423 SetRegister(VIP_TC_SOURCE, 0x00000000); 424 SetRegister(VIP_TC_DESTINATION, 0x10000000); 425 SetRegister(VIP_TC_COMMAND, 0xe0000006 | ((seg_list->num_bytes - 1) << 7)); 443 SetRegister(VIP_TC_DOWNLOA [all...] |
H A D | Capture.h | 70 void SetRegister(radeon_register index, int value); 72 void SetRegister(radeon_register index, int mask, int value);
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H A D | Theater.h | 85 void SetRegister(int index, int value); 87 void SetRegister(int index, int mask, int value);
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H A D | I2CPort.h | 44 void SetRegister(int address, int index, int value);
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H A D | VIPPort.h | 57 void SetRegister(int device, int address, int value) { function in class:CVIPPort
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H A D | Radeon.h | 345 void SetRegister(radeon_register index, int value); 349 void SetRegister(radeon_register index, int mask, int value);
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H A D | Radeon.cpp | 204 void CRadeon::SetRegister(radeon_register index, int value) function in class:CRadeon 214 void CRadeon::SetRegister(radeon_register index, int mask, int value) function in class:CRadeon 218 PRINT(("CRadeon::SetRegister(0x%04x, 0x%08x, 0x%08x)\n", index, mask, value));
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/haiku/src/kits/debugger/dwarf/ |
H A D | CfaRule.h | 82 inline void SetRegister(uint32 reg); 199 CfaCfaRule::SetRegister(uint32 reg) function in class:CfaCfaRule
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H A D | DwarfFile.cpp | 2806 context.GetCfaCfaRule()->SetRegister(reg);
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