Searched refs:SHOW_FLOW (Results 1 - 25 of 47) sorted by relevance

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/haiku/src/add-ons/kernel/bus_managers/scsi/
H A Dvirtual_memory.cpp35 SHOW_FLOW(3, "vec_count=%" B_PRIuSIZE ", vec_offset=%" B_PRIuSIZE ", len=%"
54 SHOW_FLOW( 3, "left_len=%d, vec_count=%d, cur_idx=%" B_PRIu32,
61 SHOW_FLOW( 3, "range_start=%" B_PRIxADDR ", range_len=%" B_PRIxSIZE,
88 SHOW_FLOW( 3, "cur_num_entries=%" B_PRIu32 ", cur_mapped_len=%x",
115 SHOW_FLOW( 3, "num_entries=%" B_PRIu32 ", mapped_len=%" B_PRIxSIZE,
H A Ddpc.cpp49 SHOW_FLOW(3, "bus=%p, dpc=%p", bus, dpc);
75 SHOW_FLOW(3, "bus=%p, dpc_list=%p", bus, bus->dpc_list);
H A Dqueuing.h28 SHOW_FLOW( 3, "request=%p", request );
37 SHOW_FLOW( 3, "request=%p", request );
46 SHOW_FLOW( 3, "request=%p", request );
H A Dscatter_gather.cpp56 SHOW_FLOW(3, "Checking violation of dma boundary 0x%" B_PRIx32
68 SHOW_FLOW(4, "addr=%#" B_PRIxPHYSADDR ", size=%" B_PRIxPHYSADDR
109 SHOW_FLOW(3, "ccb=%p, data=%p, data_length=%" B_PRIu32, ccb, ccb->data,
155 SHOW_FLOW(3, "ccb=%p, data=%p, data_length=%" B_PRId32,
H A Ddma_buffer.cpp66 SHOW_FLOW(0, "S/G-entry crosses DMA boundary @%" B_PRIxPHYSADDR,
73 SHOW_FLOW(0, "S/G-entry has bad alignment @%#" B_PRIxPHYSADDR,
79 SHOW_FLOW(0, "end of S/G-entry has bad alignment @%" B_PRIxPHYSADDR,
86 SHOW_FLOW(0, "S/G-entry is too long (%" B_PRIuPHYSADDR "/%" B_PRIu32
106 SHOW_FLOW(1, "to_buffer=%d, %" B_PRIu32 " bytes", to_buffer, size);
314 SHOW_FLOW(1, "count=%" B_PRIu32, sg_list_count);
317 SHOW_FLOW(1, "addr=%" B_PRIxPHYSADDR ", size=%" B_PRIuPHYSADDR,
437 SHOW_FLOW(1, "Buffering finished, %x, %" B_PRIx32,
H A Demulation.cpp93 SHOW_FLOW(3, "physical = %#" B_PRIxPHYSADDR ", address = %p",
186 SHOW_FLOW(3, "allocation_length=%" B_PRIuSIZE, allocationLength);
238 SHOW_FLOW(3, "param_list_length=%ld", param_list_length_6);
281 SHOW_FLOW(3, "command=%x", request->cdb[0]);
325 SHOW_FLOW(0, "fixing MODE SENSE(6) (%d bytes)", transfer_size_6);
388 SHOW_FLOW(3, "ANSI version: %d, response data format: %d",
430 SHOW_FLOW( 3, "sense_key=%d, sense_asc=%d", sense_key, sense_asc );
472 SHOW_FLOW(3, "offset=%u, req_size_limit=%d, size=%d, sg_list=%p, sg_count=%d, %s buffer",
495 SHOW_FLOW(0, "buffer = %p, virt_addr = %#" B_PRIxPHYSADDR ", bytes = %"
H A Ddevice_scan.cpp48 SHOW_FLOW( 3, "status=%x", worker_req->subsys_status );
167 SHOW_FLOW(3, "%d:%d:%d", bus->path_id, target_id, target_lun);
173 //SHOW_FLOW(3, "temp_device: %d", (int)temp_device);
265 SHOW_FLOW(3, "initiator_id=%d", initiator_id);
272 SHOW_FLOW(3, "target: %d", target_id);
281 SHOW_FLOW(3, "lun: %d", lun);
H A Dwrapper.h52 #define SHOW_FLOW(seriousness, format, param...) \ macro
H A Dscsi_io.cpp185 SHOW_FLOW(3, "Got sense: %d bytes", sense_len);
244 SHOW_FLOW(3, "%p", request);
280 SHOW_FLOW(3, "subsys=%x, device=%x, flags=%" B_PRIx32
370 SHOW_FLOW(1, "%" B_PRId64, device->last_sort);
395 //SHOW_FLOW( 0, "path_id=%d", bus->path_id );
470 SHOW_FLOW(3, "ordered=%d", request->ordered);
623 SHOW_FLOW(1, "%" B_PRId64, device->last_sort);
H A Dccb.cpp46 SHOW_FLOW(3, "path=%d", ccb->path_id);
H A Dbusses.cpp60 SHOW_FLOW(3, "bus = %p", bus);
267 SHOW_FLOW( 3, "Bus has %d slots", bus->left_slots );
289 SHOW_FLOW(4, "path_id=%d", bus->path_id);
/haiku/src/add-ons/accelerants/radeon/
H A DCP.c68 SHOW_FLOW( 3, "head=%ld, tail=%ld, space=%ld",
91 SHOW_FLOW( 3, "processed_tag=%d", cur_processed_tag );
99 SHOW_FLOW( 3, "oldset buffer's tag: %d", oldest_buffer->send_tag );
106 SHOW_FLOW( 3, "mark %d as being free", oldest_buffer->send_tag );
188 SHOW_FLOW( 3, "got %d", buffer_idx );
205 SHOW_FLOW( 3, "buffer_idx=%d, never_used=%d", buffer_idx, never_used );
248 SHOW_FLOW( 3, "@%d: %x", ring_tail, val ); \
274 SHOW_FLOW( 3, "buffer_idx=%d, buffer_size=%d, state_buffer_idx=%d, state_buffer_size=%d",
278 SHOW_FLOW( 3, "buffer has uneven size (%d)", buffer_size );
316 SHOW_FLOW(
[all...]
H A DSetDisplayMode.c283 SHOW_FLOW( 0, "RADEON_DAC_CNTL %08X ", INREG( regs, RADEON_DAC_CNTL ));
284 SHOW_FLOW( 0, "RADEON_DAC_CNTL2 %08X ", INREG( regs, RADEON_DAC_CNTL2 ));
285 SHOW_FLOW( 0, "RADEON_TV_DAC_CNTL %08X ", INREG( regs, RADEON_TV_DAC_CNTL ));
286 SHOW_FLOW( 0, "RADEON_DISP_OUTPUT_CNTL %08X ", INREG( regs, RADEON_DISP_OUTPUT_CNTL ));
287 SHOW_FLOW( 0, "RADEON_AUX_SC_CNTL %08X ", INREG( regs, RADEON_AUX_SC_CNTL ));
288 SHOW_FLOW( 0, "RADEON_CRTC_EXT_CNTL %08X ", INREG( regs, RADEON_CRTC_EXT_CNTL ));
289 SHOW_FLOW( 0, "RADEON_CRTC_GEN_CNTL %08X ", INREG( regs, RADEON_CRTC_GEN_CNTL ));
290 SHOW_FLOW( 0, "RADEON_CRTC2_GEN_CNTL %08X ", INREG( regs, RADEON_CRTC2_GEN_CNTL ));
291 SHOW_FLOW( 0, "RADEON_DISP_MISC_CNTL %08X ", INREG( regs, RADEON_DISP_MISC_CNTL ));
292 SHOW_FLOW(
[all...]
H A Doverlay.c307 SHOW_FLOW( 3, "key=%lx", res );
320 /*SHOW_FLOW( 0, "value=%02x %02x %02x, mask=%02x %02x %02x",
494 SHOW_FLOW( 3, "p1_4tap_allowed=%d, p23_4t_allowed=%d",
518 SHOW_FLOW( 3, "group_size=%d, p1_step_by=%d, p23_step_by=%d",
606 SHOW_FLOW( 3, "ow: h=%d, v=%d, width=%d, height=%d",
610 SHOW_FLOW( 3, "offset_left=%d, offset_right=%d, offset_top=%d, offset_bottom=%d",
631 SHOW_FLOW( 3, "mode: w=%d, h=%d",
639 SHOW_FLOW( 3, "src=(%d, %d, %d, %d)",
641 SHOW_FLOW( 3, "dest=(%d, %d, %d, %d)",
655 SHOW_FLOW(
[all...]
H A Dimpactv.c65 SHOW_FLOW( 3, "f_first=%d, v_first=%d, h_first=%d", f_first, v_first, h_first );
75 SHOW_FLOW( 3, "first_num=%d", first_num );
81 SHOW_FLOW( 3, "time_to_active=%d, crt_freq=%d, tv_freq=%d",
95 SHOW_FLOW( 3, "restart_to_first_active_pixel_to_FIFO=%d", restart_to_first_active_pixel_to_FIFO );
97 SHOW_FLOW( 3, "after delay compensation first_num=%d", first_num );
105 //SHOW_FLOW( 2, "first_num=%d", first_num );
117 SHOW_FLOW( 2, "Restart in frame %d, line %d, pixel %d",
164 SHOW_FLOW( 3, "flicker removal=%d", flicker_removal );
170 SHOW_FLOW( 3, "%d < %d ?",
332 SHOW_FLOW(
[all...]
H A DEngineManagment.c165 SHOW_FLOW( 4, "got counter=%d", si->engine.count );
200 SHOW_FLOW( 4, "passed counter=%d",
H A Dcrtc.c124 SHOW_FLOW( 2, "crtc_pitch=%ld", values->crtc_pitch );
140 SHOW_FLOW( 3, "Setting address %x on port %d",
152 SHOW_FLOW( 4, "h_display_start=%ld, v_display_start=%ld",
/haiku/src/add-ons/kernel/drivers/graphics/radeon/
H A Dvip.c64 //SHOW_FLOW( 4, "channel=%d, address=%x, data=%lx", channel, address, *data );
92 // SHOW_FLOW( 2, "address=%x, data=%lx, lock=%d", address, *data, lock );
108 SHOW_FLOW( 2, "address=%" B_PRIx32 ", count=%" B_PRIu32 " ",
183 //SHOW_FLOW( 2, "address=%x, data=%lx, lock=%d", address, *data, lock );
199 //SHOW_FLOW( 4, "channel=%d, address=%x, data=%lx", channel, address, data );
213 //SHOW_FLOW( 2, "address=%x, data=%lx, lock=%d", address, data, lock );
235 SHOW_FLOW( 2, "address=%" B_PRIx32 ", count=%" B_PRIu32 ", ",
247 SHOW_FLOW( 2 ,"cannot write %x to VIPH_REG_ADDR\n",
256 SHOW_FLOW( 2, "count %" B_PRIu32, count);
277 //SHOW_FLOW(
[all...]
/haiku/src/add-ons/kernel/busses/ata/promise_tx2/
H A Dwrapper.h60 #define SHOW_FLOW(seriousness, format, param...) \ macro
/haiku/src/add-ons/kernel/drivers/bus/scsi/
H A Dwrapper.h60 #define SHOW_FLOW(seriousness, format, param...) \ macro
/haiku/src/add-ons/kernel/generic/ata_adapter/
H A Dwrapper.h60 #define SHOW_FLOW(seriousness, format, param...) \ macro
/haiku/src/add-ons/kernel/generic/scsi_periph/
H A Dwrapper.h53 #define SHOW_FLOW(seriousness, format, param...) \ macro
H A Derror_handling.cpp211 SHOW_FLOW(3, "%d", request->device_status & SCSI_STATUS_MASK);
245 SHOW_FLOW(4, "%d", request->subsys_status & SCSI_SUBSYS_STATUS_MASK);
H A Dremovable.cpp140 SHOW_FLOW( 3, "action: %x, error: %x", (int)res.action, (int)res.error_code);
186 SHOW_FLOW(3, "error_code: %x", (int)res.error_code);
/haiku/headers/private/graphics/common/
H A Ddebug_ext.h78 #define SHOW_FLOW(seriousness, format, param...) \ macro

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