/freebsd-10.1-release/sys/powerpc/booke/ |
H A D | machdep_e500.c | 55 uint32_t csr; local 58 csr = mfspr(SPR_L1CSR0); 59 if ((csr & L1CSR0_DCE) == 0) { 64 csr = mfspr(SPR_L1CSR0); 65 if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR0_DCE) == 0) 67 (csr & L1CSR0_DCE) ? "en" : "dis"); 70 csr = mfspr(SPR_L1CSR1); 71 if ((csr & L1CSR1_ICE) == 0) { 76 csr = mfspr(SPR_L1CSR1); 77 if ((boothowto & RB_VERBOSE) != 0 || (csr [all...] |
H A D | mp_cpudep.c | 53 uint32_t msr, sp, csr; local 56 csr = mfspr(SPR_L1CSR0); 57 if ((csr & L1CSR0_DCE) == 0) { 62 csr = mfspr(SPR_L1CSR1); 63 if ((csr & L1CSR1_ICE) == 0) {
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/freebsd-10.1-release/sys/sparc64/sbus/ |
H A D | lsi64854.c | 128 uint32_t csr; local 188 csr = L64854_GCSR(sc); 189 sc->sc_rev = csr & L64854_DEVID; 213 DPRINTF(LDB_ANY, (", burst 0x%x, csr 0x%x", sc->sc_burst, csr)); 252 uint32_t csr; \ 265 csr = L64854_GCSR(sc); \ 267 csr |= D_ESC_DRAIN; \ 269 csr |= L64854_INVALIDATE; \ 271 L64854_SCSR(sc, csr); \ 301 uint32_t csr; local 397 uint32_t csr; local 479 uint32_t csr; local 596 uint32_t csr; local 656 uint32_t csr; local 716 uint32_t csr; local [all...] |
H A D | lsi64854var.h | 68 #define L64854_SCSR(sc, csr) bus_write_4((sc)->sc_res, L64854_REG_CSR, csr) 79 uint32_t csr = L64854_GCSR(sc); \ 80 csr |= L64854_INT_EN; \ 81 L64854_SCSR(sc, csr); \ 87 uint32_t csr = L64854_GCSR(sc); \ 88 csr |= D_EN_DMA; \ 89 L64854_SCSR(sc, csr); \
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H A D | dma_sbus.c | 179 uint32_t csr; local 204 * set the appropriate bit in the ledma csr so that it 209 csr = L64854_GCSR(lsc); 213 csr |= E_TP_AUI; 216 csr &= ~E_TP_AUI; 218 csr |= E_TP_AUI; 221 L64854_SCSR(lsc, csr);
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/freebsd-10.1-release/sys/contrib/octeon-sdk/ |
H A D | cvmx-helper.h | 83 * @param chcsr_init intial value of the csr (CVMX_HELPER_CSR_INIT_READ 84 * means to use the existing csr value as the 86 * @param chcsr_csr the name of the csr 87 * @param chcsr_type the type of the csr (see the -defs.h) 88 * @param chcsr_chip the chip for the csr/field 89 * @param chcsr_fld the field in the csr 95 chcsr_type csr; \ 97 csr.u64 = cvmx_read_csr(chcsr_csr); \ 99 csr.u64 = (chcsr_init); \ 100 csr [all...] |
/freebsd-10.1-release/sys/sparc64/pci/ |
H A D | psychoreg.h | 218 #define PSYCHO_GCSR_IMPL(csr) ((u_int)(((csr) >> 60) & 0xf)) 219 #define PSYCHO_GCSR_VERS(csr) ((u_int)(((csr) >> 56) & 0xf)) 220 #define PSYCHO_GCSR_MID(csr) ((u_int)(((csr) >> 51) & 0x1f)) 221 #define PSYCHO_GCSR_IGN(csr) ((u_int)(((csr) >> 46) & 0x1f))
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H A D | psycho.c | 294 uint64_t csr, dr; local 371 csr = PSYCHO_READ8(sc, PSR_CS); 372 ver = PSYCHO_GCSR_VERS(csr); 375 sc->sc_ign = PSYCHO_GCSR_IGN(csr); 381 desc->pd_name, (u_int)PSYCHO_GCSR_IMPL(csr), ver, sc->sc_ign, 386 csr = PCICTL_READ8(sc, PCR_CS); 387 csr &= ~PCICTL_ARB_PARK; 389 csr |= PCICTL_ARB_PARK; 400 csr &= ~PCICTL_ARB_PARK; 411 csr | [all...] |
/freebsd-10.1-release/sys/dev/mk48txx/ |
H A D | mk48txx.c | 163 uint8_t csr; local 170 csr = (*sc->sc_nvrd)(dev, clkoff + MK48TXX_ICSR); 171 csr |= MK48TXX_CSR_READ; 172 (*sc->sc_nvwr)(dev, clkoff + MK48TXX_ICSR, csr); 205 csr = (*sc->sc_nvrd)(dev, clkoff + MK48TXX_ICSR); 206 csr &= ~MK48TXX_CSR_READ; 207 (*sc->sc_nvwr)(dev, clkoff + MK48TXX_ICSR, csr); 223 uint8_t csr; local 237 csr = (*sc->sc_nvrd)(dev, clkoff + MK48TXX_ICSR); 238 csr | [all...] |
/freebsd-10.1-release/sys/dev/usb/controller/ |
H A D | musb_otg.c | 374 uint8_t csr; local 392 csr = MUSB2_READ_1(sc, MUSB2_REG_TXCSRL); 394 DPRINTFN(4, "csr=0x%02x\n", csr); 400 if (csr & MUSB2_MASK_CSR0L_DATAEND) { 408 if (csr & MUSB2_MASK_CSR0L_SENTSTALL) { 412 csr = MUSB2_READ_1(sc, MUSB2_REG_TXCSRL); 416 if (csr & MUSB2_MASK_CSR0L_SETUPEND) { 421 csr = MUSB2_READ_1(sc, MUSB2_REG_TXCSRL); 429 if (!(csr 495 uint8_t csr, csrh; local 605 uint8_t csr; local 748 uint8_t csr; local 866 uint8_t csr; local 1046 uint8_t csr, csrh; local 1220 uint8_t csr; local 1256 uint8_t csr, csrh; local 1343 uint8_t csr; local 1411 uint8_t csr; local 1561 uint8_t csr; local 1690 uint8_t csr, csrh; local 1914 uint8_t csr, csrh; local 2859 uint8_t csr; local [all...] |
H A D | at91dci.c | 128 #define AT91_CSR_ACK(csr, what) do { \ 129 (csr) &= ~((AT91_UDP_CSR_FORCESTALL| \ 132 (csr) |= ((AT91_UDP_CSR_RX_DATA_BK0| \ 305 uint32_t csr; local 310 csr = AT91_UDP_READ_4(sc, td->status_reg); 312 DPRINTFN(5, "csr=0x%08x rem=%u\n", csr, td->remainder); 314 temp = csr; 321 if (!(csr & AT91_UDP_CSR_RXSETUP)) { 328 count = (csr 392 uint32_t csr; local 516 uint32_t csr; local 598 uint32_t csr; local [all...] |
/freebsd-10.1-release/sys/dev/mii/ |
H A D | lxtphy.c | 204 int bmcr, bmsr, csr; local 214 csr = PHY_READ(sc, MII_LXTPHY_CSR); 215 if (csr & CSR_LINK) 235 if (csr & CSR_SPEED) 239 if (csr & CSR_DUPLEX)
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/freebsd-10.1-release/sys/dev/pdq/ |
H A D | pdq_freebsd.h | 146 #define PDQ_CSR_WRITE(csr, name, data) PDQ_OS_IOWR_32((csr)->csr_bus, (csr)->csr_base, (csr)->name, data) 147 #define PDQ_CSR_READ(csr, name) PDQ_OS_IORD_32((csr)->csr_bus, (csr)->csr_base, (csr)->name)
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H A D | pdqvar.h | 149 #define PDQ_CSR_WRITE(csr, name, data) PDQ_OS_MEMWR_32((csr)->csr_bus, (csr)->name, 0, data) 150 #define PDQ_CSR_READ(csr, name) PDQ_OS_MEMRD_32((csr)->csr_bus, (csr)->name, 0)
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/freebsd-10.1-release/sys/dev/sound/sbus/ |
H A D | cs4231.c | 739 u_int32_t csr; local 745 csr = APC_READ(sc, APC_CSR); 746 if ((csr & APC_CSR_GI) == 0) { 750 APC_WRITE(sc, APC_CSR, csr); 752 if ((csr & APC_CSR_EIE) && (csr & APC_CSR_EI)) { 759 if ((csr & APC_CSR_PMIE) && (csr & APC_CSR_PMI)) { 774 if ((csr & APC_CSR_CIE) && (csr 801 u_int32_t csr; local 849 u_int32_t csr; local 1351 u_int32_t csr, togo; local 1424 u_int32_t csr, togo; local [all...] |
/freebsd-10.1-release/sys/arm/at91/ |
H A D | uart_dev_at91usart.c | 649 uint32_t csr; local 654 csr = RD4(&sc->sc_bas, USART_CSR); 656 if (csr & USART_CSR_OVRE) { 661 if (csr & USART_DCE_CHANGE_BITS) 664 if (csr & USART_CSR_ENDTX) { 669 if (csr & (USART_CSR_TXRDY | USART_CSR_ENDTX)) { 672 WR4(&sc->sc_bas, USART_IDR, csr & (USART_CSR_TXRDY | 683 if (csr & USART_CSR_RXBUFF) { 710 } else if (csr & USART_CSR_ENDRX) { 729 } else if (csr 803 uint32_t csr, new, old, sig; local [all...] |
H A D | at91_spi.c | 120 uint32_t csr; local 171 csr = SPI_CSR_CPOL | (4 << 16) | (0xff << 8); 172 WR4(sc, SPI_CSR0, csr); 173 WR4(sc, SPI_CSR1, csr); 174 WR4(sc, SPI_CSR2, csr); 175 WR4(sc, SPI_CSR3, csr);
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/freebsd-10.1-release/sys/arm/ti/ |
H A D | ti_sdma.c | 220 uint32_t csr; local 240 csr = ti_sdma_read_4(sc, DMA4_CSR(ch)); 241 if (csr == 0) { 255 if (csr & DMA4_CSR_DROP) 259 if (csr & DMA4_CSR_SECURE_ERR) 262 if (csr & DMA4_CSR_MISALIGNED_ADRS_ERR) 265 if (csr & DMA4_CSR_TRANS_ERR) { 282 channel->callback(ch, csr, channel->callback_data); 586 uint32_t csr; local 601 csr [all...] |
/freebsd-10.1-release/sys/dev/ieee488/ |
H A D | tnt4882.h | 61 csr = 0x17, enumerator in enum:tnt4882reg
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/freebsd-10.1-release/sys/dev/lmc/ |
H A D | if_lmc.h | 1218 # define READ_CSR(csr) bus_space_read_4 (sc->csr_tag, sc->csr_handle, csr) 1219 # define WRITE_CSR(csr, val) bus_space_write_4(sc->csr_tag, sc->csr_handle, csr, val) 1274 # define READ_CSR(csr) bus_space_read_4 (sc->csr_tag, sc->csr_handle, csr) 1275 # define WRITE_CSR(csr, val) bus_space_write_4(sc->csr_tag, sc->csr_handle, csr, val) 1303 # define READ_CSR(csr) bus_space_read_4 (sc->csr_tag, sc->csr_handle, csr) [all...] |
/freebsd-10.1-release/sys/dev/ppc/ |
H A D | ppc.c | 711 int csr = SMC66x_CSR; /* initial value is 0x3F0 */ local 716 #define cio csr+1 /* config IO port is either 0x3F1 or 0x371 */ 722 outb(csr, SMC665_iCODE); 723 outb(csr, SMC665_iCODE); 726 outb(csr, 0xd); 734 outb(csr, SMC666_iCODE); 735 outb(csr, SMC666_iCODE); 738 outb(csr, 0xd); 745 csr = SMC666_CSR; 753 outb(csr, [all...] |
/freebsd-10.1-release/sys/dev/de/ |
H A D | if_de.c | 1700 u_int32_t csr = TULIP_CSR_READ(sc, csr_gp); local 1701 if ((csr & (TULIP_GP_SMC_9332_OK10|TULIP_GP_SMC_9332_OK100)) == (TULIP_GP_SMC_9332_OK10|TULIP_GP_SMC_9332_OK100)) { 1704 } else if ((csr & TULIP_GP_SMC_9332_OK10) == 0) { 1802 u_int32_t csr = TULIP_CSR_READ(sc, csr_gp); local 1803 if ((csr & (TULIP_GP_ZX34X_LNKFAIL|TULIP_GP_ZX34X_SYMDET|TULIP_GP_ZX34X_SIGDET)) == (TULIP_GP_ZX34X_LNKFAIL|TULIP_GP_ZX34X_SYMDET|TULIP_GP_ZX34X_SIGDET)) { 1806 } else if ((csr & TULIP_GP_ZX34X_LNKFAIL) == 0) { 1863 #define EMIT do { TULIP_CSR_WRITE(sc, csr_srom_mii, csr); DELAY(1); } while (0) 1868 unsigned bit, csr; local 1870 csr = SROMSEL ; EMIT; 1871 csr 1899 unsigned lastbit, data, bits, bit, csr; local 1939 unsigned csr = TULIP_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK); local 1959 unsigned csr = TULIP_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK); local 1978 unsigned csr = TULIP_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK); local 1997 unsigned csr = TULIP_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK); local 2020 unsigned csr = TULIP_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK); local 2748 u_int32_t csr; local 3738 tulip_print_abnormal_interrupt(tulip_softc_t * const sc, u_int32_t csr) argument [all...] |
/freebsd-10.1-release/sys/dev/le/ |
H A D | if_le_ledma.c | 219 uint32_t aui_bit, csr; local 224 csr = L64854_GCSR(dma); 225 aui_bit = csr & E_TP_AUI; 238 csr = L64854_GCSR(dma); 239 csr |= (E_DSBL_WR_INVAL | aui_bit); 240 L64854_SCSR(dma, csr);
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/freebsd-10.1-release/sys/arm/xscale/i80321/ |
H A D | i80321_aau.c | 167 int csr; local 262 while ((csr = AAU_REG_READ(sc, 0x4)) & (1 << 10)); 264 if (csr & (1 << 5)) /* error */ 269 AAU_REG_WRITE(sc, 0x4, csr);
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/freebsd-10.1-release/sys/dev/oce/ |
H A D | oce_hw.c | 57 post_status.dw0 = OCE_READ_CSR_MPU(sc, csr, MPU_EP_SEMAPHORE(sc)); 62 OCE_WRITE_CSR_MPU(sc, csr, MPU_EP_SEMAPHORE(sc), post_status.dw0); 72 post_status.dw0 = OCE_READ_CSR_MPU(sc, csr, MPU_EP_SEMAPHORE(sc)); 458 ctrl.dw0 = OCE_READ_CSR_MPU(sc, csr, MPU_EP_CONTROL); 460 OCE_WRITE_CSR_MPU(sc, csr, MPU_EP_CONTROL, ctrl.dw0);
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