Searched refs:Rs (Results 1 - 12 of 12) sorted by relevance

/freebsd-10.1-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.h40 RegScavenger *Rs = NULL) const;
/freebsd-10.1-release/contrib/mdocml/
H A Dmdoc.h338 struct mdoc_rs Rs; member in union:mdoc_data
H A Dmdoc_term.c210 { termp_rs_pre, NULL }, /* Rs */
2223 * If we're in an `Rs' and there's a journal present, then quote
2227 n->parent->norm->Rs.quote_T)
2239 * If we're in an `Rs' and there's a journal present, then quote
2243 n->parent->norm->Rs.quote_T)
H A Dmdoc_validate.c224 { NULL, posts_text }, /* %B */ /* FIXME: can be used outside Rs/Re. */
232 { NULL, posts_text }, /* %T */ /* FIXME: can be used outside Rs/Re. */
267 { NULL, posts_rs }, /* Rs */
306 #define RSORD_MAX 14 /* Number of `Rs' blocks. */
1679 * the `Rs' body. Delete offending nodes and raise a warning.
1691 mdoc->last->norm->Rs.quote_T++;
1703 * inside the `Rs' body.
1710 * The full `Rs' block needs special handling to order the
/freebsd-10.1-release/contrib/llvm/lib/Target/ARM/
H A DARMCodeEmitter.cpp940 unsigned Rs = MO1.getReg(); local
941 if (Rs) {
974 // Encode the shift operation Rs or shift_imm (except rrx).
975 if (Rs) {
976 // Encode Rs bit[11:8].
978 return Binary | (II->getRegisterInfo().getEncodingValue(Rs) << ARMII::RegRsShift);
1335 // Encode Rs
/freebsd-10.1-release/contrib/binutils/gas/config/
H A Dtc-arm.c4211 (LSL|LSR|ASL|ASR|ROR) Rs
7214 UMULL RdLo, RdHi, Rm, Rs
7215 SMULL RdLo, RdHi, Rm, Rs
7216 UMLAL RdLo, RdHi, Rm, Rs
7217 SMLAL RdLo, RdHi, Rm, Rs. */
7411 if (inst.operands[2].isreg) /* Rd, {Rm,} Rs */
7435 SMLAxy{cond} Rd,Rm,Rs,Rn
7436 SMLAWy{cond} Rd,Rm,Rs,Rn
7449 SMLALxy{cond} Rdlo,Rdhi,Rm,Rs
7466 SMULxy{cond} Rd,Rm,Rs
8390 int Rd, Rs, Rn; local
8615 int Rd, Rs, Rn; local
8698 int Rd, Rs, Rn; local
10071 int Rd, Rs; local
[all...]
/freebsd-10.1-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp1173 // shifted. The second is Rs, the amount to shift by, and the third specifies
1179 // {11-8} = Rs
1192 unsigned Rs = MO1.getReg(); local
1193 if (Rs) {
1210 // Encode the shift operation Rs.
1211 // Encode Rs bit[11:8].
1213 return Binary | (CTX.getRegisterInfo()->getEncodingValue(Rs) << ARMII::RegRsShift);
/freebsd-10.1-release/contrib/openpam/misc/
H A Dgendoc.pl525 $mdoc .= ".Rs
637 .Rs
/freebsd-10.1-release/contrib/ntp/sntp/ag-tpl/0-old/
H A DMdoc.pm100 The C<CODE> is called after a Rs/Re block is done. With a hash reference as a
200 def_macro('.Rs', sub { () } );
/freebsd-10.1-release/contrib/ntp/sntp/ag-tpl/
H A DMdoc.pm127 The C<CODE> is called after a Rs/Re block is done. With a hash reference as a
227 def_macro('.Rs', sub { () } );
/freebsd-10.1-release/contrib/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1173 unsigned Rs = fieldFromInstruction(Val, 8, 4); local
1178 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rs, Address, Decoder)))
/freebsd-10.1-release/contrib/llvm/tools/lldb/source/Plugins/Instruction/ARM/
H A DEmulateInstructionARM.cpp9585 // d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); s = UInt(Rs);
9605 uint32_t Rs = ReadCoreReg (s, &success); local
9609 uint32_t shift_n = Bits32 (Rs, 7, 0);

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