/freebsd-10.0-release/contrib/gcc/ |
H A D | varray.h | 200 /* Grow/shrink the virtual array VA to N elements. */ 203 #define VARRAY_GROW(VA, N) ((VA) = varray_grow (VA, N)) 205 #define VARRAY_SIZE(VA) ((VA)->num_elements) 207 #define VARRAY_ACTIVE_SIZE(VA) ((VA)->elements_used) 208 #define VARRAY_POP_ALL(VA) ((VA) [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 198 CCValAssign &VA = RVLocs[i]; local 199 assert(VA.isRegLoc() && "Can only return in registers!"); 201 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), 206 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 261 CCValAssign &VA = RVLocs[i]; local 262 assert(VA.isRegLoc() && "Can only return in registers!"); 266 switch (VA.getLocInfo()) { 268 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); 271 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA 351 CCValAssign &VA = ArgLocs[i]; local 550 CCValAssign &VA = ArgLocs[i]; local 716 CCValAssign &VA = ArgLocs[i]; local 946 const CCValAssign &VA = ArgLocs[i]; local 1139 CCValAssign &VA = RVLocs[i]; local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/MBlaze/ |
H A D | MBlazeISelLowering.cpp | 729 CCValAssign &VA = ArgLocs[i]; local 730 MVT RegVT = VA.getLocVT(); 734 switch (VA.getLocInfo()) { 750 if (VA.isRegLoc()) { 751 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 754 assert(VA.isMemLoc()); 762 unsigned ArgSize = VA.getValVT().getSizeInBits()/8; 763 unsigned StackLoc = VA.getLocMemOffset() + 4; 901 CCValAssign &VA = ArgLocs[i]; local 904 if (VA 1046 CCValAssign &VA = RVLocs[i]; local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 335 CCValAssign &VA = ArgLocs[i]; local 336 if (VA.isRegLoc()) { 338 EVT RegVT = VA.getLocVT(); 350 RegInfo.addLiveIn(VA.getLocReg(), VReg); 356 if (VA.getLocInfo() == CCValAssign::SExt) 358 DAG.getValueType(VA.getValVT())); 359 else if (VA.getLocInfo() == CCValAssign::ZExt) 361 DAG.getValueType(VA.getValVT())); 363 if (VA.getLocInfo() != CCValAssign::Full) 364 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA 431 CCValAssign &VA = RVLocs[i]; local 487 CCValAssign &VA = ArgLocs[i]; local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 762 CCValAssign &VA = ValLocs[0]; 765 if (VA.getLocInfo() != CCValAssign::Full) 768 if (!VA.isRegLoc()) 773 if (VA.getLocReg() == X86::ST0 || VA.getLocReg() == X86::ST1) 776 unsigned SrcReg = Reg + VA.getValNo(); 778 EVT DstVT = VA.getValVT(); 802 unsigned DstReg = VA.getLocReg(); 811 RetRegs.push_back(VA.getLocReg()); 1925 CCValAssign &VA local [all...] |
H A D | X86ISelLowering.h | 769 const CCValAssign &VA, MachineFrameInfo *MFI, 773 const CCValAssign &VA,
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H A D | X86ISelLowering.cpp | 1614 CCValAssign &VA = RVLocs[i]; local 1615 assert(VA.isRegLoc() && "Can only return in registers!"); 1620 if (VA.getLocInfo() == CCValAssign::SExt) 1621 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), ValToCopy); 1622 else if (VA.getLocInfo() == CCValAssign::ZExt) 1623 ValToCopy = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), ValToCopy); 1624 else if (VA.getLocInfo() == CCValAssign::AExt) 1625 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ValToCopy); 1626 else if (VA.getLocInfo() == CCValAssign::BCvt) 1627 ValToCopy = DAG.getNode(ISD::BITCAST, dl, VA 1776 CCValAssign &VA = RVLocs[i]; local 1912 LowerMemArgument(SDValue Chain, CallingConv::ID CallConv, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc dl, SelectionDAG &DAG, const CCValAssign &VA, MachineFrameInfo *MFI, unsigned i) const argument 1992 CCValAssign &VA = ArgLocs[i]; local 2231 LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg, DebugLoc dl, SelectionDAG &DAG, const CCValAssign &VA, ISD::ArgFlagsTy Flags) const argument 2376 CCValAssign &VA = ArgLocs[i]; local 2507 CCValAssign &VA = ArgLocs[i]; local 2915 CCValAssign &VA = RVLocs[i]; local 2977 CCValAssign &VA = ArgLocs[i]; local 3006 CCValAssign &VA = ArgLocs[i]; local [all...] |
/freebsd-10.0-release/contrib/binutils/opcodes/ |
H A D | ppc-opc.c | 478 /* The VA field in a VA, VX or VXR form instruction. */ 479 #define VA UI + 1 482 /* The VB field in a VA, VX or VXR form instruction. */ 483 #define VB VA + 1 486 /* The VC field in a VA form instruction. */ 490 /* The VD or VS field in a VA, VX, VXR or X form instruction. */ 504 /* The SHB field in a VA form instruction. */ 1381 /* An VA form instruction. */ 1384 /* The mask for an VA for 477 #define VA macro [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 436 // Value is a value that has been passed to us in the location described by VA 437 // (and so has type VA.getLocVT()). Convert Value to VA.getValVT(), chaining 440 CCValAssign &VA, SDValue Chain, 444 if (VA.getLocInfo() == CCValAssign::SExt) 445 Value = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Value, 446 DAG.getValueType(VA.getValVT())); 447 else if (VA.getLocInfo() == CCValAssign::ZExt) 448 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value, 449 DAG.getValueType(VA 439 convertLocVTToValVT(SelectionDAG &DAG, DebugLoc DL, CCValAssign &VA, SDValue Chain, SDValue Value) argument 464 convertValVTToLocVT(SelectionDAG &DAG, DebugLoc DL, CCValAssign &VA, SDValue Value) argument 502 CCValAssign &VA = ArgLocs[I]; local 633 CCValAssign &VA = ArgLocs[I]; local 727 CCValAssign &VA = RetLocs[I]; local 765 CCValAssign &VA = RetLocs[I]; local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 917 CCValAssign &VA = ArgLocs[i]; local 928 VA.getLocMemOffset(), 934 } else if (VA.isRegLoc()) { 935 MVT RegVT = VA.getLocVT(); 937 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); 940 } else { // VA.isRegLoc() 941 assert(VA.isMemLoc()); 943 int FI = MFI->CreateFixedObject(VA.getLocVT().getSizeInBits()/8, 944 VA.getLocMemOffset(), true); 947 ArgValue = DAG.getLoad(VA 1043 CCValAssign &VA = RVLocs[i]; local 1163 CCValAssign &VA = ArgLocs[i]; local 1360 CCValAssign VA = RVLocs[i]; local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 322 CCValAssign &VA = RVLocs[i]; local 324 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag); 328 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 434 CCValAssign &VA = ArgLocs[i]; local 435 if (VA.isMemLoc()) { 458 CCValAssign &VA = ArgLocs[i]; local 463 switch (VA.getLocInfo()) { 470 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); 473 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA 843 CCValAssign &VA = ArgLocs[i]; local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 911 CCValAssign &VA = ArgLocs[i]; local 915 switch (VA.getLocInfo()) { 919 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); 922 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); 925 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); 931 if (VA.isRegLoc()) { 932 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 934 assert(VA.isMemLoc()); 936 int Offset = VA.getLocMemOffset(); 1085 CCValAssign &VA local 1212 CCValAssign &VA = RVLocs[i]; local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 1916 CCValAssign &VA = ArgLocs[i]; local 1917 MVT ArgVT = ArgVTs[VA.getValNo()]; 1924 if (VA.isRegLoc() && !VA.needsCustom()) { 1926 } else if (VA.needsCustom()) { 1928 if (VA.getLocVT() != MVT::f64 || 1930 !VA.isRegLoc() || !ArgLocs[++i].isRegLoc()) 1966 CCValAssign &VA = ArgLocs[i]; local 1967 unsigned Arg = ArgRegs[VA.getValNo()]; 1968 MVT ArgVT = ArgVTs[VA [all...] |
H A D | ARMISelLowering.h | 418 CCValAssign &VA, CCValAssign &NextVA, 422 SDValue GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA, 430 const CCValAssign &VA,
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H A D | ARMISelLowering.cpp | 1250 CCValAssign VA = RVLocs[i]; local 1255 assert(!VA.needsCustom() && VA.getLocVT() == MVT::i32 && 1262 if (VA.needsCustom()) { 1264 SDValue Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, 1268 VA = RVLocs[++i]; // skip ahead to next loc 1269 SDValue Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, 1275 if (VA.getLocVT() == MVT::v2f64) { 1280 VA = RVLocs[++i]; // skip ahead to next loc 1281 Lo = DAG.getCopyFromReg(Chain, dl, VA 1315 LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg, DebugLoc dl, SelectionDAG &DAG, const CCValAssign &VA, ISD::ArgFlagsTy Flags) const argument 1328 PassF64ArgInRegs(DebugLoc dl, SelectionDAG &DAG, SDValue Chain, SDValue &Arg, RegsToPassVector &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, SDValue &StackPtr, SmallVector<SDValue, 8> &MemOpChains, ISD::ArgFlagsTy Flags) const argument 1421 CCValAssign &VA = ArgLocs[i]; local 1973 CCValAssign &VA = ArgLocs[i]; local 2043 CCValAssign &VA = RVLocs[i]; local 2596 GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA, SDValue &Root, SelectionDAG &DAG, DebugLoc dl) const argument 2797 CCValAssign &VA = ArgLocs[i]; local [all...] |
/freebsd-10.0-release/contrib/llvm/tools/clang/lib/Analysis/ |
H A D | LiveVariables.cpp | 308 for (const VariableArrayType* VA = FindVA(VD->getType()); 309 VA != 0; VA = FindVA(VA->getElementType())) { 310 AddLiveStmt(val.liveStmts, LV.SSetFact, VA->getSizeExpr());
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H A D | CFG.cpp | 1713 for (const VariableArrayType* VA = FindVA(VD->getType().getTypePtr()); 1714 VA != 0; VA = FindVA(VA->getElementType().getTypePtr())) { 1715 if (CFGBlock *newBlock = addStmt(VA->getSizeExpr())) 2592 for (const VariableArrayType *VA =FindVA(E->getArgumentType().getTypePtr()); 2593 VA != 0; VA = FindVA(VA->getElementType().getTypePtr())) 2594 lastBlock = addStmt(VA [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 2303 CCValAssign &VA = ArgLocs[i]; local 2304 MVT ValVT = VA.getValVT(), LocVT = VA.getLocVT(); 2321 switch (VA.getLocInfo()) { 2324 if (VA.isRegLoc()) { 2336 unsigned LocRegLo = VA.getLocReg(); 2357 if (VA.isRegLoc()) { 2358 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 2363 assert(VA.isMemLoc()); 2367 MemOpChains.push_back(passArgOnStack(StackPtr, VA 2510 CCValAssign &VA = ArgLocs[i]; local 2668 CCValAssign &VA = RVLocs[i]; local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/R600/ |
H A D | SIISelLowering.cpp | 164 CCValAssign &VA = ArgLocs[ArgIdx++]; local 165 assert(VA.isRegLoc() && "Parameter must be in a register!"); 167 unsigned Reg = VA.getLocReg(); 168 MVT VT = VA.getLocVT();
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/freebsd-10.0-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 2009 CCValAssign &VA = ArgLocs[i]; local 2012 if (VA.isRegLoc()) { 2014 EVT ValVT = VA.getValVT(); 2037 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); 2043 assert(VA.isMemLoc()); 2045 unsigned ArgSize = VA.getLocVT().getSizeInBits() / 8; 2046 int FI = MFI->CreateFixedObject(ArgSize, VA.getLocMemOffset(), 2051 InVals.push_back(DAG.getLoad(VA.getValVT(), dl, Chain, FIN, 3376 CCValAssign &VA = RVLocs[i]; local 3377 assert(VA 3654 CCValAssign &VA = ArgLocs[i]; local 4517 CCValAssign &VA = RVLocs[i]; local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombinePHI.cpp | 880 Value *VA = PN.getIncomingValue(i); local 886 PN.setIncomingValue(j, VA);
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/freebsd-10.0-release/usr.bin/calendar/calendars/ |
H A D | calendar.birthday | 31 01/21 Thomas Jonathan "Stonewall" Jackson born in Clarksburg, VA, 1824
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/freebsd-10.0-release/sys/dev/hptrr/ |
H A D | amd64-elf.hptrr_lib.o.uu | 83 M\;H`````A,D/A=<#``#VA?X````!=0:`?0``>0.`"PCVA:T````$="#'0P@! 201 M`+D`````B>I$B>9,B??H`````(7`#X2S````BT,P28M6$`^VA`((`0``B`4` 247 M55-(@\2`2(M',$B+:"@/MA#&!"0`QD0D`0&)T,#H`@^VP`^VA"C`,P``B$0D 267 M"XE$)`@/MD,*B00D2,?'`````+@`````Z`````"`.P!T'T'VA"2I`````G04 310 M?"0,`'0800^VA"2I````@^`"/`$9P(/@$(/`).L600^VA"2I````@^`"/`$9 314 M0`````!,B60D2$'VA"2I`````@^4P`^VP(E$)"A)C74(2(L\)$B!QU@S``#H 448 M`(@%`````(@!#[:$-P@!``"(!0````!F#[;`9HE!`@^VA#<,`0``B`4````` 583 M0P^VA"4<`0``B`4`````QT-$`0```$/'1"4H`0```$B+'"1,BV0D"$R+;"00 596 M3(GOZ`````!%BW4P1(GP0@^VA"`<` [all...] |
/freebsd-10.0-release/sys/dev/hptmv/ |
H A D | i386-elf.raid.o.uu | 48 MB4=(BE=>@\H!B%=>9@^VA?S]__^#X`'1X(/B_0G"B%=>9HN%_OW__V:)1V"+ 330 M`````(/$"#N=S/[__P^-<@$```^VA)WI_O__B<'!X0D/MH2=ZO[__XG&P>8) 333 MB[7<_O__`T26!%#H_/___X/$$.LJC78`5O^UY/[___^UX/[__P^VA=/^__^+ 336 MA=C^__^[`````(/$"#N=S/[__WUB#[:$G>G^__^)P<'A"0^VA)WJ_O__B<;! 341 M`````(/$"#NUV/[__WU=D`^VA+7I_O__P>`)#[:,M>K^___!X0D/MIRUZ/[_ 347 MF/[__P^VA)7I_O__B<?!YPD/MH25ZO[__\'@"8F%H/[__XJ,E>C^__^(C9_^ 486 M__^Z`````(,X`'43@W@$`'4-@W@(`'4'@W@,`'0&D+H!````A=)T0P^VA:_^ 527 M``")\(A'!P^VA:_^___!X`2+50R-A!#8!P``N@````"#.`!U$H-X!`!U#(-X 1276 M26YS97)T`')E<V5T161M84-H86YN96P`9FQU<VA$;6%1=65U90!R979E<G13
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/freebsd-10.0-release/contrib/llvm/tools/clang/lib/Sema/ |
H A D | SemaDecl.cpp | 1979 else if (VisibilityAttr *VA = dyn_cast<VisibilityAttr>(Attr)) 1980 NewAttr = S.mergeVisibilityAttr(D, VA->getRange(), VA->getVisibility(), 1982 else if (TypeVisibilityAttr *VA = dyn_cast<TypeVisibilityAttr>(Attr)) 1983 NewAttr = S.mergeTypeVisibilityAttr(D, VA->getRange(), VA->getVisibility(),
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