Searched refs:MEMC_DRAMTIM25_INIT (Results 1 - 2 of 2) sorted by relevance

/broadcom-cfe-1.4.2/cfe/arch/mips/chipset/bcmsb/include/
H A Dsbmemc.h133 #define MEMC_DRAMTIM25_INIT 0x000754d9 /* CL = 2.5 */ macro
/broadcom-cfe-1.4.2/cfe/arch/mips/chipset/bcmsb/src/
H A Dsbmemc.S406 li a1,MEMC_DRAMTIM25_INIT # Assume CAS latency of 2.5

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