/broadcom-cfe-1.4.2/build/broadcom/bcm95836cpci/ |
H A D | Makefile | 12 CPU = bcmcore macro
|
/broadcom-cfe-1.4.2/build/broadcom/mousse/ |
H A D | Makefile | 14 CPU = mpc8240 macro
|
/broadcom-cfe-1.4.2/build/broadcom/bcm98245cpci/ |
H A D | Makefile | 15 CPU = mpc8245 macro
|
/broadcom-cfe-1.4.2/build/broadcom/tiny/ |
H A D | Makefile | 12 CPU = sb1250 macro
|
/broadcom-cfe-1.4.2/build/broadcom/vcs/ |
H A D | Makefile | 12 CPU = sb1250 macro 24 # for running in the functional simulator (mostly changes CPU speed to
|
/broadcom-cfe-1.4.2/build/broadcom/vcs1280/ |
H A D | Makefile | 12 CPU = bcm1480 macro 24 # for running in the functional simulator (mostly changes CPU speed to
|
/broadcom-cfe-1.4.2/cfe/arch/mips/chipset/sibyte/src/ |
H A D | Makefile | 30 ifeq ($(strip ${CPU}), bcm1480) 36 ui_soccmds.o : ${CHIPSET_SRC}/ui_soccmds.c ${CPU}_socregs.inc
|
/broadcom-cfe-1.4.2/cfe/arch/mips/common/src/ |
H A D | Makefile | 51 ./makereg $< $@ ${CPU}_regs.h 55 vapi.o : ${TOP}/verif/vapi.S ${CPU}_socregs.inc
|
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/sb1250/src/ |
H A D | sb1250_altcpu.S | 4 * CPU init module File: sb1250_altcpu.S 183 * Don't do this if we have only one CPU. This way we can 193 dsrl t0,8 # isolate CPU part of number 195 bgt t0,1,1f # Keep going if more than one CPU 210 * Let the secondary CPU(s) out of reset 223 * Wait for the other CPU to ring our doorbell 267 * Don't do this if we have only one CPU. 273 dsrl t0,8 # isolate CPU part of number 275 bgt t0,1,1f # Keep going if more than one CPU 280 * Let secondary CPU( [all...] |
/broadcom-cfe-1.4.2/build/broadcom/sim/ |
H A D | Makefile | 19 CPU = sb1250 macro 38 # in the functional simulator (mostly changes CPU speed to
|
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcm1480/src/ |
H A D | bcm1480_altcpu.S | 4 * CPU init module File: bcm1480_altcpu.S 87 * Do this by reading CPU disables from system_cfg, 125 * by the owning CPU and only the snoop traffic should show up 232 * none if we have only one CPU. This way we can 241 * Main loop, CPU number is in v0. 260 * Let the secondary CPU(s) out of reset 272 # CPU[v0] is now running 275 * Wait for the other CPU to ring our doorbell 329 * Main loop, CPU number is in v0. 334 * Let secondary CPU( [all...] |
/broadcom-cfe-1.4.2/build/broadcom/bcm1250cpci/ |
H A D | Makefile | 15 CPU = sb1250 macro 32 # for running in the functional simulator (mostly changes CPU speed to
|
/broadcom-cfe-1.4.2/build/broadcom/bcm91125cpci/ |
H A D | Makefile | 14 CPU = sb1250 macro
|
/broadcom-cfe-1.4.2/build/broadcom/bcm91125e/ |
H A D | Makefile | 12 CPU = sb1250 macro
|
/broadcom-cfe-1.4.2/build/broadcom/bcm91125f/ |
H A D | Makefile | 15 CPU = sb1250 macro
|
/broadcom-cfe-1.4.2/build/broadcom/bcm91125pcix/ |
H A D | Makefile | 12 CPU = sb1250 macro
|
/broadcom-cfe-1.4.2/build/broadcom/bcm91280e/ |
H A D | Makefile | 15 CPU = bcm1480 macro
|
/broadcom-cfe-1.4.2/build/broadcom/bcm91480a/ |
H A D | Makefile | 15 CPU = bcm1480 macro
|
/broadcom-cfe-1.4.2/build/broadcom/bcm91480b/ |
H A D | Makefile | 14 CPU = bcm1480 macro
|
/broadcom-cfe-1.4.2/build/broadcom/bcm91480ht/ |
H A D | Makefile | 15 CPU = bcm1480 macro
|
/broadcom-cfe-1.4.2/build/broadcom/lausanne/ |
H A D | Makefile | 13 CPU = sb1250 macro
|
/broadcom-cfe-1.4.2/build/broadcom/sentosa/ |
H A D | Makefile | 14 CPU = sb1250 macro
|
/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91280e/src/ |
H A D | bcm91280e_init.S | 275 # enabled (to model 2-CPU parts on boards w/ more than two CPUs), 294 # disable CPU 3. 303 # disable CPU 2.
|
/broadcom-cfe-1.4.2/build/broadcom/swarm/ |
H A D | Makefile | 19 CPU = sb1250 macro
|
/broadcom-cfe-1.4.2/cfe/main/ |
H A D | cfe.mk | 70 CPU_SRC = ${ARCH_TOP}/cpu/${CPU}/src 71 CPU_INC = ${ARCH_TOP}/cpu/${CPU}/include 330 $(HOST_CC) $(HOST_CFLAGS) -o memconfig -D_MCSTANDALONE_ -D_MCSTANDALONE_NOISY_ -I${TOP}/arch/mips/chipset/sibyte/include -I${TOP}/arch/mips/cpu/sb1250/include -I${TOP}/include ${TOP}/hosttools/memconfig.c ${TOP}/arch/${ARCH}/cpu/${CPU}/src/sb1250_draminit.c 333 $(HOST_CC) $(HOST_CFLAGS) -o memconfig1480 -D_MCSTANDALONE_ -D_MCSTANDALONE_NOISY_ -I${TOP}/arch/mips/chipset/sibyte/include -I${TOP}/arch/mips/cpu/bcm1480/include -I${TOP}/include ${TOP}/hosttools/memconfig1480.c ${TOP}/arch/${ARCH}/cpu/${CPU}/src/bcm1480_draminit.c
|