Searched refs:mask (Results 51 - 75 of 447) sorted by relevance

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/haiku/src/add-ons/kernel/file_systems/nfs4/
H A DRequestInterpreter.cpp49 uint32 mask = 0; local
52 mask |= CallbackAttrChange;
54 mask |= CallbackAttrSize;
56 *_mask = mask;
H A DReplyBuilder.h25 status_t GetAttr(status_t status, int mask,
H A DRequestInterpreter.h27 status_t GetAttr(FileHandle* handle, int* mask);
/haiku/headers/posix/net/
H A Droute.h28 struct sockaddr *mask; member in struct:route_entry
/haiku/src/servers/app/drawing/
H A DAlphaMaskCache.h31 status_t Put(ShapeAlphaMask* mask);
39 size_t _FindUncachedPreviousMasks(AlphaMask* mask,
46 ShapeAlphaMask* mask, AlphaMask* previousMask,
51 fMask(mask),
45 ShapeMaskElement(const shape_data* shape, ShapeAlphaMask* mask, AlphaMask* previousMask, bool inverse) argument
/haiku/src/add-ons/media/media-add-ons/radeon/
H A DCapture.cpp310 int mask; local
312 if (fRadeon.WaitInterrupt(&mask, sequence, when, timeout) == B_OK) {
314 int mask = fRadeon.Register(C_RADEON_CAP_INT_STATUS);
323 ((mask & C_RADEON_CAP0_BUF0_INT) != 0 ? C_RADEON_CAPTURE_BUF0_INT : 0) |
324 ((mask & C_RADEON_CAP0_BUF1_INT) != 0 ? C_RADEON_CAPTURE_BUF1_INT : 0) |
325 ((mask & C_RADEON_CAP0_BUF0_EVEN_INT) != 0 ? C_RADEON_CAPTURE_BUF0_EVEN_INT : 0) |
326 ((mask & C_RADEON_CAP0_BUF1_EVEN_INT) != 0 ? C_RADEON_CAPTURE_BUF1_EVEN_INT : 0) |
327 ((mask & C_RADEON_CAP0_VBI0_INT) != 0 ? C_RADEON_CAPTURE_VBI0_INT : 0) |
328 ((mask & C_RADEON_CAP0_VBI1_INT) != 0 ? C_RADEON_CAPTURE_VBI1_INT : 0);
333 int CCapture::Register(radeon_register index, int mask) argument
343 SetRegister(radeon_register index, int mask, int value) argument
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/haiku/src/bin/pcmcia-cs/
H A Ddump_cisreg.c201 static void dump_all(int fd, int fn, int mfc, u_int mask) argument
204 if (mask & PRESENT_OPTION) {
208 if (mask & PRESENT_STATUS)
210 if (mask & PRESENT_PIN_REPLACE)
212 if (mask & PRESENT_COPY)
214 if (mask & PRESENT_EXT_STATUS)
216 if (mask & PRESENT_IOBASE_0) {
221 if (mask & PRESENT_IOSIZE)
223 if (mask == 0)
236 u_int mask; local
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/haiku/src/add-ons/kernel/cpu/x86/
H A Dgeneric_x86.cpp74 uint64 mask = length - 1; local
75 mask = ~mask & gPhysicalMask;
77 TRACE("MTRR %lu: new mask %Lx\n", index, mask);
78 TRACE(" mask test base: %Lx\n", mask & base);
79 TRACE(" mask test middle: %Lx\n", mask & (base + length / 2));
80 TRACE(" mask tes
161 uint64 mask = x86_read_msr(IA32_MSR_MTRR_PHYSICAL_MASK_0 + index * 2); local
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/haiku/src/add-ons/kernel/network/stack/
H A Dradix.h49 char rn_bmask; /* node: mask for bit test*/
86 uint8 *rmu_mask; /* the mask */
102 (void *v, void *mask,
105 (void *v, void *mask,
108 (void *v, void *mask, struct radix_node_head *head);
110 (void *v, void *mask, struct radix_node_head *head);
114 (void *v, void *mask, struct radix_node_head *head);
/haiku/src/servers/app/drawing/Painter/
H A Dagg_clipped_alpha_mask.h8 * offset the mask, and has a controllable value for the area outside it.
59 const int8u* mask = m_rbuf->row_ptr(y) + x * Step + Offset; local
62 *covers = (cover_type)((cover_full + (*covers) * (*mask))
65 mask += Step;
79 const int8u* mask = m_rbuf->row_ptr(y) + x * Step + Offset; local
80 memcpy(covers, mask, count);
/haiku/src/system/libroot/posix/sys/
H A Dutimes.c61 uint32 mask = 0; local
75 mask |= B_STAT_ACCESS_TIME;
87 mask |= B_STAT_MODIFICATION_TIME;
97 mask |= B_STAT_ACCESS_TIME | B_STAT_MODIFICATION_TIME;
102 &stat, sizeof(struct stat), mask);
/haiku/src/add-ons/kernel/network/protocols/ipv4/
H A Dipv4_address.cpp28 If a \a mask is given it is applied to \a from (such that \a to is the
29 result of \a from & \a mask).
32 \return B_BAD_VALUE if any of \a from or \a mask refers to an uninitialized
38 bool replaceWithZeros = false, const sockaddr *mask = NULL)
51 if (from->sa_len == 0 || (mask != NULL && mask->sa_len == 0))
62 if (mask != NULL) {
64 &= ((const sockaddr_in *)mask)->sin_addr.s_addr;
71 /*! Routing utility function: applies \a mask to given \a address and puts
73 \return B_OK if the mask ha
78 ipv4_mask_address(const sockaddr *address, const sockaddr *mask, sockaddr *result) argument
182 ipv4_equal_masked_addresses(const sockaddr *a, const sockaddr *b, const sockaddr *mask) argument
418 const sockaddr_in *mask = (const sockaddr_in *)_mask; local
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/haiku/src/libs/compat/freebsd_network/compat/machine/x86_64/
H A Dcpufunc.h63 bsfl(u_int mask) argument
67 __asm __volatile("bsfl %1,%0" : "=r" (result) : "rm" (mask));
72 bsfq(u_long mask) argument
76 __asm __volatile("bsfq %1,%0" : "=r" (result) : "rm" (mask));
81 bsrl(u_int mask) argument
85 __asm __volatile("bsrl %1,%0" : "=r" (result) : "rm" (mask));
90 bsrq(u_long mask) argument
94 __asm __volatile("bsrq %1,%0" : "=r" (result) : "rm" (mask));
155 ffsl(long mask) argument
157 return (mask
163 ffsll(long long mask) argument
171 fls(int mask) argument
179 flsl(long mask) argument
187 flsll(long long mask) argument
303 popcntq(u_long mask) argument
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/haiku/src/system/libroot/posix/musl/search/
H A Dhsearch.c21 size_t mask; member in struct:__tab
55 ENTRY *oldend = htab->__tab->entries + htab->__tab->mask + 1;
65 htab->__tab->mask = newsize - 1;
71 newe = htab->__tab->entries + (i & htab->__tab->mask);
97 e = htab->__tab->entries + (i & htab->__tab->mask);
150 if (++htab->__tab->used > htab->__tab->mask - htab->__tab->mask/4) {
/haiku/src/add-ons/accelerants/skeleton/engine/
H A Dbes.c411 /* setup BES memory-range mask */
676 ow->red.mask, ow->green.mask, ow->blue.mask, ow->alpha.mask));
750 ((ow->blue.value & ow->blue.mask) << 0) |
751 ((ow->green.value & ow->green.mask) << 5) |
752 ((ow->red.value & ow->red.mask) << 10) |
753 ((ow->alpha.value & ow->alpha.mask) << 15)
758 ((ow->blue.value & ow->blue.mask) <<
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/haiku/src/add-ons/accelerants/nvidia/engine/
H A Dnv_bes.c411 /* setup BES memory-range mask */
679 ow->red.mask, ow->green.mask, ow->blue.mask, ow->alpha.mask));
755 ((ow->blue.value & ow->blue.mask) << 0) |
756 ((ow->green.value & ow->green.mask) << 5) |
757 ((ow->red.value & ow->red.mask) << 10) |
758 ((ow->alpha.value & ow->alpha.mask) << 15)
763 ((ow->blue.value & ow->blue.mask) <<
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/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300_interrupts.c503 u_int32_t mask, mask2, msi_mask = 0; local
561 mask = ints & HAL_INT_COMMON;
567 mask |= AR_IMR_TXMINTR | AR_IMR_TXINTM;
569 mask |= AR_IMR_TXOK;
573 mask |= AR_IMR_TXERR;
576 mask |= AR_IMR_TXEOL;
580 mask |= AR_IMR_RXERR | AR_IMR_RXOK_HP;
582 mask &= ~(AR_IMR_RXOK_LP);
583 mask |= AR_IMR_RXMINTR | AR_IMR_RXINTM;
585 mask |
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/haiku/src/add-ons/kernel/network/protocols/ipv6/
H A Dipv6_address.cpp31 ipv6_mask_adress_inplace(sockaddr *address, const sockaddr *mask) argument
34 const in6_addr &i6mask = ((const sockaddr_in6 *)mask)->sin6_addr;
45 If a \a mask is given it is applied to \a from (such that \a to is the
46 result of \a from & \a mask).
49 \return B_BAD_VALUE if any of \a from or \a mask refers to an uninitialized
55 bool replaceWithZeros = false, const sockaddr *mask = NULL)
68 if (from->sa_len == 0 || (mask != NULL && mask->sa_len == 0))
79 if (mask != NULL)
80 ipv6_mask_adress_inplace(*to, mask);
93 ipv6_mask_address(const sockaddr *address, const sockaddr *mask, sockaddr *result) argument
200 ipv6_equal_masked_addresses(const sockaddr *a, const sockaddr *b, const sockaddr *mask) argument
464 sockaddr_in6 *mask = (sockaddr_in6 *)_mask; local
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/haiku/src/add-ons/accelerants/radeon/
H A Ddpms.c200 uint32 mask = ~(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS | RADEON_CRTC_HSYNC_DIS); local
204 OUTREGP( regs, RADEON_CRTC_EXT_CNTL, 0, mask );
208 (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS), mask );
212 (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS), mask );
216 (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS | RADEON_CRTC_HSYNC_DIS), mask );
242 int mask = ~(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS); local
246 OUTREGP( regs, RADEON_CRTC2_GEN_CNTL, 0, mask );
249 OUTREGP( regs, RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS), mask );
252 OUTREGP( regs, RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS), mask);
256 (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS), mask);
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/haiku/src/add-ons/accelerants/s3/
H A Dregister_io.cpp146 void WriteCrtcReg(uint8 index, uint8 value, uint8 mask) argument
148 // Write a value to a CRTC reg using a mask. The mask selects the
153 WritePIO_8(0x3d5, (ReadPIO_8(0x3d5) & ~mask) | (value & mask));
156 OUTREG8(0x83d5, (INREG8(0x83d5) & ~mask) | (value & mask));
188 void WriteSeqReg(uint8 index, uint8 value, uint8 mask) argument
190 // Write a value to a Sequencer reg using a mask. The mask select
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/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5416/
H A Dar5416_gpio.c212 uint32_t val, mask; local
224 mask = MS(OS_REG_READ(ah, AR_INTR_ASYNC_MASK),
227 AR_INTR_ASYNC_MASK_GPIO, mask);
235 mask = MS(OS_REG_READ(ah, AR_INTR_SYNC_MASK),
238 AR_INTR_SYNC_MASK_GPIO, mask);
257 /* Change the interrupt mask. */
263 mask = MS(OS_REG_READ(ah, AR_INTR_ASYNC_MASK),
266 AR_INTR_ASYNC_MASK_GPIO, mask);
274 mask = MS(OS_REG_READ(ah, AR_INTR_SYNC_MASK),
277 AR_INTR_SYNC_MASK_GPIO, mask);
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/haiku/src/add-ons/kernel/drivers/network/ether/intel22x/dev/igc/
H A Digc_base.c23 u16 mask = IGC_SWFW_PHY0_SM; local
28 mask = IGC_SWFW_PHY1_SM;
30 return hw->mac.ops.acquire_swfw_sync(hw, mask);
41 u16 mask = IGC_SWFW_PHY0_SM; local
46 mask = IGC_SWFW_PHY1_SM;
48 hw->mac.ops.release_swfw_sync(hw, mask);
/haiku/src/bin/listusb/
H A Dusb_audio.cpp43 uint32 mask; member in struct:_Entry
74 uint32 mask = aClusters[i].mask & wChannelConfig; local
75 if (mask != 0) {
78 if ((aChannels[j].mask & mask) != 0)
275 int mask = 1; local
277 i < sizeof(BMAControls) / sizeof(BMAControls[0]); i++, mask <<= 1)
278 if (bma & mask)
514 uint16 mask local
543 uint8 mask = 0x30; // bits 4 and 5 local
591 uint8 mask = 1; local
700 uint8 mask = 1; local
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/haiku/headers/private/kernel/arch/arm64/
H A Darch_cpu.h89 #define CPU_MATCH(mask, impl, part, var, rev) \
90 (((mask) & PCPU_GET(midr)) == \
91 ((mask) & CPU_ID_RAW((impl), (part), (var), (rev))))
93 #define CPU_MATCH_RAW(mask, devid) \
94 (((mask) & PCPU_GET(midr)) == ((mask) & (devid)))
/haiku/src/add-ons/kernel/busses/pci/designware/
H A DMsiInterruptCtrlDW.cpp33 fDbiRegs->msiIntr[0].mask = 0xffffffff;
65 fDbiRegs->msiIntr[0].mask &= ~(1 << i);
83 fDbiRegs->msiIntr[0].mask |= (1 << (uint32)irq);

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