Searched defs:rst (Results 1 - 10 of 10) sorted by relevance

/freebsd-10-stable/contrib/tcsh/
H A Ded.init.c145 ed_Setup(int rst) argument
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/freebsd-10-stable/sys/contrib/octeon-sdk/
H A Dcvmip.h107 uint32_t rst :1; member in struct:__anon7094
145 uint32_t rst :1; member in struct:__anon7095::__anon7099
H A Dcvmx-pip-defs.h4463 uint64_t rst : 1; /**< Soft Reset */ member in struct:cvmx_pip_sft_rst::cvmx_pip_sft_rst_s
H A Dcvmx-ciu-defs.h3501 uint64_t rst : 1; /**< MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_s
3663 uint64_t rst : 1; /**< MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cn61xx
3734 uint64_t rst : 1; /**< MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cn63xx
3806 uint64_t rst : 1; /**< MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cn66xx
3885 uint64_t rst : 1; /**< MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cnf71xx
3962 uint64_t rst : 1; /**< Write 1 to clear MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_s
4086 uint64_t rst : 1; /**< Write 1 to clear MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cn61xx
4159 uint64_t rst : 1; /**< Write 1 to clear MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cn63xx
4233 uint64_t rst : 1; /**< Write 1 to clear MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cn66xx
4314 uint64_t rst : 1; /**< Write 1 to clear MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cnf71xx
4392 uint64_t rst : 1; /**< Write 1 to set MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_s
4516 uint64_t rst : 1; /**< Write 1 to set MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cn61xx
4589 uint64_t rst : 1; /**< Write 1 to set MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cn63xx
4663 uint64_t rst : 1; /**< Write 1 to set MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cn66xx
4744 uint64_t rst : 1; /**< Write 1 to set MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cnf71xx
5929 uint64_t rst : 1; /**< MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_s
6079 uint64_t rst : 1; /**< MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cn61xx
6150 uint64_t rst : 1; /**< MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cn63xx
6222 uint64_t rst : 1; /**< MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cn66xx
6301 uint64_t rst : 1; /**< MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cnf71xx
6378 uint64_t rst : 1; /**< Write 1 to clear MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_s
6502 uint64_t rst : 1; /**< Write 1 to clear MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cn61xx
6575 uint64_t rst : 1; /**< Write 1 to clear MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cn63xx
6649 uint64_t rst : 1; /**< Write 1 to clear MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cn66xx
6730 uint64_t rst : 1; /**< Write 1 to clear MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cnf71xx
6808 uint64_t rst : 1; /**< Write 1 to set MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_s
6932 uint64_t rst : 1; /**< Write 1 to set MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cn61xx
7005 uint64_t rst : 1; /**< Write 1 to set MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cn63xx
7079 uint64_t rst : 1; /**< Write 1 to set MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cn66xx
7160 uint64_t rst : 1; /**< Write 1 to set MIO RST interrupt enable */ member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cnf71xx
9110 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_s
9301 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cn61xx
9396 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cn63xx
9497 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cn66xx
9608 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cnf71xx
10061 uint64_t rst : 31; /**< PP Rst for PP's 3-1 */ member in struct:cvmx_ciu_pp_rst::cvmx_ciu_pp_rst_s
10083 uint64_t rst : 1; /**< PP Rst for PP1 */ member in struct:cvmx_ciu_pp_rst::cvmx_ciu_pp_rst_cn31xx
10095 uint64_t rst : 15; /**< PP Rst for PP's 15-1 */ member in struct:cvmx_ciu_pp_rst::cvmx_ciu_pp_rst_cn38xx
10109 uint64_t rst : 3; /**< PP Rst for PP's 11-1 */ member in struct:cvmx_ciu_pp_rst::cvmx_ciu_pp_rst_cn52xx
10122 uint64_t rst : 11; /**< PP Rst for PP's 11-1 */ member in struct:cvmx_ciu_pp_rst::cvmx_ciu_pp_rst_cn56xx
10138 uint64_t rst : 5; /**< PP Rst for PP's 5-1 */ member in struct:cvmx_ciu_pp_rst::cvmx_ciu_pp_rst_cn63xx
10151 uint64_t rst : 9; /**< PP Rst for PP's 9-1 */ member in struct:cvmx_ciu_pp_rst::cvmx_ciu_pp_rst_cn66xx
11000 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_sum1_iox_int::cvmx_ciu_sum1_iox_int_s
11116 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_sum1_iox_int::cvmx_ciu_sum1_iox_int_cn61xx
11216 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_sum1_iox_int::cvmx_ciu_sum1_iox_int_cn66xx
11327 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_sum1_iox_int::cvmx_ciu_sum1_iox_int_cnf71xx
11430 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_sum1_ppx_ip2::cvmx_ciu_sum1_ppx_ip2_s
11546 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_sum1_ppx_ip2::cvmx_ciu_sum1_ppx_ip2_cn61xx
11646 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_sum1_ppx_ip2::cvmx_ciu_sum1_ppx_ip2_cn66xx
11757 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_sum1_ppx_ip2::cvmx_ciu_sum1_ppx_ip2_cnf71xx
11860 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_sum1_ppx_ip3::cvmx_ciu_sum1_ppx_ip3_s
11976 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_sum1_ppx_ip3::cvmx_ciu_sum1_ppx_ip3_cn61xx
12076 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_sum1_ppx_ip3::cvmx_ciu_sum1_ppx_ip3_cn66xx
12187 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_sum1_ppx_ip3::cvmx_ciu_sum1_ppx_ip3_cnf71xx
12290 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_sum1_ppx_ip4::cvmx_ciu_sum1_ppx_ip4_s
12406 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_sum1_ppx_ip4::cvmx_ciu_sum1_ppx_ip4_cn61xx
12506 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_sum1_ppx_ip4::cvmx_ciu_sum1_ppx_ip4_cn66xx
12617 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu_sum1_ppx_ip4::cvmx_ciu_sum1_ppx_ip4_cnf71xx
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H A Dcvmx-ciu2-defs.h2551 uint64_t rst : 1; /**< MIO RST interrupt-enable */ member in struct:cvmx_ciu2_en_iox_int_mio::cvmx_ciu2_en_iox_int_mio_s
2608 uint64_t rst : 1; /**< Write 1 to clear CIU2_EN_xx_yy_MIO[RST] */ member in struct:cvmx_ciu2_en_iox_int_mio_w1c::cvmx_ciu2_en_iox_int_mio_w1c_s
2665 uint64_t rst : 1; /**< Write 1 to enable CIU2_EN_xx_yy_MIO[RST] */ member in struct:cvmx_ciu2_en_iox_int_mio_w1s::cvmx_ciu2_en_iox_int_mio_w1s_s
3655 uint64_t rst : 1; /**< MIO RST interrupt-enable */ member in struct:cvmx_ciu2_en_ppx_ip2_mio::cvmx_ciu2_en_ppx_ip2_mio_s
3712 uint64_t rst : 1; /**< Write 1 to clear CIU2_EN_xx_yy_MIO[RST] */ member in struct:cvmx_ciu2_en_ppx_ip2_mio_w1c::cvmx_ciu2_en_ppx_ip2_mio_w1c_s
3769 uint64_t rst : 1; /**< Write 1 to enable CIU2_EN_xx_yy_MIO[RST] */ member in struct:cvmx_ciu2_en_ppx_ip2_mio_w1s::cvmx_ciu2_en_ppx_ip2_mio_w1s_s
4759 uint64_t rst : 1; /**< MIO RST interrupt-enable */ member in struct:cvmx_ciu2_en_ppx_ip3_mio::cvmx_ciu2_en_ppx_ip3_mio_s
4816 uint64_t rst : 1; /**< Write 1 to clear CIU2_EN_xx_yy_MIO[RST] */ member in struct:cvmx_ciu2_en_ppx_ip3_mio_w1c::cvmx_ciu2_en_ppx_ip3_mio_w1c_s
4873 uint64_t rst : 1; /**< Write 1 to enable CIU2_EN_xx_yy_MIO[RST] */ member in struct:cvmx_ciu2_en_ppx_ip3_mio_w1s::cvmx_ciu2_en_ppx_ip3_mio_w1s_s
5863 uint64_t rst : 1; /**< MIO RST interrupt-enable */ member in struct:cvmx_ciu2_en_ppx_ip4_mio::cvmx_ciu2_en_ppx_ip4_mio_s
5920 uint64_t rst : 1; /**< Write 1 to clear CIU2_EN_xx_yy_MIO[RST] */ member in struct:cvmx_ciu2_en_ppx_ip4_mio_w1c::cvmx_ciu2_en_ppx_ip4_mio_w1c_s
5977 uint64_t rst : 1; /**< Write 1 to enable CIU2_EN_xx_yy_MIO[RST] */ member in struct:cvmx_ciu2_en_ppx_ip4_mio_w1s::cvmx_ciu2_en_ppx_ip4_mio_w1s_s
7049 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu2_raw_iox_int_mio::cvmx_ciu2_raw_iox_int_mio_s
7474 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu2_raw_ppx_ip2_mio::cvmx_ciu2_raw_ppx_ip2_mio_s
7899 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu2_raw_ppx_ip3_mio::cvmx_ciu2_raw_ppx_ip3_mio_s
8324 uint64_t rst : 1; /**< MIO RST interrupt member in struct:cvmx_ciu2_raw_ppx_ip4_mio::cvmx_ciu2_raw_ppx_ip4_mio_s
8770 uint64_t rst : 1; /**< MIO RST interrupt source member in struct:cvmx_ciu2_src_iox_int_mio::cvmx_ciu2_src_iox_int_mio_s
9210 uint64_t rst : 1; /**< MIO RST interrupt source member in struct:cvmx_ciu2_src_ppx_ip2_mio::cvmx_ciu2_src_ppx_ip2_mio_s
9653 uint64_t rst : 1; /**< MIO RST interrupt source member in struct:cvmx_ciu2_src_ppx_ip3_mio::cvmx_ciu2_src_ppx_ip3_mio_s
10093 uint64_t rst : 1; /**< MIO RST interrupt source member in struct:cvmx_ciu2_src_ppx_ip4_mio::cvmx_ciu2_src_ppx_ip4_mio_s
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/freebsd-10-stable/lib/libedit/
H A Dtty.c490 int rst = 1; local
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/freebsd-10-stable/sys/dev/qlnx/qlnxe/
H A Decore_tcp_ip.h121 rst:1, member in struct:ecore_tcphdr
/freebsd-10-stable/sys/dev/nand/
H A Dnfc_fsl.c652 static u_int rst = 1; /* 28: Read setup time (trlx). */ variable
/freebsd-10-stable/usr.bin/xlint/lint1/
H A Dtree.c773 tspec_t lt, rt = NOTSPEC, lst = NOTSPEC, rst = NOTSPEC, olt = NOTSPEC, local
1229 tspec_t lt, rt, lst = NOTSPEC, rst = NOTSPEC; local
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/freebsd-10-stable/sys/dev/cxgb/common/
H A Dcxgb_common.h576 u8 rst; member in struct:cphy

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