Searched defs:nand (Results 1 - 7 of 7) sorted by relevance

/freebsd-10-stable/lib/libc/sparc64/fpu/
H A Dfpu.c209 __fpu_mov(struct fpemu *fe, int type, int rd, int rs2, u_int32_t nand, argument
/freebsd-10-stable/sys/dev/nand/
H A Dnand_generic.c407 send_read_page(device_t nand, uint8_t start_command, uint8_t end_command, argument
428 generic_read_page(device_t nand, uint32_t page, void *buf, uint32_t len, argument
463 generic_read_oob(device_t nand, uint32_t page, void* buf, uint32_t len, uint32_t offset) argument
498 send_start_program_page(device_t nand, uint32_t row, uint32_t column) argument
525 generic_program_page(device_t nand, uint32_t page, void *buf, uint32_t len, uint32_t offset) argument
566 generic_program_page_intlv(device_t nand, uint32_t page, void *buf, uint32_t len, uint32_t offset) argument
606 generic_program_oob(device_t nand, uint32_t page, void* buf, uint32_t len, uint32_t offset) argument
644 send_erase_block(device_t nand, uint32_t row, uint8_t second_command) argument
664 generic_erase_block(device_t nand, uint32_t block) argument
700 generic_erase_block_intlv(device_t nand, uint32_t block) argument
777 send_small_read_page(device_t nand, uint8_t start_command, uint32_t row, uint32_t column) argument
796 small_read_page(device_t nand, uint32_t page, void *buf, uint32_t len, uint32_t offset) argument
836 small_read_oob(device_t nand, uint32_t page, void *buf, uint32_t len, uint32_t offset) argument
870 small_program_page(device_t nand, uint32_t page, void* buf, uint32_t len, uint32_t offset) argument
914 small_program_oob(device_t nand, uint32_t page, void* buf, uint32_t len, uint32_t offset) argument
953 nand_send_address(device_t nand, int32_t row, int32_t col, int8_t id) argument
[all...]
H A Dnand.c99 nand_init(struct nand_softc *nand, device_t dev, int ecc_mode, argument
[all...]
H A Dnand.h312 struct nand_softc *nand; member in struct:nand_chip
/freebsd-10-stable/sys/contrib/octeon-sdk/
H A Dcvmx-ciu-defs.h3536 uint64_t nand : 1; /**< EMMC Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_s
3616 uint64_t nand : 1; /**< NAND Flash Controller */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cn52xx
3692 uint64_t nand : 1; /**< EMMC Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cn61xx
3763 uint64_t nand : 1; /**< NAND Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cn63xx
3839 uint64_t nand : 1; /**< NAND Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cn66xx
3912 uint64_t nand : 1; /**< EMMC Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cnf71xx
3997 uint64_t nand : 1; /**< Write 1 to clear EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_s
4050 uint64_t nand : 1; /**< NAND Flash Controller */ member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cn52xx
4115 uint64_t nand : 1; /**< Write 1 to clear EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cn61xx
4188 uint64_t nand : 1; /**< Write 1 to clear NAND Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cn63xx
4266 uint64_t nand : 1; /**< Write 1 to clear NAND Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cn66xx
4341 uint64_t nand : 1; /**< Write 1 to clear EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cnf71xx
4427 uint64_t nand : 1; /**< Write 1 to set EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_s
4480 uint64_t nand : 1; /**< NAND Flash Controller */ member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cn52xx
4545 uint64_t nand : 1; /**< Write 1 to set EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cn61xx
4618 uint64_t nand : 1; /**< Write 1 to set NAND Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cn63xx
4696 uint64_t nand : 1; /**< Write 1 to set NAND Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cn66xx
4771 uint64_t nand : 1; /**< Write 1 to set EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cnf71xx
5964 uint64_t nand : 1; /**< EMMC Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_s
6024 uint64_t nand : 1; /**< NAND Flash Controller */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cn52xx
6108 uint64_t nand : 1; /**< EMMC Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cn61xx
6179 uint64_t nand : 1; /**< NAND Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cn63xx
6255 uint64_t nand : 1; /**< NAND Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cn66xx
6328 uint64_t nand : 1; /**< EMMC Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cnf71xx
6413 uint64_t nand : 1; /**< Write 1 to clear EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_s
6466 uint64_t nand : 1; /**< NAND Flash Controller */ member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cn52xx
6531 uint64_t nand : 1; /**< Write 1 to clear EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cn61xx
6604 uint64_t nand : 1; /**< Write 1 to clear NAND Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cn63xx
6682 uint64_t nand : 1; /**< Write 1 to clear NAND Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cn66xx
6757 uint64_t nand : 1; /**< Write 1 to clear EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cnf71xx
6843 uint64_t nand : 1; /**< Write 1 to set EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_s
6896 uint64_t nand : 1; /**< NAND Flash Controller */ member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cn52xx
6961 uint64_t nand : 1; /**< Write 1 to set EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cn61xx
7034 uint64_t nand : 1; /**< Write 1 to set NAND Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cn63xx
7112 uint64_t nand : 1; /**< Write 1 to set NAND Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cn66xx
7187 uint64_t nand : 1; /**< Write 1 to set EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cnf71xx
9174 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_s
9254 uint64_t nand : 1; /**< NAND Flash Controller */ member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cn52xx
9354 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cn61xx
9452 uint64_t nand : 1; /**< NAND Flash Controller interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cn63xx
9560 uint64_t nand : 1; /**< NAND Flash Controller interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cn66xx
9654 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cnf71xx
11066 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_iox_int::cvmx_ciu_sum1_iox_int_s
11172 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_iox_int::cvmx_ciu_sum1_iox_int_cn61xx
11279 uint64_t nand : 1; /**< NAND Flash Controller interrupt member in struct:cvmx_ciu_sum1_iox_int::cvmx_ciu_sum1_iox_int_cn66xx
11376 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_iox_int::cvmx_ciu_sum1_iox_int_cnf71xx
11496 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip2::cvmx_ciu_sum1_ppx_ip2_s
11602 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip2::cvmx_ciu_sum1_ppx_ip2_cn61xx
11709 uint64_t nand : 1; /**< NAND Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip2::cvmx_ciu_sum1_ppx_ip2_cn66xx
11806 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip2::cvmx_ciu_sum1_ppx_ip2_cnf71xx
11926 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip3::cvmx_ciu_sum1_ppx_ip3_s
12032 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip3::cvmx_ciu_sum1_ppx_ip3_cn61xx
12139 uint64_t nand : 1; /**< NAND Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip3::cvmx_ciu_sum1_ppx_ip3_cn66xx
12236 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip3::cvmx_ciu_sum1_ppx_ip3_cnf71xx
12356 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip4::cvmx_ciu_sum1_ppx_ip4_s
12462 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip4::cvmx_ciu_sum1_ppx_ip4_cn61xx
12569 uint64_t nand : 1; /**< NAND Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip4::cvmx_ciu_sum1_ppx_ip4_cn66xx
12666 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip4::cvmx_ciu_sum1_ppx_ip4_cnf71xx
[all...]
H A Dcvmx-ciu2-defs.h2565 uint64_t nand : 1; /**< NAND Flash Controller interrupt-enable */ member in struct:cvmx_ciu2_en_iox_int_mio::cvmx_ciu2_en_iox_int_mio_s
2622 uint64_t nand : 1; /**< Write 1 to clear CIU2_EN_xx_yy_MIO[NAND] */ member in struct:cvmx_ciu2_en_iox_int_mio_w1c::cvmx_ciu2_en_iox_int_mio_w1c_s
2679 uint64_t nand : 1; /**< Write 1 to enable CIU2_EN_xx_yy_MIO[NAND] */ member in struct:cvmx_ciu2_en_iox_int_mio_w1s::cvmx_ciu2_en_iox_int_mio_w1s_s
3669 uint64_t nand : 1; /**< NAND Flash Controller interrupt-enable */ member in struct:cvmx_ciu2_en_ppx_ip2_mio::cvmx_ciu2_en_ppx_ip2_mio_s
3726 uint64_t nand : 1; /**< Write 1 to clear CIU2_EN_xx_yy_MIO[NAND] */ member in struct:cvmx_ciu2_en_ppx_ip2_mio_w1c::cvmx_ciu2_en_ppx_ip2_mio_w1c_s
3783 uint64_t nand : 1; /**< Write 1 to enable CIU2_EN_xx_yy_MIO[NAND] */ member in struct:cvmx_ciu2_en_ppx_ip2_mio_w1s::cvmx_ciu2_en_ppx_ip2_mio_w1s_s
4773 uint64_t nand : 1; /**< NAND Flash Controller interrupt-enable */ member in struct:cvmx_ciu2_en_ppx_ip3_mio::cvmx_ciu2_en_ppx_ip3_mio_s
4830 uint64_t nand : 1; /**< Write 1 to clear CIU2_EN_xx_yy_MIO[NAND] */ member in struct:cvmx_ciu2_en_ppx_ip3_mio_w1c::cvmx_ciu2_en_ppx_ip3_mio_w1c_s
4887 uint64_t nand : 1; /**< Write 1 to enable CIU2_EN_xx_yy_MIO[NAND] */ member in struct:cvmx_ciu2_en_ppx_ip3_mio_w1s::cvmx_ciu2_en_ppx_ip3_mio_w1s_s
5877 uint64_t nand : 1; /**< NAND Flash Controller interrupt-enable */ member in struct:cvmx_ciu2_en_ppx_ip4_mio::cvmx_ciu2_en_ppx_ip4_mio_s
5934 uint64_t nand : 1; /**< Write 1 to clear CIU2_EN_xx_yy_MIO[NAND] */ member in struct:cvmx_ciu2_en_ppx_ip4_mio_w1c::cvmx_ciu2_en_ppx_ip4_mio_w1c_s
5991 uint64_t nand : 1; /**< Write 1 to enable CIU2_EN_xx_yy_MIO[NAND] */ member in struct:cvmx_ciu2_en_ppx_ip4_mio_w1s::cvmx_ciu2_en_ppx_ip4_mio_w1s_s
7071 uint64_t nand : 1; /**< NAND Flash Controller interrupt member in struct:cvmx_ciu2_raw_iox_int_mio::cvmx_ciu2_raw_iox_int_mio_s
7496 uint64_t nand : 1; /**< NAND Flash Controller interrupt member in struct:cvmx_ciu2_raw_ppx_ip2_mio::cvmx_ciu2_raw_ppx_ip2_mio_s
7921 uint64_t nand : 1; /**< NAND Flash Controller interrupt member in struct:cvmx_ciu2_raw_ppx_ip3_mio::cvmx_ciu2_raw_ppx_ip3_mio_s
8346 uint64_t nand : 1; /**< NAND Flash Controller interrupt member in struct:cvmx_ciu2_raw_ppx_ip4_mio::cvmx_ciu2_raw_ppx_ip4_mio_s
8792 uint64_t nand : 1; /**< NAND Flash Controller interrupt source member in struct:cvmx_ciu2_src_iox_int_mio::cvmx_ciu2_src_iox_int_mio_s
9232 uint64_t nand : 1; /**< NAND Flash Controller interrupt source member in struct:cvmx_ciu2_src_ppx_ip2_mio::cvmx_ciu2_src_ppx_ip2_mio_s
9675 uint64_t nand : 1; /**< NAND Flash Controller interrupt source member in struct:cvmx_ciu2_src_ppx_ip3_mio::cvmx_ciu2_src_ppx_ip3_mio_s
10115 uint64_t nand : 1; /**< NAND Flash Controller interrupt source member in struct:cvmx_ciu2_src_ppx_ip4_mio::cvmx_ciu2_src_ppx_ip4_mio_s
[all...]
H A Dcvmx-mio-defs.h2412 uint64_t nand : 1; /**< Region 0 is NAND flash */ member in struct:cvmx_mio_boot_pin_defs::cvmx_mio_boot_pin_defs_s
2436 uint64_t nand : 1; /**< Region 0 is NAND flash */ member in struct:cvmx_mio_boot_pin_defs::cvmx_mio_boot_pin_defs_cn52xx
2481 uint64_t nand : 1; /**< Region 0 is NAND flash */ member in struct:cvmx_mio_boot_pin_defs::cvmx_mio_boot_pin_defs_cn61xx

Completed in 155 milliseconds