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H A D | tpage | 157 Options: label
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H A D | ttree | 791 Options: label
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/macosx-10.10.1/ICU-531.30/icuSources/tools/genren/ |
H A D | genren.pl | 252 Options: label
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/macosx-10.10.1/CPANInternal-159.1/Parse-Yapp-1.05/lib/Parse/Yapp/ |
H A D | Options.pm | 157 sub Options { subroutine
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/macosx-10.10.1/OpenLDAP-499.27/OpenLDAP/contrib/slapd-tools/ |
H A D | statslog | 26 Options: label
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/macosx-10.10.1/CPANInternal-159.1/Net-Daemon-0.48/lib/Net/Daemon/ |
H A D | Test.pm | 136 sub Options ($) { subroutine
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/macosx-10.10.1/CPANInternal-159.1/PlRPC-0.2020/lib/RPC/ |
H A D | PlServer.pm | 62 sub Options ($) { subroutine
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/macosx-10.10.1/ICU-531.30/icuSources/tools/gensprep/ |
H A D | filterRFC3454.pl | 638 Options: label
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CppBackend/ |
H A D | CPPTargetMachine.h | 25 CPPTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/CPANInternal-159.1/Net-Daemon-0.48/lib/Net/ |
H A D | Daemon.pm | 73 sub Options ($) { subroutine
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MBlaze/ |
H A D | MBlazeTargetMachine.cpp | 35 MBlazeTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MSP430/ |
H A D | MSP430TargetMachine.cpp | 27 MSP430TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/XCore/ |
H A D | XCoreTargetMachine.cpp | 23 XCoreTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/ |
H A D | ARMTargetMachine.cpp | 40 ARMBaseTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 56 ARMTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 82 ThumbTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CellSPU/ |
H A D | SPUTargetMachine.cpp | 34 SPUTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Hexagon/ |
H A D | HexagonTargetMachine.cpp | 64 HexagonTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Mips/ |
H A D | MipsTargetMachine.cpp | 39 MipsTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle) argument 62 MipsebTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 71 MipselTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/NVPTX/ |
H A D | NVPTXTargetMachine.cpp | 63 NVPTXTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions& Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64bit) argument 83 NVPTXTargetMachine32(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 93 NVPTXTargetMachine64(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/PowerPC/ |
H A D | PPCTargetMachine.cpp | 35 PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64Bit) argument 55 PPC32TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 65 PPC64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Sparc/ |
H A D | SparcTargetMachine.cpp | 28 SparcTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64bit) argument 78 SparcV8TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 90 SparcV9TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/CodeGen/ |
H A D | LLVMTargetMachine.cpp | 65 LLVMTargetMachine(const Target &T, StringRef Triple, StringRef CPU, StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ |
H A D | TargetMachine.cpp | 45 TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/X86/ |
H A D | X86TargetMachine.cpp | 33 X86_32TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 56 X86_64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 72 X86TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64Bit) argument [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/tools/llc/ |
H A D | llc.cpp | 445 TargetOptions Options; local [all...] |
/macosx-10.10.1/postfix-255/ |
H A D | chunking.pl | 40 Options: label
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