| /freebsd-10.1-release/contrib/gdb/gdb/ |
| H A D | i386-stub.c | 125 CS, SS, DS, ES, FS, GS}; enumerator in enum:regnames
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| /freebsd-10.1-release/contrib/llvm/include/llvm/Support/ |
| H A D | Solaris.h | 32 #undef FS macro
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| H A D | TargetRegistry.h | 1063 Allocator(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /freebsd-10.1-release/contrib/llvm/lib/CodeGen/ |
| H A D | LLVMTargetMachine.cpp | 76 LLVMTargetMachine(const Target &T, StringRef Triple, StringRef CPU, StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /freebsd-10.1-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 6346 int FS = MFI->getObjectSize(FI); local
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| /freebsd-10.1-release/contrib/llvm/lib/MC/ |
| H A D | MCSubtargetInfo.cpp | 25 MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) { argument
42 MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS, argument
79 uint64_t MCSubtargetInfo::ToggleFeature(StringRef FS) { argument
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| /freebsd-10.1-release/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64Subtarget.cpp | 31 AArch64Subtarget::AArch64Subtarget(StringRef TT, StringRef CPU, StringRef FS) argument
38 initializeSubtargetFeatures(StringRef CPU, StringRef FS) argument
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| H A D | AArch64TargetMachine.cpp | 29 AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /freebsd-10.1-release/contrib/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCTargetDesc.cpp | 39 createAArch64MCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
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| /freebsd-10.1-release/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMSubtarget.cpp | 148 std::string FS = local
156 void ARMSubtarget::resetSubtargetFeatures(StringRef CPU, StringRef FS) { argument
77 ARMSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, const TargetOptions &Options) argument
[all...] |
| H A D | ARMTargetMachine.cpp | 45 ARMBaseTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
70 ARMTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
96 ThumbTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /freebsd-10.1-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCTargetDesc.cpp | 188 createARMMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
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| /freebsd-10.1-release/contrib/llvm/lib/Target/CppBackend/ |
| H A D | CPPTargetMachine.h | 25 CPPTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /freebsd-10.1-release/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 49 HexagonSubtarget::HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS): argument
|
| H A D | HexagonTargetMachine.cpp | 67 HexagonTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /freebsd-10.1-release/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCTargetDesc.cpp | 49 createHexagonMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
|
| /freebsd-10.1-release/contrib/llvm/lib/Target/MSP430/MCTargetDesc/ |
| H A D | MSP430MCTargetDesc.cpp | 46 createMSP430MCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
|
| /freebsd-10.1-release/contrib/llvm/lib/Target/MSP430/ |
| H A D | MSP430Subtarget.cpp | 26 MSP430Subtarget(const std::string &TT, const std::string &CPU, const std::string &FS) argument
|
| H A D | MSP430TargetMachine.cpp | 27 MSP430TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /freebsd-10.1-release/contrib/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsMCTargetDesc.cpp | 86 createMipsMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
|
| /freebsd-10.1-release/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsSubtarget.cpp | 64 MipsSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool little, Reloc::Model _RM, MipsTargetMachine *_TM) argument
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| H A D | MipsTargetMachine.cpp | 56 MipsTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle) argument
118 MipsebTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
127 MipselTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /freebsd-10.1-release/contrib/llvm/lib/Target/NVPTX/MCTargetDesc/ |
| H A D | NVPTXMCTargetDesc.cpp | 48 createNVPTXMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) { argument
|
| /freebsd-10.1-release/contrib/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXSubtarget.cpp | 26 NVPTXSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool is64Bit) argument
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| H A D | NVPTXTargetMachine.cpp | 66 NVPTXTargetMachine( const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64bit) argument
80 NVPTXTargetMachine32( const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
88 NVPTXTargetMachine64( const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|