Searched defs:CC (Results 151 - 165 of 165) sorted by relevance

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/freebsd-10.1-release/contrib/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp447 static Mips::CondCode condCodeToFCC(ISD::CondCode CC) { argument
476 static bool invertFPCondCodeUser(Mips::CondCode CC) { argument
503 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); local
512 ConstantSDNode *CC = cast<ConstantSDNode>(Cond.getOperand(2)); local
544 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get(); local
1393 Mips::CondCode CC = local
3227 MipsCC( CallingConv::ID CC, bool IsO32_, bool IsFP64_, CCState &Info, MipsCC::SpecialCallingConvType SpecialCallingConv_) argument
3435 copyByValRegs(SDValue Chain, SDLoc DL, std::vector<SDValue> &OutChains, SelectionDAG &DAG, const ISD::ArgFlagsTy &Flags, SmallVectorImpl<SDValue> &InVals, const Argument *FuncArg, const MipsCC &CC, const ByValArgInfo &ByVal) const argument
3479 passByValArg(SDValue Chain, SDLoc DL, std::deque< std::pair<unsigned, SDValue> > &RegsToPass, SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr, MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg, const MipsCC &CC, const ByValArgInfo &ByVal, const ISD::ArgFlagsTy &Flags, bool isLittle) const argument
3573 writeVarArgRegs(std::vector<SDValue> &OutChains, const MipsCC &CC, SDValue Chain, SDLoc DL, SelectionDAG &DAG) const argument
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/freebsd-10.1-release/contrib/llvm/tools/clang/lib/Sema/
H A DSemaType.cpp4504 CallingConv CC = fn->getCallConv(); local
4593 CallingConv CC = FT->getCallConv(); local
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H A DSemaDeclAttr.cpp3779 CallingConv CC; local
3878 bool Sema::CheckCallingConvAttr(const AttributeList &attr, CallingConv &CC, argument
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H A DSemaExprCXX.cpp5928 ExprResult Sema::ActOnFinishFullExpr(Expr *FE, SourceLocation CC, argument
H A DSemaChecking.cpp5226 CheckImplicitArgumentConversions(Sema &S, CallExpr *TheCall, SourceLocation CC) argument
5247 CheckImplicitConversion(Sema &S, Expr *E, QualType T, SourceLocation CC, bool *ICContext = 0) argument
5512 CheckConditionalOperand(Sema &S, Expr *E, QualType T, SourceLocation CC, bool &ICContext) argument
5525 CheckConditionalOperator(Sema &S, ConditionalOperator *E, SourceLocation CC, QualType T) argument
5557 AnalyzeImplicitConversions(Sema &S, Expr *OrigE, SourceLocation CC) argument
5643 CheckImplicitConversions(Expr *E, SourceLocation CC) argument
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H A DSemaDeclCXX.cpp4821 CallingConv CC = Context.getDefaultCallingConvention(/*IsVariadic=*/false, local
/freebsd-10.1-release/contrib/llvm/lib/IR/
H A DCore.cpp1480 void LLVMSetFunctionCallConv(LLVMValueRef Fn, unsigned CC) { argument
1796 void LLVMSetInstructionCallConv(LLVMValueRef Instr, unsigned CC) { argument
/freebsd-10.1-release/contrib/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp444 struct CCOp CC; member in union:__anon2459::ARMOperand::__anon2460
2243 static ARMOperand *CreateCondCode(ARMCC::CondCodes CC, SMLoc S) { argument
2893 unsigned CC = StringSwitch<unsigned>(Tok.getString().lower()) local
4730 unsigned CC = StringSwitch<unsigned>(Mnemonic.substr(Mnemonic.size()-2)) local
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/freebsd-10.1-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp3427 SDValue LHS, RHS, CC; local
4304 ISD::CondCode CC local
575 isSetCCEquivalent(SDValue N, SDValue &LHS, SDValue &RHS, SDValue &CC) argument
4365 ISD::CondCode CC = cast<CondCodeSDNode>(N4)->get(); local
4425 ISD::CondCode CC = cast<CondCodeSDNode>(User->getOperand(2))->get(); local
7027 CondCodeSDNode *CC = cast<CondCodeSDNode>(N->getOperand(1)); local
10443 SimplifySelectCC(SDLoc DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3, ISD::CondCode CC, bool NotExtCompare) argument
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/freebsd-10.1-release/contrib/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h54 inline static const char *A64CondCodeToString(A64CC::CondCodes CC) { argument
100 inline static A64CC::CondCodes A64InvertCondCode(A64CC::CondCodes CC) { argument
/freebsd-10.1-release/contrib/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp77 ARMCCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF, argument
1218 static ARMCC::CondCodes IntCCToARMCC(ISD::CondCode CC) { argument
1235 static void FPCCToARMCC(ISD::CondCode CC, ARMCC::CondCodes &CondCode, argument
1271 CCAssignFn *ARMTargetLowering::CCAssignFnForNode(CallingConv::ID CC, argument
3137 getARMCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, SDValue &ARMcc, SelectionDAG &DAG, SDLoc dl) const argument
3279 getInverseCCForVSEL(ISD::CondCode CC) argument
3285 checkVSELConstraints(ISD::CondCode CC, ARMCC::CondCodes &CondCode, bool &swpCmpOps, bool &swpVselOps) argument
3338 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get(); local
3491 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get(); local
3541 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get(); local
4177 SDValue CC = Op.getOperand(2); local
8085 isConditionalZeroOrAllOnes(SDNode *N, bool AllOnes, SDValue &CC, bool &Invert, SDValue &OtherOp, SelectionDAG &DAG) argument
10018 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(4))->get(); local
10098 ARMCC::CondCodes CC = local
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/freebsd-10.1-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp1534 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); local
1635 SDValue CC = DAG.getSetCC(dl, MVT::i32, VT.isInteger() ? GprIndex : FprIndex, local
2863 CalculateParameterAndLinkageAreaSize(SelectionDAG &DAG, bool isPPC64, bool isVarArg, unsigned CC, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, unsigned &nAltivecParamsAtEnd) argument
7428 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(1))->get(); local
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/freebsd-10.1-release/contrib/llvm/tools/clang/include/clang/AST/
H A DType.h2694 ExtInfo(CallingConv CC) : Bits(CC) { } argument
2837 ExtProtoInfo(CallingConv CC) argument
/freebsd-10.1-release/contrib/llvm/tools/clang/include/clang/Sema/
H A DSema.h2838 FullExprArg MakeFullExpr(Expr *Arg, SourceLocation CC) { argument
/freebsd-10.1-release/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp2087 static bool IsTailCallConvention(CallingConv::ID CC) { argument
2093 static bool IsCCallConvention(CallingConv::ID CC) { argument
2112 static bool FuncIsMadeTailCallSafe(CallingConv::ID CC, argument
5760 ISD::CondCode CC = cast<CondCodeSDNode>(In.getOperand(2))->get(); local
8461 SDValue CC = DAG.getConstant(X86::COND_NE, MVT::i8); local
9703 LowerToBT(SDValue And, ISD::CondCode CC, SDLoc dl, SelectionDAG &DAG) const argument
9827 SDValue CC = Op.getOperand(2); local
9850 SDValue CC = Op.getOperand(2); local
9885 SDValue CC = Op.getOperand(2); local
10089 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); local
10184 SDValue CC; local
10503 SDValue CC; local
11068 ISD::CondCode CC; local
11458 SDValue CC = DAG.getConstant(X86CC, MVT::i8); local
11467 SDValue CC = DAG.getConstant(X86CC, MVT::i8); local
12175 CallingConv::ID CC = Func->getCallingConv(); local
14479 X86::CondCode CC = X86::getCondFromCMovOpc(CMOVOpc); local
16556 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get(); local
16621 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get(); local
16884 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get(); local
16906 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get(); local
17000 SDValue CC = Cond.getOperand(2); local
17077 checkBoolTestSetCCCombine(SDValue Cmp, X86::CondCode &CC) argument
17206 X86::CondCode CC = (X86::CondCode)N->getConstantOperandVal(2); local
18884 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get(); local
18922 X86::CondCode CC = X86::CondCode(N->getConstantOperandVal(0)); local
18969 X86::CondCode CC = X86::CondCode(N->getConstantOperandVal(2)); local
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