plat/apq8064/timer.c

421     /* Reset and config */
478 int timer_init(timer_t *timer, timer_config_t config)
480     if (config.id < 0 || config.id >= NTIMERS) {
484     timer->id = config.id;
487     switch (config.id) {
489         timer->data = TIMER_VADDR_OFFSET(config.vaddr, PPSSXOTMR0_OFFSET);
492         timer->data = TIMER_VADDR_OFFSET(config.vaddr, PPSSXOTMR1_OFFSET);
495         TIMER_REG(config.vaddr, PPSSCLKCTNTL_OFFSET) |= PPSSCLKCTNTL_SLPON;
496         timer->data = TIMER_VADDR_OFFSET(config.vaddr, PPSSTMR0_OFFSET);
499         TIMER_REG(config.vaddr, PPSSCLKCTNTL_OFFSET) |= PPSSCLKCTNTL_SLPON;
500         timer->data = TIMER_VADDR_OFFSET(config.vaddr, PPSSTMR1_OFFSET);
503         TIMER_REG(config.vaddr, PPSSCLKCTNTL_OFFSET) |= PPSSCLKCTNTL_WDGON;
504         timer->data = TIMER_VADDR_OFFSET(config.vaddr, PPSSWDT_OFFSET);
508         timer->data = TIMER_VADDR_OFFSET(config.vaddr, KPSSGPT0_OFFSET);
511         timer->data = TIMER_VADDR_OFFSET(config.vaddr, KPSSGPT1_OFFSET);
514         timer->data = TIMER_VADDR_OFFSET(config.vaddr, KPSSDGT_OFFSET);
517         timer->data = TIMER_VADDR_OFFSET(config.vaddr, KPSSGPT0_OFFSET);
520         timer->data = TIMER_VADDR_OFFSET(config.vaddr, KPSSGPT1_OFFSET);
524         timer->data = TIMER_VADDR_OFFSET(config.vaddr, GSSGPT0_OFFSET);
527         timer->data = TIMER_VADDR_OFFSET(config.vaddr, GSSGPT1_OFFSET);
530         timer->data = TIMER_VADDR_OFFSET(config.vaddr, GSSDGT_OFFSET);
533         timer->data = TIMER_VADDR_OFFSET(config.vaddr, GSSGPT0_OFFSET);
536         timer->data = TIMER_VADDR_OFFSET(config.vaddr, GSSGPT1_OFFSET);
540         TIMER_REG(config.vaddr, RPMGPT0_CLK_CTL) = RPMGPT0_DIV4;
541         timer->data = TIMER_VADDR_OFFSET(config.vaddr, RPMGPT0_OFFSET);
544         timer->data = TIMER_VADDR_OFFSET(config.vaddr, RPMGPT1_OFFSET);
547         timer->data = TIMER_VADDR_OFFSET(config.vaddr, RPMWDT_OFFSET);