dev/pci/if_iwxreg.h

70  * @IWX_CTXT_INFO_EARLY_DEBUG: enable early debug
71  * @IWX_CTXT_INFO_ENABLE_CDMP: enable core dump
258  * @IWX_PRPH_SCRATCH_EARLY_DEBUG_EN: enable early debug conf
511 #define IWX_CSR_INT_MASK            (0x00c) /* host interrupt enable */
514 #define IWX_CSR_RESET               (0x020) /* busmaster enable, NMI, etc*/
813  * When bit is set and transfer size is set to 128B, the TFH will enable
816  * enable transfer size which doesn't cross 64B DRAM address boundary.
1018 /* enable the ID buf for read */
1800  * @TX_QUEUE_CFG_ENABLE_QUEUE: enable a queue
2059 /* This defines the bitmap of various calibrations to enable in both
4218  * @IWX_MAC_PROT_FLG_HT_PROT: enable HT protection
4577  * @IWX_POWER_FLAGS_ADVANCE_PM_ENA_MSK: Advanced PM (uAPSD) enable mask
4578  * @IWX_POWER_FLAGS_LPRX_ENA_MSK: Low Power RX enable.
5486  * @IWX_TLC_MNG_CFG_FLAGS_STBC_MSK: enable STBC. For HE this enables STBC for
5488  * @IWX_TLC_MNG_CFG_FLAGS_LDPC_MSK: enable LDPC
5489  * @IWX_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK: enable STBC in HE at 160MHz
5491  * @IWX_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK: enable HE Dual Carrier Modulation
5494  * @IWX_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK: enable HE Dual Carrier Modulation
5529  * @IWX_TLC_MNG_MODE_CCK: enable CCK
5530  * @IWX_TLC_MNG_MODE_OFDM_NON_HT: enable OFDM (non HT)
5531  * @IWX_TLC_MNG_MODE_NON_HT: enable non HT
5532  * @IWX_TLC_MNG_MODE_HT: enable HT
5533  * @IWX_TLC_MNG_MODE_VHT: enable VHT
5534  * @IWX_TLC_MNG_MODE_HE: enable HE
5535  * @IWX_TLC_MNG_MODE_EHT: enable EHT
5776  * @TX_CMD_OFFLD_L4_EN: enable TCP/UDP checksum
5777  * @TX_CMD_OFFLD_L3_EN: enable IP header checksum
6288  * @enable: 1 queue enable, 0 queue disable
6299 	uint8_t enable;
6644  * @enable_cam_mode: whether to enable CAM mode.
6645  * @enable_promiscuous_mode: whether to enable promiscuous mode
7398  * @tid_disable_tx: is tid BIT(tid) enabled for Tx. Clear BIT(x) to enable