dev/pci/if_iwxreg.h

2248  * @n_channels: number of valid channels in the array
2980  * of the device on the channel. Since the fw supports multiple channels
4080  * cleared when changing channels or when driver issues IWX_REPLY_STATISTICS_CMD
4390  *	other channels as well. This should be to true only in case that the
6597 /* Bits 26-31 are for num of channels in channel_array */
6628  * @extended:		default dwell time for channels 1, 6 and 11
6672  * @dwell_extended:		default dwell time for channels 1, 6 and 11
6677  * @channel_array:		default supported channels
6757  * @IWX_UMAC_SCAN_GEN_FLAGS_V2_FORCE_PASSIVE: all the channels scanned
6815  *      parameters following channels configuration array.
6834  *      parameters following channels configuration array.
6854  * @count: num of channels in scan request
6873  * @extended_dwell: dwell time for channels 1, 6 and 11
6988  *                        for 5GHz channels
7022  * @count: num of channels in scan request
7135  * @matching_channels: bitmap of channels that matched, referencing
7136  *	the channels passed in tue scan offload request
7175  * @scanned_channels: number of channels scanned and number of valid elements in
7650  * @cap: capabilities for all channels which matches the MCC
7654  * @n_channels: number of channels in @channels_data (may be 14, 39, 50 or 51
7655  *		channels, depending on platform)
7656  * @channels: channel control data map, DWORD for each channel. Only the first
7667 	uint32_t channels[0];
7686  * @cap: capabilities for all channels which matches the MCC
7692  * @n_channels: number of channels in @channels_data.
7693  * @channels: channel control data map, DWORD for each channel. Only the first
7705 	uint32_t channels[0];