Lines Matching defs:entry

59  * Return AH_TRUE if the specific key cache entry is valid.
62 ar9300_is_key_cache_entry_valid(struct ath_hal *ah, u_int16_t entry)
64 if (entry < AH_PRIVATE(ah)->ah_caps.halKeyCacheSize) {
65 u_int32_t val = OS_REG_READ(ah, AR_KEYTABLE_MAC1(entry));
74 * Clear the specified key cache entry and any associated MIC entry.
77 ar9300_reset_key_cache_entry(struct ath_hal *ah, u_int16_t entry)
82 if (entry >= AH_PRIVATE(ah)->ah_caps.halKeyCacheSize) {
84 "%s: entry %u out of range\n", __func__, entry);
88 ahp->ah_keytype[entry] = keyType[HAL_CIPHER_CLR];
90 key_type = OS_REG_READ(ah, AR_KEYTABLE_TYPE(entry));
93 OS_REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), 0);
94 OS_REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), 0);
95 OS_REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), 0);
96 OS_REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), 0);
97 OS_REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), 0);
98 OS_REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), AR_KEYTABLE_TYPE_CLR);
99 OS_REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), 0);
100 OS_REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), 0);
102 u_int16_t micentry = entry + 64; /* MIC goes at slot+64 */
135 * Sets the mac part of the specified key cache entry (and any
136 * associated MIC entry) and mark them valid.
141 u_int16_t entry,
147 if (entry >= AH_PRIVATE(ah)->ah_caps.halKeyCacheSize) {
149 "%s: entry %u out of range\n", __func__, entry);
162 * When the Key Cache entry is to decrypt Unicast frames, this bit
179 OS_REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), mac_lo);
180 OS_REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), mac_hi | unicast_addr);
185 * Sets the contents of the specified key cache entry
186 * and any associated MIC entry.
189 ar9300_set_key_cache_entry(struct ath_hal *ah, u_int16_t entry,
203 if (entry >= p_cap->halKeyCacheSize) {
205 "%s: entry %u out of range\n", __func__, entry);
227 if (IS_MIC_ENABLED(ah) && entry + 64 >= p_cap->halKeyCacheSize) {
229 "%s: entry %u inappropriate for TKIP\n",
230 __func__, entry);
271 pwrmgt = OS_REG_READ(ah, AR_KEYTABLE_TYPE(entry)) & AR_KEYTABLE_PWRMGT;
286 u_int16_t micentry = entry + 64; /* MIC goes at slot+64 */
297 OS_REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), ~key0);
298 OS_REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), ~key1);
299 OS_REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), key2);
300 OS_REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), key3);
301 OS_REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), key4);
302 OS_REG_WRITE(ah, AR_KEYTABLE_TYPE(entry),
304 ar9300_set_key_cache_entry_mac(ah, entry, mac);
315 * one cache slot entry.
360 OS_REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0);
361 OS_REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1);
363 OS_REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0);
364 OS_REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1);
365 OS_REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), key2);
366 OS_REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), key3);
367 OS_REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), key4);
368 OS_REG_WRITE(ah, AR_KEYTABLE_TYPE(entry),
377 ar9300_set_key_cache_entry_mac(ah, entry, mac);
380 ahp->ah_keytype[entry] = keyType[k->kv_type];
381 HALDEBUG(ah, HAL_DEBUG_KEYCACHE, "%s: entry=%d, k->kv_type=%d,"
382 "keyType=%d\n", __func__, entry, k->kv_type, keyType[k->kv_type]);
429 void ar9300_dump_keycache(struct ath_hal *ah, int n, u_int32_t *entry)
435 entry[i] = OS_REG_READ(ah, AR_KEYTABLE_KEY0(n) + i * 4);
442 * Check the contents of the specified key cache entry
443 * and any associated MIC entry.
446 ar9300_check_key_cache_entry(struct ath_hal *ah, u_int16_t entry,
457 if (entry >= pCap->hal_key_cache_size) {
459 "%s: entry %u out of range\n", __func__, entry);
477 if (IS_MIC_ENABLED(ah) && entry + 64 >= pCap->hal_key_cache_size) {
479 "%s: entry %u inappropriate for TKIP\n",
480 __func__, entry);
523 u_int16_t micentry = entry + 64; /* MIC goes at slot+64 */
531 if ((OS_REG_READ(ah, AR_KEYTABLE_KEY0(entry)) == key0) &&
532 (OS_REG_READ(ah, AR_KEYTABLE_KEY1(entry)) == key1) &&
533 (OS_REG_READ(ah, AR_KEYTABLE_KEY2(entry)) == key2) &&
534 (OS_REG_READ(ah, AR_KEYTABLE_KEY3(entry)) == key3) &&
535 (OS_REG_READ(ah, AR_KEYTABLE_KEY4(entry)) == key4) &&
536 ((OS_REG_READ(ah, AR_KEYTABLE_TYPE(entry)) & AR_KEY_TYPE) == (keyType & AR_KEY_TYPE)))
548 * one cache slot entry.
580 if ((OS_REG_READ(ah, AR_KEYTABLE_KEY0(entry)) == key0) &&
581 (OS_REG_READ(ah, AR_KEYTABLE_KEY1(entry)) == key1) &&
582 (OS_REG_READ(ah, AR_KEYTABLE_KEY2(entry)) == key2) &&
583 (OS_REG_READ(ah, AR_KEYTABLE_KEY3(entry)) == key3) &&
584 (OS_REG_READ(ah, AR_KEYTABLE_KEY4(entry)) == key4) &&
585 ((OS_REG_READ(ah, AR_KEYTABLE_TYPE(entry)) & AR_KEY_TYPE) == (keyType & AR_KEY_TYPE))) {