Lines Matching defs:mask
466 /* Set IRQ status/mask register. */
1685 /* In MSIX, a write to mask reegisters behaves as XOR. */
1718 int error, init, mask;
1781 mask = ifr->ifr_reqcap ^ if_getcapenable(ifp);
1783 if ((mask & IFCAP_POLLING) != 0) {
1802 if ((mask & IFCAP_WOL_MAGIC) != 0 &&
1805 if ((mask & IFCAP_TXCSUM) != 0 &&
1813 if ((mask & IFCAP_RXCSUM) != 0 &&
1818 if ((mask & IFCAP_TSO4) != 0 &&
1826 if ((mask & IFCAP_VLAN_HWTSO) != 0 &&
1829 if ((mask & IFCAP_VLAN_HWTAGGING) != 0 &&
2564 uint8_t addr[ETHER_ADDR_LEN], mask[ETHER_ADDR_LEN];
2574 bzero(mask, ETHER_ADDR_LEN);
2579 bcopy(etherbroadcastaddr, mask, ETHER_ADDR_LEN);
2591 bzero(mask, ETHER_ADDR_LEN);
2605 mask[j] &= ~mcaddr;
2612 mask[i] |= addr[i];
2623 mask[3] << 24 | mask[2] << 16 | mask[1] << 8 | mask[0]);
2625 mask[5] << 8 | mask[4]);