dev/msk/if_msk.c

519 		 * speed/flow-control/duplex updates.
1754 	 * Map control/status registers.
2640 	uint32_t control, csum, prod, si;
2775 	control = 0;
2812 		control |= INS_VLAN;
2817 			control |= CALSUM;
2819 			control |= CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
2821 				control |= UDPTCP;
2854 		tx_le->msk_control = htole32(txsegs[0].ds_len | control |
2857 		tx_le->msk_control = htole32(txsegs[0].ds_len | control |
2879 		tx_le->msk_control = htole32(txsegs[i].ds_len | control |
3102 msk_rxcsum(struct msk_if_softc *sc_if, uint32_t control, struct mbuf *m)
3111 		if ((control & (CSS_IPV4 | CSS_IPFRAG)) == CSS_IPV4) {
3113 			if ((control & CSS_IPV4_CSUM_OK) != 0)
3115 			if ((control & (CSS_TCP | CSS_UDP)) != 0 &&
3116 			    (control & (CSS_TCPUDP_CSUM_OK)) != 0) {
3192 msk_rxeof(struct msk_if_softc *sc_if, uint32_t status, uint32_t control,
3224 			/* Don't count flow-control packet as errors. */
3251 			msk_rxcsum(sc_if, control, m);
3268 msk_jumbo_rxeof(struct msk_if_softc *sc_if, uint32_t status, uint32_t control,
3289 			/* Don't count flow-control packet as errors. */
3316 			msk_rxcsum(sc_if, control, m);
3338 	uint32_t control;
3359 		control = le32toh(cur_tx->msk_control);
3362 		if ((control & EOP) == 0)
3597 	uint32_t control, status;
3612 		control = le32toh(sd->msk_control);
3613 		if ((control & HW_OWNER) == 0)
3615 		control &= ~HW_OWNER;
3616 		sd->msk_control = htole32(control);
3618 		len = control & STLE_LEN_MASK;
3619 		port = (control >> 16) & 0x01;
3623 			    "0x%08x\n", control & STLE_OP_MASK);
3627 		switch (control & STLE_OP_MASK) {
3642 				msk_jumbo_rxeof(sc_if, status, control, len);
3644 				msk_rxeof(sc_if, status, control, len);
3671 			    control & STLE_OP_MASK);
3852 	 * Initialize GMAC first such that speed/duplex/flow-control
3920 		/* Flush Rx MAC FIFO on any flow control or error. */