Lines Matching refs:ops
66 hw->phy.ops.acquire = e1000_acquire_vf;
67 hw->phy.ops.release = e1000_release_vf;
82 hw->nvm.ops.acquire = e1000_acquire_vf;
83 hw->nvm.ops.release = e1000_release_vf;
119 mac->ops.setup_link = e1000_setup_link_vf;
121 mac->ops.get_bus_info = e1000_get_bus_info_pcie_vf;
123 mac->ops.reset_hw = e1000_reset_hw_vf;
125 mac->ops.init_hw = e1000_init_hw_vf;
127 mac->ops.check_for_link = e1000_check_for_link_vf;
129 mac->ops.get_link_up_info = e1000_get_link_up_info_vf;
131 mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_vf;
133 mac->ops.rar_set = e1000_rar_set_vf;
135 mac->ops.read_mac_addr = e1000_read_mac_addr_vf;
149 hw->mac.ops.init_params = e1000_init_mac_params_vf;
150 hw->nvm.ops.init_params = e1000_init_nvm_params_vf;
151 hw->phy.ops.init_params = e1000_init_phy_params_vf;
152 hw->mbx.ops.init_params = e1000_init_mbx_params_vf;
274 while (!mbx->ops.check_for_rst(hw, 0) && timeout) {
284 mbx->ops.write_posted(hw, msgbuf, 1, 0);
289 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
335 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
338 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
386 s32 retval = mbx->ops.write_posted(hw, msg, size, 0);
389 mbx->ops.read_posted(hw, retmsg, E1000_VFMAILBOX_SIZE, 0);
502 ret_val = mbx->ops.write_posted(hw, &msgbuf, 1, 0);
505 ret_val = mbx->ops.read_posted(hw, &msgbuf, 1, 0);
551 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)
563 if (mbx->ops.read(hw, &in_msg, 1, 0))