dev/e1000/e1000_80003es2lan.c

99 		phy->ops.power_up = e1000_power_up_phy_copper;
100 		phy->ops.power_down = e1000_power_down_phy_copper_80003es2lan;
108 	phy->ops.acquire	= e1000_acquire_phy_80003es2lan;
109 	phy->ops.check_polarity	= e1000_check_polarity_m88;
110 	phy->ops.check_reset_block = e1000_check_reset_block_generic;
111 	phy->ops.commit		= e1000_phy_sw_reset_generic;
112 	phy->ops.get_cfg_done	= e1000_get_cfg_done_80003es2lan;
113 	phy->ops.get_info	= e1000_get_phy_info_m88;
114 	phy->ops.release	= e1000_release_phy_80003es2lan;
115 	phy->ops.reset		= e1000_phy_hw_reset_generic;
116 	phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_generic;
118 	phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_80003es2lan;
119 	phy->ops.get_cable_length = e1000_get_cable_length_80003es2lan;
120 	phy->ops.read_reg	= e1000_read_phy_reg_gg82563_80003es2lan;
121 	phy->ops.write_reg	= e1000_write_phy_reg_gg82563_80003es2lan;
123 	phy->ops.cfg_on_link_up = e1000_cfg_on_link_up_80003es2lan;
180 	nvm->ops.acquire	= e1000_acquire_nvm_80003es2lan;
181 	nvm->ops.read		= e1000_read_nvm_eerd;
182 	nvm->ops.release	= e1000_release_nvm_80003es2lan;
183 	nvm->ops.update		= e1000_update_nvm_checksum_generic;
184 	nvm->ops.valid_led_default = e1000_valid_led_default_generic;
185 	nvm->ops.validate	= e1000_validate_nvm_checksum_generic;
186 	nvm->ops.write		= e1000_write_nvm_80003es2lan;
205 		mac->ops.check_for_link = e1000_check_for_serdes_link_generic;
206 		mac->ops.setup_physical_interface =
211 		mac->ops.check_for_link = e1000_check_for_copper_link_generic;
212 		mac->ops.setup_physical_interface =
234 	mac->ops.get_bus_info = e1000_get_bus_info_pcie_generic;
236 	mac->ops.reset_hw = e1000_reset_hw_80003es2lan;
238 	mac->ops.init_hw = e1000_init_hw_80003es2lan;
240 	mac->ops.setup_link = e1000_setup_link_generic;
242 	mac->ops.check_mng_mode = e1000_check_mng_mode_generic;
244 	mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic;
246 	mac->ops.write_vfta = e1000_write_vfta_generic;
248 	mac->ops.clear_vfta = e1000_clear_vfta_generic;
250 	mac->ops.read_mac_addr = e1000_read_mac_addr_80003es2lan;
252 	mac->ops.id_led_init = e1000_id_led_init_generic;
254 	mac->ops.blink_led = e1000_blink_led_generic;
256 	mac->ops.setup_led = e1000_setup_led_generic;
258 	mac->ops.cleanup_led = e1000_cleanup_led_generic;
260 	mac->ops.led_on = e1000_led_on_generic;
261 	mac->ops.led_off = e1000_led_off_generic;
263 	mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_80003es2lan;
265 	mac->ops.get_link_up_info = e1000_get_link_up_info_80003es2lan;
268 	hw->mac.ops.set_lan_id(hw);
283 	hw->mac.ops.init_params = e1000_init_mac_params_80003es2lan;
284 	hw->nvm.ops.init_params = e1000_init_nvm_params_80003es2lan;
285 	hw->phy.ops.init_params = e1000_init_phy_params_80003es2lan;
598 	if (!(hw->phy.ops.read_reg))
604 	ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
609 	ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL, phy_data);
615 	ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_data);
624 	ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_data);
654 	ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_MAC_SPEC_CTRL,
672 	ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_MAC_SPEC_CTRL,
693 	if (!(hw->phy.ops.read_reg))
696 	ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_DSP_DISTANCE, &phy_data);
731 		hw->phy.ops.cfg_on_link_up(hw);
825 	ret_val = mac->ops.id_led_init(hw);
832 	mac->ops.clear_vfta(hw);
843 	ret_val = mac->ops.setup_link(hw);
978 	ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, &data);
986 	ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, data);
997 	ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_SPEC_CTRL, &data);
1026 	ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL, data);
1031 	ret_val = hw->phy.ops.commit(hw);
1054 	ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_SPEC_CTRL_2, &data);
1059 	ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL_2, data);
1067 	ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_PWR_MGMT_CTRL, &data);
1075 	if (!hw->mac.ops.check_mng_mode(hw)) {
1078 		ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_PWR_MGMT_CTRL,
1083 		ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
1089 		ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
1098 	ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_INBAND_CTRL, &data);
1103 	ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_INBAND_CTRL, data);
1230 		ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
1235 		ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
1247 	return hw->phy.ops.write_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);
1281 		ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
1286 		ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
1295 	return hw->phy.ops.write_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);
1400 	if (!(hw->mac.ops.check_mng_mode(hw) ||
1401 	      hw->phy.ops.check_reset_block(hw)))