graphics/intel_extreme/power.cpp

26 intel_en_gating(intel_info &info)
31 	if (info.pci->device_id == 0x2a02 || info.pci->device_id == 0x2a12) {
33 		write32(info, 0x6204, (1L << 29));
34 	} else if (info.device_type.InGroup(INTEL_GROUP_SNB)) {
36 		write32(info, 0x42020, (1L << 28) | (1L << 7) | (1L << 5));
37 	} else if (info.device_type.InGroup(INTEL_GROUP_IVB)) {
39 		write32(info, 0x42020, (1L << 28));
40 	} else if (info.device_type.InGroup(INTEL_GROUP_VLV)) {
42 		write32(info, VLV_DISPLAY_BASE + 0x6200, (1L << 28));
43 	} else if (info.device_type.InGroup(INTEL_GROUP_ILK)) {
45 		write32(info, 0x42020, (1L << 7) | (1L << 5));
46 	} else if (info.device_type.InGroup(INTEL_GROUP_G4x)) {
48 		write32(info, 0x6204, 0);
49 		write32(info, 0x6208, (1L << 9) | (1L << 7) | (1L << 6));
50 		write32(info, 0x6210, 0);
53 		if ((info.device_type.type & INTEL_TYPE_MOBILE) == INTEL_TYPE_MOBILE) {
57 		write32(info, 0x6200, gateValue);
60 		write32(info, 0x6204, (1L << 29) | (1L << 23));
62 	write32(info, 0x7408, 0x10);
69 intel_en_downclock(intel_info &info)
73 	if (!info.device_type.InGroup(INTEL_GROUP_SNB)
74 		&& !info.device_type.InGroup(INTEL_GROUP_IVB)) {
79 	if((info.device_type.type & INTEL_TYPE_MOBILE) == 0) {
97 	write32(info, INTEL6_RC_STATE, 0);
99 	uint32 rpStateCapacity = read32(info, INTEL6_RP_STATE_CAP);
100 	uint32 gtPerfStatus = read32(info, INTEL6_GT_PERF_STATUS);
104 	write32(info, INTEL6_RC_CONTROL, 0);
106 	write32(info, INTEL6_RC1_WAKE_RATE_LIMIT, 1000 << 16);
107 	write32(info, INTEL6_RC6_WAKE_RATE_LIMIT, 40 << 16 | 30);
108 	write32(info, INTEL6_RC6pp_WAKE_RATE_LIMIT, 30);
109 	write32(info, INTEL6_RC_EVALUATION_INTERVAL, 125000);
110 	write32(info, INTEL6_RC_IDLE_HYSTERSIS, 25);
114 	write32(info, INTEL6_RC_SLEEP, 0);
115 	write32(info, INTEL6_RC1e_THRESHOLD, 1000);
116 	write32(info, INTEL6_RC6_THRESHOLD, 50000);
117 	write32(info, INTEL6_RC6p_THRESHOLD, 100000);
118 	write32(info, INTEL6_RC6pp_THRESHOLD, 64000);
127 	write32(info, INTEL6_RC_CONTROL, rc6Mask | INTEL6_RC_CTL_EI_MODE(1)
129 	write32(info, INTEL6_RPNSWREQ, INTEL6_FREQUENCY(10) | INTEL6_OFFSET(0)
131 	write32(info, INTEL6_RC_VIDEO_FREQ, INTEL6_FREQUENCY(12));
133 	write32(info, INTEL6_RP_DOWN_TIMEOUT, 1000000);
134 	write32(info, INTEL6_RP_INTERRUPT_LIMITS, maxDelay << 24 | minDelay << 16);
136 	write32(info, INTEL6_RP_UP_THRESHOLD, 59400);
137 	write32(info, INTEL6_RP_DOWN_THRESHOLD, 245000);
138 	write32(info, INTEL6_RP_UP_EI, 66000);
139 	write32(info, INTEL6_RP_DOWN_EI, 350000);
141 	write32(info, INTEL6_RP_IDLE_HYSTERSIS, 10);
142 	write32(info, INTEL6_RP_CONTROL, INTEL6_RP_MEDIA_TURBO
149 	write32(info, INTEL6_PCODE_DATA, 0);
150 	write32(info, INTEL6_PCODE_MAILBOX, INTEL6_PCODE_READY
165 	write32(info, INTEL6_RP_INTERRUPT_LIMITS, limits);
167 	write32(info, INTEL6_RPNSWREQ, INTEL6_FREQUENCY(gtPerfShift)
171 	write32(info, INTEL6_PMIER, INTEL6_PM_DEFERRED_EVENTS);
173 	write32(info, INTEL6_PMIMR, 0);
175 	write32(info, INTEL6_PMINTRMSK, 0);