Lines Matching defs:enable
88 gen8_enable_interrupts(intel_info& info, pipe_index pipe, bool enable)
96 const uint32 value = enable ? PCH_INTERRUPT_VBLANK_BDW : 0;
104 gen11_enable_global_interrupts(intel_info& info, bool enable)
106 write32(info, GEN11_GFX_MSTR_IRQ, enable ? GEN11_MASTER_IRQ : 0);
107 return enable ? 0 : read32(info, GEN11_GFX_MSTR_IRQ);
112 gen8_enable_global_interrupts(intel_info& info, bool enable)
114 write32(info, PCH_MASTER_INT_CTL_BDW, enable ? PCH_MASTER_INT_CTL_GLOBAL_BDW : 0);
115 return enable ? 0 : read32(info, PCH_MASTER_INT_CTL_BDW);
213 * \param enable true to get the mask for enabling the interrupts, false to get
217 intel_get_interrupt_mask(intel_info& info, pipe_index pipe, bool enable)
247 #if 0 // FIXME enable when we support the 3rd pipe
255 // On SandyBridge, there is an extra "global enable" flag, which must also
257 if (enable && info.device_type.InFamily(INTEL_FAMILY_SER5))
265 intel_enable_interrupts(intel_info& info, pipes which, bool enable)
275 const uint32 value = enable ? finalMask : 0;
280 // enable interrupts - we only want VBLANK interrupts
528 // we enable everything, should come from the VBT
535 // we enable everything, should come from the VBT
623 // enable power