audio/ac97/ac97.c

109 bool ad1819_set_rate(ac97_dev *dev, uint8 reg, uint32 rate);
110 bool ad1819_get_rate(ac97_dev *dev, uint8 reg, uint32 *rate);
296 	ac97_reg_update_bits(dev, AC97_EXTENDED_STAT_CTRL, 1, 1); // enable variable rate audio
431 ac97_set_rate(ac97_dev *dev, uint8 reg, uint32 rate)
437 		return dev->set_rate(dev, reg, rate);
439 	value = (uint32)((rate * 48000ULL) / dev->clock); /* need 64 bit calculation for rates 96000 or higher */
442 		"rate = %" B_PRIu32 ", "
444 		dev->clock, rate, value));
446 	/* if double rate audio is currently enabled, divide value by 2 */
456 		LOG(("ac97_set_rate failed, new rate %d\n", ac97_reg_uncached_read(dev, reg)));
466 ac97_get_rate(ac97_dev *dev, uint8 reg, uint32 *rate)
471 		return dev->get_rate(dev, reg, rate);
477 	/* if double rate audio is currently enabled, multiply value by 2 */
481 	*rate = (uint32)((value * (uint64)dev->clock) / 48000); /* need 64 bit calculation to avoid overflow*/
582 		// enable double rate mode
588 			// disable double rate mode
756 ad1819_set_rate(ac97_dev *dev, uint8 reg, uint32 rate)
760 	value = (uint32)((rate * 48000ULL) / dev->clock); /* need 64 bit calculation for rates 96000 or higher */
763 		"rate = %" B_PRIu32 ", "
765 		dev->clock, rate, value));
786 ad1819_get_rate(ac97_dev *dev, uint8 reg, uint32 *rate)
803 	*rate = (uint32)((value * (uint64)dev->clock) / 48000); /* need 64 bit calculation to avoid overflow*/
824 	/* The AD1819 chip has proprietary  sample rate controls
825 	 * Setup sample rate 0 generator for DAC,
826 	 * Setup sample rate 1 generator for ADC,
830 	/* connect special rate set/get functions */
849 	/* Setup DAC and ADC rate generator assignments compatible with AC97 */
852 	/* Setup variable frame rate limits */