pci/x86/X86PCIController.cpp

20 #define PCI_MECH1_REQ_DATA(bus, device, func, offset) \
21 	(0x80000000 | (bus << 16) | (device << 11) | (func << 8) | (offset & ~3))
25 #define PCI_MECH2_CONFIG_PORT(dev, offset) \
26 	(uint16)(0xC00 | (dev << 8) | offset)
190 	uint16 offset, uint8 size, uint32 &value)
192 	if (offset > 0xff)
196 	out32(PCI_MECH1_REQ_DATA(bus, device, function, offset), PCI_MECH1_REQ_PORT);
199 			value = in8(PCI_MECH1_DATA_PORT + (offset & 3));
202 			value = in16(PCI_MECH1_DATA_PORT + (offset & 3));
218 	uint16 offset, uint8 size, uint32 value)
220 	if (offset > 0xff)
224 	out32(PCI_MECH1_REQ_DATA(bus, device, function, offset), PCI_MECH1_REQ_PORT);
227 			out8(value, PCI_MECH1_DATA_PORT + (offset & 3));
230 			out16(value, PCI_MECH1_DATA_PORT + (offset & 3));
273 	uint16 offset, uint8 size, uint32 &value)
275 	if (offset > 0xff)
283 			value = in8(PCI_MECH2_CONFIG_PORT(device, offset));
286 			value = in16(PCI_MECH2_CONFIG_PORT(device, offset));
289 			value = in32(PCI_MECH2_CONFIG_PORT(device, offset));
303 	uint16 offset, uint8 size, uint32 value)
305 	if (offset > 0xff)
313 			out8(value, PCI_MECH2_CONFIG_PORT(device, offset));
316 			out16(value, PCI_MECH2_CONFIG_PORT(device, offset));
319 			out32(value, PCI_MECH2_CONFIG_PORT(device, offset));
369 	uint16 offset, uint8 size, uint32 &value)
373 		return X86PCIControllerMeth1::ReadConfig(bus, device, function, offset,
377 	return fECAMPCIController.ReadConfig(bus, device, function, offset, size, value);
384 	uint16 offset, uint8 size, uint32 value)
388 		return X86PCIControllerMeth1::WriteConfig(bus, device, function, offset,
392 	return fECAMPCIController.WriteConfig(bus, device, function, offset, size, value);