Lines Matching refs:device
20 #define PCI_MECH1_REQ_DATA(bus, device, func, offset) \
21 (0x80000000 | (bus << 16) | (device << 11) | (func << 8) | (offset & ~3))
139 X86PCIController::ReadIrq(uint8 bus, uint8 device, uint8 function,
147 X86PCIController::WriteIrq(uint8 bus, uint8 device, uint8 function,
189 uint8 bus, uint8 device, uint8 function,
196 out32(PCI_MECH1_REQ_DATA(bus, device, function, offset), PCI_MECH1_REQ_PORT);
217 uint8 bus, uint8 device, uint8 function,
224 out32(PCI_MECH1_REQ_DATA(bus, device, function, offset), PCI_MECH1_REQ_PORT);
272 uint8 bus, uint8 device, uint8 function,
283 value = in8(PCI_MECH2_CONFIG_PORT(device, offset));
286 value = in16(PCI_MECH2_CONFIG_PORT(device, offset));
289 value = in32(PCI_MECH2_CONFIG_PORT(device, offset));
302 uint8 bus, uint8 device, uint8 function,
313 out8(value, PCI_MECH2_CONFIG_PORT(device, offset));
316 out16(value, PCI_MECH2_CONFIG_PORT(device, offset));
319 out32(value, PCI_MECH2_CONFIG_PORT(device, offset));
368 uint8 bus, uint8 device, uint8 function,
373 return X86PCIControllerMeth1::ReadConfig(bus, device, function, offset,
377 return fECAMPCIController.ReadConfig(bus, device, function, offset, size, value);
383 uint8 bus, uint8 device, uint8 function,
388 return X86PCIControllerMeth1::WriteConfig(bus, device, function, offset,
392 return fECAMPCIController.WriteConfig(bus, device, function, offset, size, value);