accelerants/radeon_hd/mode.cpp

14 #include "mode.h"
99 		TRACE("%s: preferred mode was found for display %" B_PRIu8 "\n",
151 radeon_dpms_set(uint8 id, int mode)
153 	if (mode == B_DPMS_ON) {
154 		display_crtc_dpms(id, mode);
155 		encoder_dpms_set(id, mode);
157 		encoder_dpms_set(id, mode);
158 		display_crtc_dpms(id, mode);
160 	gInfo->dpms_mode = mode;
165 radeon_dpms_set_hook(int mode)
172 		radeon_dpms_set(crtcID, mode);
177 radeon_set_display_mode(display_mode* mode)
179 	// TODO: multi-monitor? For now we set the mode on
183 	TRACE("  mode->space: %#" B_PRIx32 "\n", mode->space);
184 	TRACE("  mode->virtual_width: %" B_PRIu16 "\n", mode->virtual_width);
185 	TRACE("  mode->virtual_height: %" B_PRIu16 "\n", mode->virtual_height);
186 	TRACE("  mode->h_display_start: %" B_PRIu16 "\n", mode->h_display_start);
187 	TRACE("  mode->v_display_start: %" B_PRIu16 "\n", mode->v_display_start);
188 	TRACE("  mode->flags: %#" B_PRIx32 "\n", mode->flags);
195 	// Copy this display mode into the "current mode" for the display
196 	memcpy(&gDisplay[crtcID]->currentMode, mode, sizeof(display_mode));
203 		dpInfo->laneCount = dp_get_lane_count(connectorIndex, mode);
204 		dpInfo->linkRate = dp_get_link_rate(connectorIndex, mode);
215 	// *** CRT controler mode set
221 	pll_set(mode, crtcID);
223 	display_crtc_set_dtd(crtcID, mode);
225 	display_crtc_fb_set(crtcID, mode);
227 	display_crtc_scale(crtcID, mode);
229 	// *** encoder mode set
299 radeon_get_pixel_clock_limits(display_mode* mode, uint32* _low, uint32* _high)
305 		uint32 totalClocks = (uint32)mode->timing.h_total
306 			* (uint32)mode->timing.v_total;
327 is_mode_supported(display_mode* mode)
332 	if (is_mode_sane(mode) != B_OK)
343 		uint32 hfreq = mode->timing.pixel_clock / mode->timing.h_total;
346 			//TRACE("!!! mode below falls outside of hfreq range!\n");
351 		uint32 vfreq = mode->timing.pixel_clock / ((mode->timing.v_total
352 			* mode->timing.h_total) / 1000);
355 			//TRACE("!!! mode below falls outside of vfreq range!\n");
363 		mode->timing.pixel_clock, mode->timing.h_display,
364 		mode->timing.h_sync_start, mode->timing.h_sync_end,
365 		mode->timing.h_total, mode->timing.v_display,
366 		mode->timing.v_sync_start, mode->timing.v_sync_end,
367 		mode->timing.v_total,
379 is_mode_sane(display_mode* mode)
383 	if (mode->timing.h_sync_start > mode->timing.h_sync_end) {
386 			__func__, mode->timing.h_display, mode->timing.v_display);
390 	if (mode->timing.h_total < mode->timing.h_display) {
393 			__func__, mode->timing.h_display, mode->timing.v_display);
399 	if (mode->timing.v_sync_start > mode->timing.v_sync_end) {
402 			__func__, mode->timing.h_display, mode->timing.v_display);
406 	if (mode->timing.v_total < mode->timing.v_display) {
409 			__func__, mode->timing.h_display, mode->timing.v_display);
414 	int refresh = mode->timing.pixel_clock * 1000
415 		/ (mode->timing.h_total * mode->timing.v_total);
420 			__func__, mode->timing.h_display, mode->timing.v_display, refresh);
429 get_mode_bpp(display_mode* mode)
431 	// Get bitsPerPixel for given mode
433 	switch (mode->space) {
444 	ERROR("%s: Unknown colorspace for mode, guessing 32 bits per pixel\n",